annotate level1/modules/clock2_dw3.asm @ 2422:61778d4bb634

Updated source to use labels from os9defs
author boisy
date Tue, 26 Jan 2010 19:39:19 +0000
parents 9e3038c39b01
children a34c08cdfcb2
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1 ********************************************************************
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2 * Clock2 - DriveWire 3 RTC Driver
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3 *
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4 * $Id$
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5 *
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6 * Edt/Rev YYYY/MM/DD Modified by
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7 * Comment
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8 * ------------------------------------------------------------------
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9 * 1 2004/08/18 Boisy G. Pitre
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10 * Separated clock2 modules for source clarity.
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11 *
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12 * 2 2010/01/02 Boisy G. Pitre
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13 * Saved some bytes by optimizing
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14
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15 nam Clock2
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16 ttl DriveWire 3 RTC Driver
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17
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18 ifp1
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19 use defsfile
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20 endc
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21
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22 tylg set Sbrtn+Objct
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23 atrv set ReEnt+rev
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24 rev set $00
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25 edition set 2
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26
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27
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28 RTC.Base equ $0000
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29
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30 mod eom,name,tylg,atrv,JmpTable,RTC.Base
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31
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32 name fcs "Clock2"
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33 fcb edition
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34
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35 subname fcs "dw3"
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36
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37 * Three Entry Points:
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38 * - Init
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39 * - GetTime
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40 * - SetTIme
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41 JmpTable
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42 bra Init
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43 nop
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44 bra GetTime RTC Get Time
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45 nop
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46 ex rts RTC Set Time
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47
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48 GetTime pshs u,y,x,b
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49 lda #'# Time packet
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50 sta ,s
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51 leax ,s
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52 ldy #$0001
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53 IFGT Level-1
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54 ldu <D.DWSubAddr
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55 ELSE
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56 ldu >D.DWSubAddr
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57 ENDC
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58 beq UpdLeave in case we failed to link it, just exit
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59 jsr 6,u
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60 * Consider the following optimization
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61 ldx #D.Year
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62 ldy #$0006
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63 jsr 3,u
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64 UpdLeave puls b,x,y,u,pc
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65
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66
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67 Init
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68 * Check if subroutine already linked
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69 IFGT Level-1
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70 ldx <D.DWSubAddr
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71 ELSE
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72 ldx >D.DWSubAddr
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73 ENDC
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74 bne leave
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75 IFGT Level-1
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76 ldx <D.Proc
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77 pshs x
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78 ldx <D.SysPrc
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79 stx <D.Proc
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80 ENDC
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81 leax subname,pcr
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82 clra
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83 os9 F$Link
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84 IFGT Level-1
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85 puls x
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86 stx <D.Proc
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87 bcs ex
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88 sty <D.DWSubAddr
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89 ELSE
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90 bcs ex
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91 sty >D.DWSubAddr
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92 ENDC
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93 jmp ,y call initialization routine
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94 leave rts
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95
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96 emod
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97 eom equ *
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98 end
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99