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1942
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1 ********************************************************************
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2 * scbbt - CoCo Bit-Banger Terminal Driver
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3 *
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4 * $Id$
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5 *
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6 * Edt/Rev YYYY/MM/DD Modified by
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7 * Comment
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8 * ------------------------------------------------------------------
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9 * 9 ????/??/?? ???
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10 * Original Tandy L2 distribution version.
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11 *
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12 * 10 ????/??/?? ???
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13 * Added baud delay table for NitrOS-9.
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14 *
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15 * 11 2003/12/15 Boisy G. Pitre
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16 * Merged Level 1 and Level 2 sources for now.
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17
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18 nam scbbt
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19 ttl CoCo Bit-Banger Terminal Driver
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20
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21 * Disassembled 98/08/23 20:58:36 by Disasm v1.6 (C) 1988 by RML
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22
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23 ifp1
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24 use defsfile
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25 endc
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26
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27 tylg set Drivr+Objct
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28 atrv set ReEnt+rev
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29 rev set $00
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30 edition set 9
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31
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32 mod eom,name,tylg,atrv,start,size
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33
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34 fcb UPDAT.
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35
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36 name fcs /scbbt/
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37 fcb edition
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38
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39 IFGT Level-1
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40
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41 u0000 rmb 29
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42 u001D rmb 1
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43 u001E rmb 1
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44 u001F rmb 1
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45 u0020 rmb 2
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46 u0022 rmb 2
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47 u0024 rmb 1
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48 u0025 rmb 1
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49 size equ .
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50
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51 * Baud Rate Delay Table
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52 DelayTbl
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53 IFEQ H6309
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54 * 6809 delay values (1.89MHz)
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55 fdb $090C 110 baud
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56 fdb $034C 300 baud
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57 fdb $01A2 600 baud
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58 fdb $00CE 1200 baud
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59 fdb $0062 2400 baud
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60 fdb $002E 4800 baud
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61 fdb $0012 9600 baud
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62 fdb $0003 32000 baud
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63 ELSE
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64 * 6309 native mode delay values (1.89MHz)
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65 fdb $090C 110 baud (Unchanged, unknown)
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66 fdb $03D0 300 baud
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67 fdb $01A2 600 baud (Unchanged, unknown)
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68 fdb $00F0 1200 baud
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69 fdb $0073 2400 baud
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70 fdb $0036 4800 baud
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71 fdb $0017 9600 baud
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72 fdb $0003 32000 baud (Unchanged, unknown)
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73 ENDC
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74
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75 start lbra Init
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76 lbra Read
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77 lbra Write
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78 lbra GetStat
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79 lbra SetStat
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80 lbra Term
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81
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82 * Init
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83 *
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84 * Entry:
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85 * Y = address of device descriptor
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86 * U = address of device memory area
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87 *
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88 * Exit:
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89 * CC = carry set on error
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90 * B = error code
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91 *
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92 Init pshs cc
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93 orcc #IntMasks
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94 ldx #PIA1Base
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95 clr $01,x
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96 ldd <IT.COL,y get col/row bytes
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97 std <u0024,u
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98 lda #$FE
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99 sta ,x
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100 lda #$36
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101 sta $01,x
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102 lda ,x
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103 ldd <IT.PAR,y get parity/baud
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104 lbsr L0148
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105 puls cc
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106 clrb
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107
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108 * Term
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109 *
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110 * Entry:
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111 * U = address of device memory area
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112 *
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113 * Exit:
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114 * CC = carry set on error
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115 * B = error code
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116 *
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117 Term rts
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118
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119 * Read
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120 *
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121 * Entry:
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122 * Y = address of path descriptor
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123 * U = address of device memory area
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124 *
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125 * Exit:
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126 * A = character read
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127 * CC = carry set on error
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128 * B = error code
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129 *
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130 Read bsr L00AC
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131 bcs L00C8
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132 ldb #$08
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133 pshs b,cc
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134 tst <u001E,u
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135 beq L0066
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136 dec $01,s
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137 L0066 bra L0077
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138 L0068 lda <PD.BAU,y
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139 anda #$0F
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140 cmpa #$07
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141 beq L0077
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142 ldx #$0001
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143 os9 F$Sleep
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144 L0077 pshs y
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145 ldy #$FFFF
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146 L007D lda >PIA1Base+2
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147 leay -$01,y
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148 beq L008B
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149 lsra
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150 bcs L007D
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151 puls y
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152 bra L0090
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153 L008B puls y
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154 lsra
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155 bcs L0068
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156 L0090 orcc #IntMasks
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157 clra
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158 bsr L00D5
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159 L0095 bsr L00CE
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160 ldb >PIA1Base+2
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161 lsrb
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162 rora
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163 dec $01,s
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164 bne L0095
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165 bsr L00D5
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166 tst <u001E,u
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167 beq L00A8
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168 lsra
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169 L00A8 puls b,cc
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170 clrb
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171 rts
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172 L00AC pshs a
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173 lda <PD.BAU,y
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174 anda #$0F
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175 cmpa #$08
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176 bcc L00C4
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177 lsla
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178 leax >DelayTbl,pcr
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179 ldd a,x
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180 std <u0020,u
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181 clrb
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182 puls pc,a
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183 L00C4 ldb #E$BMode
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184 puls a
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185 L00C8 orcc #Carry
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186 rts
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187 L00CB stb >PIA1Base
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188 L00CE pshs b,a
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189 ldd <u0020,u
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190 bra L00DC
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191 L00D5 pshs b,a
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192 ldd <u0020,u
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193 lsra
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194 rorb
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195 L00DC subd #$0001
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196 bne L00DC
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197 puls pc,b,a
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198
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199 * Write
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200 *
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201 * Entry:
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202 * A = character to write
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203 * Y = address of path descriptor
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204 * U = address of device memory area
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205 *
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206 * Exit:
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207 * CC = carry set on error
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208 * B = error code
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209 *
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210 Write bsr L00AC
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211 bcs L00C8
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212 ldb #$09
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213 pshs b,cc
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214 orcc #IntMasks
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215 tst <u001E,u
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216 beq L00F4
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217 dec $01,s
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218 L00F4 andcc #^Carry
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219 L00F6 ldb #$02
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220 bcs L00FB
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221 clrb
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222 L00FB bsr L00CB
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223 lsra
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224 dec $01,s
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225 bne L00F6
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226 ldb <u001D,u
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227 beq L010B
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228 andb #$FE
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229 bsr L00CB
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230 L010B ldb #$02
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231 bsr L00CB
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232 tst <u001F,u
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233 beq L0118
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234 ldb #$02
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235 bsr L00CB
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236 L0118 puls pc,b,cc
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237
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238 * GetStat
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239 *
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240 * Entry:
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241 * A = function code
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242 * Y = address of path descriptor
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243 * U = address of device memory area
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244 *
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245 * Exit:
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246 * CC = carry set on error
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247 * B = error code
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248 *
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249 GetStat cmpa #SS.EOF
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250 bne L0120
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251 L011E clrb
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252 rts
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253 L0120 ldx PD.RGS,y
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254 cmpa #SS.ScSiz
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255 beq L0131
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256 cmpa #SS.ComSt
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257 bne L017E
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258 ldd <u0022,u
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259 std R$Y,x
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260 bra L011E
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261 L0131 ldx PD.RGS,y
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262 clra
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263 ldb <u0024,u
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264 std R$X,x
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265 ldb <u0025,u
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266 std R$Y,x
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267 bra L011E
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268
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269 * SetStat
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270 *
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271 * Entry:
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272 * A = function code
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273 * Y = address of path descriptor
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274 * U = address of device memory area
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275 *
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276 * Exit:
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277 * CC = carry set on error
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278 * B = error code
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279 *
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280 SetStat cmpa #SS.ComSt
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281 bne L017E
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282 ldx PD.RGS,y
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283 ldd R$Y,x
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284 L0148 std <u0022,u
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285 clra
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286 clrb
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287 std <u001D,u
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288 sta <u001F,u
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289 ldd <u0022,u
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290 tstb
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291 bpl L015C
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292 inc <u001F,u
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293 L015C bitb #$40
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294 bne L017A
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295 bitb #$20
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296 beq L0167
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297 inc <u001E,u
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298 L0167 bita #$20
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299 beq L0179
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300 bita #$80
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301 beq L017A
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302 inc <u001D,u
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303 bita #$40
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304 bne L0179
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305 inc <u001D,u
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306 L0179 rts
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307 L017A comb
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308 ldb #E$BMode
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309 rts
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310 L017E comb
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311 ldb #E$UnkSvc
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312 rts
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313
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314 ELSE
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315
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316 rmb V.SCF
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317 u001D rmb 1
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318 u001E rmb 1
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319 u001F rmb 1
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320 BaudCnt rmb 2 baud rate counter
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321 u0022 rmb 2
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322 u0024 rmb 1
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323 u0025 rmb 1
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324 size equ .
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325
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326 BaudTbl fdb $0482 110 baud
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327 fdb $01A2 300 baud
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328 fdb $00CD 600 baud
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329 fdb $0063 1200 baud
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330 fdb $002D 2400 baud
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331 fdb $0013 4800 baud
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332 fdb $0005 9600 baud
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333
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334 start lbra Init
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335 lbra Read
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336 lbra Write
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337 lbra GetStat
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338 lbra SetStat
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339 lbra Term
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340
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341 * Init
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342 *
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343 * Entry:
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344 * Y = address of device descriptor
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345 * U = address of device memory area
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346 *
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347 * Exit:
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348 * CC = carry set on error
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349 * B = error code
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350 *
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351 Init pshs cc
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352 orcc #IntMasks
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353 ldx #PIA1Base
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354 clr $01,x
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355 ldd <IT.COL,y get col/row bytes
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356 std <u0024,u
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357 lda #$FE
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358 sta ,x
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359 lda #$36
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360 sta $01,x
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361 lda ,x
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362 ldd <IT.PAR,y get parity/baud
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363 lbsr L014D
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364 puls cc
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365 clrb
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366
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367 * Term
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368 *
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369 * Entry:
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370 * U = address of device memory area
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371 *
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372 * Exit:
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373 * CC = carry set on error
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374 * B = error code
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375 *
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376 Term rts
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377
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378 * Read
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379 *
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380 * Entry:
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381 * Y = address of path descriptor
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382 * U = address of device memory area
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383 *
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384 * Exit:
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385 * A = character read
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386 * CC = carry set on error
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387 * B = error code
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388 *
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389 Read bsr L00B1
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390 bcs L00CD
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391 ldb #$08
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392 pshs b,cc
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393 tst <u001E,u
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394 beq L0066
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395 dec $01,s
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396 L0066 bra L006E
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397 L0068 ldx #$0001
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398 os9 F$Sleep
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399 L006E lda >PIA1Base+2
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400 lsra
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401 pshs x,a
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402 lda >$FF69
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403 bpl L0091
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404 lda >PIA1Base+3
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405 bita #$01
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406 beq L0091
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407 bita #$80
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408 beq L0091
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409 orcc #Entire
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410 leax <L0091,pcr
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411 pshs x
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412 pshs u,y,x,dp,b,a,cc
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413 jmp [D.SvcIRQ]
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414 L0091 puls x,a
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415 bcs L0068
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416 orcc #IntMasks
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417 clra
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418 bsr L00DA
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419 L009A bsr L00D3
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420 ldb >PIA1Base+2
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421 lsrb
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422 rora
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423 dec $01,s
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424 bne L009A
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425 bsr L00DA
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426 tst <u001E,u
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427 beq L00AD
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428 lsra
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429 L00AD puls b,cc
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430 clrb
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431 rts
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432 L00B1 pshs a
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433 lda <PD.BAU,y
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434 anda #$0F mask out baud rate
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435 cmpa #B19200
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436 bcc L00C9
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437 lsla
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438 leax >BaudTbl,pcr
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439 ldd a,x
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440 std <BaudCnt,u
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441 clrb
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442 puls pc,a
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443 L00C9 ldb #E$BMode
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444 puls a
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445 L00CD orcc #Carry
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446 rts
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447 L00D0 stb >PIA1Base
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448 L00D3 pshs b,a
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449 ldd <BaudCnt,u
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450 bra L00E1
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451 L00DA pshs b,a
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452 ldd <BaudCnt,u
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453 lsra
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454 rorb
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455 L00E1 subd #$0001
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456 bne L00E1
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457 puls pc,b,a
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458
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459 * Write
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460 *
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461 * Entry:
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462 * A = character to write
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463 * Y = address of path descriptor
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464 * U = address of device memory area
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465 *
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466 * Exit:
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467 * CC = carry set on error
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468 * B = error code
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469 *
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470 Write bsr L00B1
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471 bcs L00CD
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472 ldb #$09
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473 pshs b,cc
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474 orcc #IntMasks
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475 tst <u001E,u
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476 beq L00F9
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477 dec $01,s
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478 L00F9 andcc #^Carry
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479 L00FB ldb #$02
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|
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480 bcs L0100
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481 clrb
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482 L0100 bsr L00D0
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483 lsra
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484 dec $01,s
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485 bne L00FB
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486 ldb <u001D,u
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|
|
487 beq L0110
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488 andb #$FE
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489 bsr L00D0
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490 L0110 ldb #$02
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491 bsr L00D0
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492 tst <u001F,u
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|
493 beq L011D
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494 ldb #$02
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495 bsr L00D0
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496 L011D puls pc,b,cc
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497
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498 * GetStat
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499 *
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500 * Entry:
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501 * A = function code
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502 * Y = address of path descriptor
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|
503 * U = address of device memory area
|
|
|
504 *
|
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505 * Exit:
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|
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506 * CC = carry set on error
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|
|
507 * B = error code
|
|
|
508 *
|
|
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509 GetStat cmpa #SS.EOF
|
|
|
510 bne L0125
|
|
|
511 L0123 clrb
|
|
|
512 rts
|
|
|
513 L0125 ldx PD.RGS,y
|
|
|
514 cmpa #SS.ScSiz
|
|
|
515 beq L0136
|
|
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516 cmpa #SS.ComSt
|
|
|
517 bne L0183
|
|
|
518 ldd <u0022,u
|
|
|
519 std R$Y,x
|
|
|
520 bra L0123
|
|
|
521 L0136 ldx PD.RGS,y
|
|
|
522 clra
|
|
|
523 ldb <u0024,u
|
|
|
524 std R$X,x
|
|
|
525 ldb <u0025,u
|
|
|
526 std R$Y,x
|
|
|
527 bra L0123
|
|
|
528
|
|
|
529 * SetStat
|
|
|
530 *
|
|
|
531 * Entry:
|
|
|
532 * A = function code
|
|
|
533 * Y = address of path descriptor
|
|
|
534 * U = address of device memory area
|
|
|
535 *
|
|
|
536 * Exit:
|
|
|
537 * CC = carry set on error
|
|
|
538 * B = error code
|
|
|
539 *
|
|
|
540 SetStat cmpa #SS.ComSt
|
|
|
541 bne L0183
|
|
|
542 ldx PD.RGS,y
|
|
|
543 ldd R$Y,x
|
|
|
544 L014D std <u0022,u
|
|
|
545 clra
|
|
|
546 clrb
|
|
|
547 std <u001D,u
|
|
|
548 sta <u001F,u
|
|
|
549 ldd <u0022,u
|
|
|
550 tstb
|
|
|
551 bpl L0161
|
|
|
552 inc <u001F,u
|
|
|
553 L0161 bitb #$40
|
|
|
554 bne L017F
|
|
|
555 bitb #$20
|
|
|
556 beq L016C
|
|
|
557 inc <u001E,u
|
|
|
558 L016C bita #$20
|
|
|
559 beq L017E
|
|
|
560 bita #$80
|
|
|
561 beq L017F
|
|
|
562 inc <u001D,u
|
|
|
563 bita #$40
|
|
|
564 bne L017E
|
|
|
565 inc <u001D,u
|
|
|
566 L017E rts
|
|
|
567 L017F comb
|
|
|
568 ldb <E$BMode
|
|
|
569 rts
|
|
|
570 L0183 comb
|
|
|
571 ldb #E$UnkSvc
|
|
|
572 rts
|
|
|
573
|
|
|
574 ENDC
|
|
|
575
|
|
|
576 emod
|
|
|
577 eom equ *
|
|
|
578 end
|
|
|
579
|
