annotate lib/systype.a @ 2365:da4f3fbe1556

Term replacles /N0
author boisy
date Wed, 20 Jan 2010 19:47:38 +0000
parents 39d0df63f56d
children aaba193af04f
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1 ********************************************************************
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2 * SysType - NitrOS-9 System Specific Definitions
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3 *
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4 * $Id$
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5 *
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6 * Edt/Rev YYYY/MM/DD Modified by
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7 * Comment
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8 * ------------------------------------------------------------------
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9 * 1998/10/13 Boisy G. Pitre
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10 * Added defs by Bruce Isted from his Eliminator archive.
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11 *
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12 * 1998/10/31 Boisy G. Pitre
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13 * Merged cc3global.defs into this file.
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14 *
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15 * 2002/04/30 Boisy G. Pitre
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16 * Merged Level One and Level Two sysdefs.
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17 *
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18 * 2002/06/22 Boisy G. Pitre
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19 * Removed PIA.U4 and PIA.U8, improved comments
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20 *
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21 * 2003/11/05 Robert Gault
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22 * Made changes in window globals and grfdrv memory to handle regW
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23 * in 6809 systems.
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24 *
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25 * 2003/11/30 Boisy G. Pitre
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26 * Statics now are prefaced with V. to identify them easier in source.
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27 *
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28 * 2004/07/18 Boisy G. Pitre
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29 * Moved CoCo 3 Window stuff into cc3iodefs
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30
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31 NAM SysType
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32 IFEQ Level-1
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33 TTL NitrOS-9 Level 1 System Type Definitions
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34 ELSE
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35 IFEQ Level-2
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36 TTL NitrOS-9 Level 2 System Type Definitions
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37 ENDC
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38 IFEQ Level-3
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39 TTL NitrOS-9 Level 3 System Type Definitions
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40 ENDC
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41 ENDC
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42
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43
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44 **********************
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45 * CPU Type Definitions
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46 *
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47 Color: SET 1
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48 Color3: SET 2
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49 IFEQ Level-1
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50 CPUType: SET Color
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51 ELSE
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52 CPUType: SET Color3
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53 ENDC
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54
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55
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56 ******************************
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57 * Clock Speed Type Definitions
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58 *
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59 OneMHz: EQU 1
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60 TwoMHz: EQU 2
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61 IFEQ CPUType-Color
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62 CPUSpeed: SET OneMHz
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63 ELSE
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64 CPUSpeed: SET TwoMHz
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65 ENDC
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66
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67
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68 **********************************
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69 * Power Line Frequency Definitions
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70 *
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71 Hz50: EQU 1 Assemble clock for 50 hz power
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72 Hz60: EQU 2 Assemble clock for 60 hz power
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73 PwrLnFrq: SET Hz60 Set to Appropriate freq
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74
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75
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76 **********************************
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77 * Ticks per second
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78 *
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79 IFEQ PwrLnFrq-Hz50
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80 TkPerSec: SET 50
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81 ELSE
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82 TkPerSec: SET 60
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83 ENDC
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84
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85
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86 ******************
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87 * ACIA type set up
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88 *
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89 csect
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90 ACIA6850: RMB 1 MC6850 acia.
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91 ACIA6551: RMB 1 SY6551 acia.
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92 ACIA2661: RMB 1 SC2661 acia.
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93 ACIATYPE: SET ACIA6551
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94 endsect
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95
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96
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97 ****************************************
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98 * Special character Bit position equates
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99 *
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100 SHIFTBIT: EQU %00000001
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101 CNTRLBIT: EQU %00000010
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102 ALTERBIT: EQU %00000100
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103 UPBIT: EQU %00001000
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104 DOWNBIT: EQU %00010000
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105 LEFTBIT: EQU %00100000
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106 RIGHTBIT: EQU %01000000
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107 SPACEBIT: EQU %10000000
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108
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109
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110 ******************
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111 * Device addresses for miscellaneous hardware
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112 *
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113 A.AciaP: SET $FF68 Aciapak Address
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114 A.ModP: SET $FF6C ModPak Address
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115 DPort: SET $FF40 Disk controller base address
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116 MPI.Slct: SET $FF7F Multi-Pak slot select
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117 MPI.Slot: SET $03 Multi-Pak default slot
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118 PIA0Base: EQU $FF00
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119 PIA1Base: EQU $FF20
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120
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121
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122 ******************
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123 * VDG Devices
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124 *
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125 A.TermV: SET $FFC0 VDG Term
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126 A.V1: SET $FFC1 Possible additional VDG Devices
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127 A.V2: SET $FFC2
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128 A.V3: SET $FFC3
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129 A.V4: SET $FFC4
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130 A.V5: SET $FFC5
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131 A.V6: SET $FFC6
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132 A.V7: SET $FFC7
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133
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134
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135 IFEQ Level-1
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136
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137 *************************************************
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138 *
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139 * NitrOS-9 Level 1 Section
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140 *
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141 *************************************************
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142
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143 HW.Page: SET $FF Device descriptor hardware page
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144
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145 ELSE
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146
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147 *************************************************
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148 *
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149 * NitrOS-9 Level 2 Section
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150 *
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151 *************************************************
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152
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153 ****************************************
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154 * Dynamic Address Translator Definitions
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155 *
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156 DAT.BlCt: EQU 8 D.A.T. blocks/address space
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157 DAT.BlSz: EQU (256/DAT.BlCt)*256 D.A.T. block size
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158 DAT.ImSz: EQU DAT.BlCt*2 D.A.T. Image size
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159 DAT.Addr: EQU -(DAT.BlSz/256) D.A.T. MSB Address bits
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160 DAT.Task: EQU $FF91 Task Register address
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161 DAT.TkCt: EQU 32 Number of DAT Tasks
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162 DAT.Regs: EQU $FFA0 DAT Block Registers base address
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163 DAT.Free: EQU $333E Free Block Number
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164 DAT.BlMx: EQU $3F Maximum Block number
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165 DAT.BMSz: EQU $40 Memory Block Map size
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166 DAT.WrPr: EQU 0 no write protect
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167 DAT.WrEn: EQU 0 no write enable
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168 SysTask: EQU 0 Coco System Task number
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169 IOBlock: EQU $3F
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170 ROMBlock: EQU $3F
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171 IOAddr: EQU $7F
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172 ROMCount: EQU 1 number of blocks of ROM (High RAM Block)
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173 RAMCount: EQU 1 initial blocks of RAM
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174 MoveBlks: EQU DAT.BlCt-ROMCount-2 Block numbers used for copies
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175 BlockTyp: EQU 1 chk only first bytes of RAM block
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176 ByteType: EQU 2 chk entire block of RAM
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177 Limited: EQU 1 chk only upper memory for ROM modules
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178 UnLimitd: EQU 2 chk all NotRAM for modules
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179 * NOTE: this check assumes any NotRAM with a module will
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180 * always start with $87CD in first two bytes of block
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181 RAMCheck: EQU BlockTyp chk only beg bytes of block
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182 ROMCheck: EQU Limited chk only upper few blocks for ROM
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183 LastRAM: EQU IOBlock maximum RAM block number
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184
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185 ***************************
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186 * Color Computer 3 Specific
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187 *
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188 MappedIO: EQU true (Actually False but it works better this way)
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189
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190 ********************
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191 * Hardware addresses
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192 *
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193 GIMERegs: EQU $FF00 Base address of GIME registers
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194 IrqEnR: EQU $FF92 GIME IRQ enable/status register
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195 BordReg: EQU $FF9A Border color register
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196 PalAdr: EQU $FFB0 Palette registers
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197
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198 HW.Page: SET $07 Device descriptor hardware page
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199
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200 ENDC
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201