|
2236
|
1 ********************************************************************
|
|
|
2 * DW3DOS - DriveWire 3 DOS Command
|
|
|
3 *
|
|
|
4 * $Id$
|
|
|
5 *
|
|
|
6 * DW3DOS emulates the RS-DOS 'DOS' command, which obtains 18 256-byte
|
|
|
7 * sectors from track 34 of a disk and reads them into memory starting
|
|
|
8 * at $2600. Once all sectors have been read, control jumps to $2602.
|
|
|
9 *
|
|
|
10 * The flexibility that is inherent in the DriveWire design is that it
|
|
|
11 * allows a CoCo to boot into OS-9 or any other control program that might
|
|
|
12 * be desirable.
|
|
|
13 *
|
|
|
14 * Four ROMS can be made from this source:
|
|
|
15 *
|
|
|
16 * - CoCo 3 motherboard ROM (32K)
|
|
|
17 * - CoCo 1/2 motherboard ROM (16K)
|
|
|
18 * - CoCo 3 Disk Controller ROM (8K) (define DISKROM)
|
|
|
19 * - CoCo 1/2 Disk Controller ROM (8K) (define DISKROM)
|
|
|
20 *
|
|
|
21 * Two LOADM files can be made also:
|
|
|
22 *
|
|
|
23 * - CoCo 3 LOADMable BIN (define BIN)
|
|
|
24 * - CoCo 1/2 LOADMable BIN (define BIN)
|
|
|
25 *
|
|
|
26 * Also, two files can be made from this source:
|
|
|
27 *
|
|
|
28 * - CoCo 3 DOS track (4608 bytes) (define DOSTRACK)
|
|
|
29 * - CoCo 1/2 DOS track (4608 bytes) (define DOSTRACK)
|
|
|
30 *
|
|
|
31 * Edt/Rev YYYY/MM/DD Modified by
|
|
|
32 * Comment
|
|
|
33 * ------------------------------------------------------------------
|
|
|
34 * 2008/02/04 Boisy G. Pitre
|
|
|
35 * Adapted for DriveWire 3 protocol
|
|
|
36
|
|
|
37 nam DW3DOS
|
|
|
38 ttl DriveWire 3 DOS Command
|
|
|
39
|
|
|
40 ifp1
|
|
|
41 IFNE BIN
|
|
|
42 IntMasks equ $50
|
|
|
43 Carry equ 1
|
|
|
44 PIA0Base equ $FF00
|
|
|
45 PIA1Base equ $FF20
|
|
|
46 DAT.Regs equ $FFA0
|
|
|
47 E$NotRdy equ 246
|
|
|
48 ELSE
|
|
|
49 use defsfile
|
|
|
50 ENDC
|
|
2345
|
51 use ../defs/dwdefs.d
|
|
2236
|
52 endc
|
|
|
53
|
|
|
54 * Set up Level definition for low level read/write routines
|
|
|
55 IFEQ CoCo-3
|
|
|
56 Level equ 2
|
|
|
57 ELSE
|
|
|
58 Level equ 1
|
|
|
59 ENDC
|
|
|
60
|
|
|
61 IFNE DOSTRACK
|
|
|
62 Top equ $2600
|
|
|
63 ELSE
|
|
|
64 IFNE BIN
|
|
|
65 Top equ $2400
|
|
|
66 ELSE
|
|
|
67 IFNE DISKROM
|
|
|
68 Top equ $C000
|
|
|
69 ELSE
|
|
|
70 Top equ $8000
|
|
|
71 ENDC
|
|
|
72 ENDC
|
|
|
73 ENDC
|
|
|
74
|
|
|
75 org Top
|
|
|
76 IFNE DISKROM
|
|
|
77 fcc "DK"
|
|
|
78 lbra Entry
|
|
|
79 fill $FF,9*256 spaced out to prevent CoCo 3 BASIC ROM patches
|
|
|
80 ELSE
|
|
|
81 fcc /OS/
|
|
|
82 bra PreEntry
|
|
|
83 fdb $1205
|
|
|
84 * For the DOS track, we have to copy the DW3DOS code to another
|
|
|
85 * address and execute from there, since the boot track we pull
|
|
|
86 * from DriveWire will need to reside at $2600 (and we are now!)
|
|
|
87 PreEntry
|
|
|
88 leax Entry,pcr
|
|
|
89 ldy #$2000
|
|
|
90 ldd #csize
|
|
|
91 PreCopy ldu ,x++
|
|
|
92 stu ,y++
|
|
|
93 subd #$0002
|
|
|
94 bpl PreCopy
|
|
|
95 jmp $2000
|
|
|
96 ENDC
|
|
|
97
|
|
|
98 * Entry point
|
|
|
99 Entry orcc #IntMasks disable FIRQ, IRQ
|
|
|
100 lds #$1FFF set up a stack pointer
|
|
|
101
|
|
|
102 IFEQ CoCo-3
|
|
|
103
|
|
|
104 * CoCo 3 Initialization Code
|
|
|
105 clr $FFD9 go into fast mode
|
|
|
106
|
|
|
107 * Setup MMU
|
|
|
108 ldx #DAT.Regs
|
|
|
109 leay MMUTbl,pcr
|
|
|
110 ldb #16
|
|
|
111 MMULoop lda ,y+
|
|
|
112 sta ,x+
|
|
|
113 decb
|
|
|
114 bne MMULoop
|
|
|
115
|
|
|
116 * Setup video
|
|
|
117 leau CC3Regs,pcr point to video setup data
|
|
|
118 ldx #$FF90
|
|
|
119 Loop1 ldd ,u++ get the bytes
|
|
|
120 std ,x++ save in the hardware
|
|
|
121 cmpx #$FFA0
|
|
|
122 bcs Loop1
|
|
|
123
|
|
|
124 * Set palettes up
|
|
|
125 leau PalTbl,pcr
|
|
|
126 ldy #$FFB0 palette register
|
|
|
127 ldb #16
|
|
|
128 lbsr CopyRtn
|
|
|
129
|
|
|
130 * Initialize PIAs
|
|
|
131 ldx #PIA1Base RG - Initialize the PIA 1
|
|
|
132 ldd #$FF34
|
|
|
133 clr 1,x cassette motor off, 0,x is DDR
|
|
|
134 clr 3,x 2,x is DDR
|
|
|
135 deca A = $FE
|
|
|
136 sta ,x cassette bit 0 input, all others output
|
|
|
137 lda #$F8 bits 7-3 output, bits 2-0 input
|
|
|
138 sta 2,x set DDR
|
|
|
139 stb 1,x 0,x not DDR
|
|
|
140 stb 3,x 2,x not DDR
|
|
|
141 clr 2,x
|
|
|
142 lda #$02 RS-232 bit hi
|
|
|
143 sta ,x set it
|
|
|
144
|
|
|
145 lda #$FF all outputs
|
|
|
146 ldx #PIA0Base
|
|
|
147 clr 1,x 0,x is DDR
|
|
|
148 clr 3,x 2,x is DDR
|
|
|
149 clr ,x all inputs
|
|
|
150 sta 2,x all outputs
|
|
|
151 stb 1,x 0,x is not DDR
|
|
|
152 stb 3,x 2,x is not DDR
|
|
|
153 clr 2,x
|
|
|
154
|
|
|
155 ELSE
|
|
|
156
|
|
|
157 * CoCo 1/2 Initialization Code
|
|
|
158 ldx #PIA1Base PIA1
|
|
|
159 clr -3,x clear PIA0 Control Register A
|
|
|
160 clr -1,x clear PIA0 Control Register B
|
|
|
161 clr -4,x set PIA0 side A to input
|
|
|
162 ldd #$FF34
|
|
|
163 sta -2,x set PIA0 side B to output
|
|
|
164 stb -3,x enable PIA0 peripheral reg, disable PIA0
|
|
|
165 stb -1,x MPU interrupts, set CA2, CA1 to outputs
|
|
|
166 clr 1,x $FF20 = DDR, motoroff
|
|
|
167 clr 3,x $FF22 = DDR, sound disabled
|
|
|
168 deca A = $FE after deca
|
|
|
169 sta ,x bits 1-7 are outputs, bit 0 is input on PIA1 side A
|
|
|
170 lda #$F8
|
|
|
171 sta 2,x bits 0-2 are inputs, bits 3-7 are outputs on B side
|
|
|
172 stb 1,x enable peripheral registers, disable PIA1 MPU
|
|
|
173 stb 3,x interrupts and set CA2, CB2 as outputs
|
|
|
174 clr 2,x set 6847 mode to alphanumeric
|
|
|
175 ldb #$02
|
|
|
176 stb ,x make RS-232 output marking
|
|
|
177 clrb
|
|
|
178 tfr b,dp B = 0
|
|
|
179 ldb #$04
|
|
|
180 clr -2,x
|
|
|
181 bitb 2,x
|
|
|
182
|
|
|
183 lda #$37
|
|
|
184 sta PIA1Base+3
|
|
|
185
|
|
|
186 lda PIA0Base+3
|
|
|
187 ora #$01
|
|
|
188 sta PIA0Base+3
|
|
|
189
|
|
|
190 lda PIA1Base+2
|
|
|
191 anda #$07
|
|
|
192 sta PIA1Base+2
|
|
|
193
|
|
|
194 * 64K DRAM (M0=0, M1=1)
|
|
|
195 sta $FFDA RESET M0
|
|
|
196 sta $FFDD SET M1
|
|
|
197
|
|
|
198 ENDC
|
|
|
199
|
|
|
200 * Show Boot Message
|
|
|
201 * VDG Mode
|
|
|
202 sta $FFC0
|
|
|
203 sta $FFC2
|
|
|
204 sta $FFC4
|
|
|
205
|
|
|
206 * Locate Boot Text Screen at $0000
|
|
|
207 ldx #$FFC6
|
|
|
208 ldb #$07
|
|
|
209 ScrLoop sta ,x++
|
|
|
210 decb
|
|
|
211 bne ScrLoop
|
|
|
212
|
|
|
213 * Clear VDG screen
|
|
|
214 ldx #$0000
|
|
|
215 ldy #256
|
|
|
216 ldd #$6060
|
|
|
217 VDGClr std ,x++
|
|
|
218 leay -1,y
|
|
|
219 bne VDGClr
|
|
|
220
|
|
|
221 * Copy Booot Message to screen area
|
|
|
222 ldy #$10A
|
|
|
223 leau BootMsg,pcr
|
|
|
224 ldb #BootMLen
|
|
|
225 bsr CopyRtn
|
|
|
226
|
|
|
227 * Spin for a while so that the RS-232 bit stays hi for a time
|
|
|
228 Reset
|
|
|
229 ldx #$A000
|
|
|
230 Spin leax -1,x
|
|
|
231 bne Spin
|
|
|
232
|
|
|
233 Counter equ $1FFF
|
|
|
234 lds #$1FFE reset stack pointer
|
|
|
235
|
|
|
236 * DriveWire bootstrap code
|
|
|
237 * Get sectors 612-629 to $2600
|
|
|
238 DWDOS2 ldx #612 starting sector number
|
|
|
239 ldy #$2600 memory address
|
|
|
240 DOSLoop bsr DoRead read sector (into Y)
|
|
|
241 bcs Failed start all over
|
|
|
242 cmpx #612 our first sector?
|
|
|
243 bne DWDOS3 branch if not
|
|
|
244 ldd $2600 else get two bytes at $2600
|
|
|
245 cmpd #$4F53 OS?
|
|
|
246 bne Failed if not, bad data... fail
|
|
|
247 DWDOS3 leax 1,x else increment X
|
|
|
248 leay 256,y
|
|
|
249 cmpx #630 are we at end of 18 sectors?
|
|
|
250 blt DOSLoop branch if not
|
|
|
251
|
|
|
252 jmp $2602
|
|
|
253
|
|
|
254 CopyRtn clra
|
|
|
255 tfr d,x
|
|
|
256 Copy1 ldb ,u+
|
|
|
257 stb ,y+
|
|
|
258 leax -1,x
|
|
|
259 bne Copy1
|
|
|
260 rts
|
|
|
261
|
|
|
262 * Copy "FAILED" to screen area
|
|
|
263 Failed ldy #$14D
|
|
|
264 leau FailMsg,pcr
|
|
|
265 ldb #FailMLen
|
|
|
266 bsr CopyRtn
|
|
|
267 Hang bra Hang
|
|
|
268
|
|
|
269
|
|
|
270
|
|
|
271 DoRead clra drive #
|
|
|
272 clrb LSN bits 23-16
|
|
|
273 pshs d,x,y
|
|
|
274 lda #OP_READEX
|
|
|
275 ReRead pshs a
|
|
|
276 leax ,s
|
|
|
277 ldy #$0005
|
|
|
278 lbsr DWWrite
|
|
|
279 puls a
|
|
|
280
|
|
|
281 ldx 4,s get read buffer pointer
|
|
|
282 ldy #256 read 256 bytes
|
|
|
283 ldd #133*1 1 second timeout
|
|
|
284 bsr DWRead
|
|
|
285 bcs ReadEx
|
|
|
286 * Send 2 byte checksum
|
|
|
287 pshs y
|
|
|
288 leax ,s
|
|
|
289 ldy #2
|
|
|
290 lbsr DWWrite
|
|
|
291 ldy #1
|
|
|
292 ldd #133*1
|
|
|
293 bsr DWRead
|
|
|
294 leas 2,s
|
|
|
295 bcs ReadEx
|
|
|
296 lda ,s
|
|
|
297 beq ReadEx
|
|
|
298 cmpa #E_CRC
|
|
|
299 bne ReadErr
|
|
|
300 lda #OP_REREADEX
|
|
|
301 clr ,s
|
|
|
302 bra ReRead
|
|
|
303 ReadErr comb
|
|
|
304 ReadEx puls d,x,y,pc
|
|
|
305
|
|
|
306 use ../level1/modules/dwread.asm
|
|
|
307 use ../level1/modules/dwwrite.asm
|
|
|
308
|
|
|
309 IFEQ CoCo-3
|
|
|
310 * MMU
|
|
|
311 MMUTbl
|
|
|
312 fcb $38,$39,$3A,$3B,$3C,$3D,$3E,$3F
|
|
|
313 fcb $38,$39,$3A,$3B,$3C,$3D,$3E,$3F
|
|
|
314
|
|
|
315 * GIME register default values
|
|
|
316
|
|
|
317 CC3Regs fcb $EC CC2, MMU, IRQ, Vector page, SCS
|
|
|
318 fcb $00 map type 0
|
|
|
319 fcb $00 no FIRQ
|
|
|
320 fcb $00 no IRQ
|
|
|
321 fdb $0900 timer
|
|
|
322 fcb $00 unused
|
|
|
323 fcb $00 unused
|
|
|
324 fcb $00
|
|
|
325 fcb $00
|
|
|
326 fcb $00
|
|
|
327 fcb $00
|
|
|
328 fdb $0FE0
|
|
|
329 fcb $00
|
|
|
330 fcb $00
|
|
|
331
|
|
|
332 * Palette register default colors
|
|
|
333 PalTbl
|
|
|
334 fcb $12 green
|
|
|
335 fcb $36
|
|
|
336 fcb $09 blue
|
|
|
337 fcb $24 red
|
|
|
338 fcb $3F white
|
|
|
339 fcb $1B cyan
|
|
|
340 fcb $2D magenta
|
|
|
341 fcb $26
|
|
|
342 fcb $00 black
|
|
|
343 fcb $12 green
|
|
|
344 fcb $00 black
|
|
|
345 fcb $3F white
|
|
|
346 fcb $00 black
|
|
|
347 fcb $12 green
|
|
|
348 fcb $00 black
|
|
|
349 fcb $26
|
|
|
350
|
|
|
351 ENDC
|
|
|
352
|
|
|
353 * Boot Message
|
|
|
354 BootMsg fcc /DWs/
|
|
|
355 fcb $60
|
|
|
356 fcc /CC/
|
|
2241
|
357 fcb 112+CoCo
|
|
2236
|
358 fcb $60
|
|
|
359 fcc /BOOT/
|
|
|
360 BootMLen equ *-BootMsg
|
|
|
361
|
|
|
362 * Fail Message
|
|
|
363 FailMsg fcc /FAILED/
|
|
|
364 FailMLen equ *-FailMsg
|
|
|
365
|
|
|
366 csize equ *-Entry
|
|
|
367 eom equ *
|
|
|
368
|
|
|
369 * Fill pattern
|
|
|
370 IFEQ BIN
|
|
|
371 IFNE DOSTRACK
|
|
|
372 fill $FF,$1200-eom
|
|
|
373 ELSE
|
|
|
374 IFNE DISKROM
|
|
|
375 fill $FF,$1FF0-eom
|
|
|
376 ELSE
|
|
|
377 IFEQ CoCo-3
|
|
|
378 fill $FF,$7FF0-eom
|
|
|
379 ELSE
|
|
|
380 fill $FF,$3FF0-eom
|
|
|
381 ENDC
|
|
|
382 ENDC
|
|
|
383
|
|
|
384 IFEQ CoCo-3
|
|
|
385
|
|
|
386 * CoCo 3 ROM vectors
|
|
|
387 fdb $0000
|
|
|
388 fdb $FEEE
|
|
|
389 fdb $FEF1
|
|
|
390 fdb $FEF4
|
|
|
391 fdb $FEF7
|
|
|
392 fdb $FEFA
|
|
|
393 fdb $FEFD
|
|
|
394 fdb Entry+Top
|
|
|
395
|
|
|
396 ELSE
|
|
|
397
|
|
|
398 * CoCo 1/2 ROM vectors
|
|
|
399 fdb Entry+Top
|
|
|
400 fdb $0100
|
|
|
401 fdb $0103
|
|
|
402 fdb $010F
|
|
|
403 fdb $010C
|
|
|
404 fdb $0106
|
|
|
405 fdb $0109
|
|
|
406 fdb Entry+Top
|
|
|
407
|
|
|
408 ENDC
|
|
|
409 ENDC
|
|
|
410 ENDC
|
|
|
411
|
|
|
412 end PreEntry
|
|
|
413
|
