Mercurial > hg > Members > kono > nitros9-code
annotate level1/modules/sc6551.asm @ 3295:6b7a7b233925 default tip
makefile: Allow PORTS with level1/2 mix
https://sourceforge.net/p/nitros9/feature-requests/10/
| author | Tormod Volden <debian.tormod@gmail.com> |
|---|---|
| date | Tue, 19 Apr 2022 18:12:17 +0200 |
| parents | f91dc5c378f6 |
| children |
| rev | line source |
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| 1469 | 1 ******************************************************************** |
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2 * sc6551 - 6551 Driver |
| 1469 | 3 * |
| 4 * $Id$ | |
| 5 * | |
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6 * Edt/Rev YYYY/MM/DD Modified by |
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7 * Comment |
| 1469 | 8 * ------------------------------------------------------------------ |
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9 * ????/??/?? |
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10 * NitrOS-9 2.00 distribution. |
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11 * |
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12 * 9r4 2003/01/01 Boisy G. Pitre |
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13 * Back-ported to OS-9 Level Two. |
| 1547 | 14 * |
| 15 * 10r1 2003/??/?? Robert Gault | |
| 16 * Added 6809 code where it was lacking. | |
| 17 * | |
| 18 * 10r2 2004/05/03 Boisy G. Pitre | |
| 19 * Fixed numerous issues with 6809 and Level 1 versions. | |
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20 * Tested 6809 Level 1 and Level 2. |
| 1469 | 21 |
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22 nam sc6551 |
| 1469 | 23 ttl 6551 Driver |
| 24 | |
| 25 ifp1 | |
| 26 use defsfile | |
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27 ; use scfdefs |
| 1469 | 28 endc |
| 29 | |
| 30 * conditional assembly switches | |
| 31 TC9 set false "true" for TC-9 version, "false" for Coco 3 | |
| 32 MPIFlag set true "true" MPI slot selection, "false" no slot | |
| 33 | |
| 34 * miscellaneous definitions | |
| 35 DCDStBit equ %00100000 DCD status bit for SS.CDSta call | |
| 36 DSRStBit equ %01000000 DSR status bit for SS.CDSta call | |
| 37 SlpBreak set TkPerSec/2+1 line Break duration | |
| 38 SlpHngUp set TkPerSec/2+1 hang up (drop DTR) duration | |
| 39 | |
| 40 ifeq TC9-true | |
| 41 IRQBit equ %00000100 GIME IRQ bit to use for IRQ ($FF92) | |
| 42 else | |
| 43 IRQBit equ %00000001 GIME IRQ bit to use for IRQ ($FF92) | |
| 44 endc | |
| 45 | |
| 46 * 6551 register definitions | |
| 47 org 0 | |
| 48 DataReg rmb 1 receive/transmit Data (read Rx / write Tx) | |
| 49 StatReg rmb 1 status (read only) | |
| 50 PRstReg equ StatReg programmed reset (write only) | |
| 51 CmdReg rmb 1 command (read/write) | |
| 52 CtlReg rmb 1 control (read/write) | |
| 53 | |
| 54 * Status bit definitions | |
| 55 Stat.IRQ equ %10000000 IRQ occurred | |
| 56 Stat.DSR equ %01000000 DSR level (clear = active) | |
| 57 Stat.DCD equ %00100000 DCD level (clear = active) | |
| 58 Stat.TxE equ %00010000 Tx data register Empty | |
| 59 Stat.RxF equ %00001000 Rx data register Full | |
| 60 Stat.Ovr equ %00000100 Rx data Overrun error | |
| 61 Stat.Frm equ %00000010 Rx data Framing error | |
| 62 Stat.Par equ %00000001 Rx data Parity error | |
| 63 | |
| 64 Stat.Err equ Stat.Ovr!Stat.Frm!Stat.Par Status error bits | |
| 65 Stat.Flp equ $00 all Status bits active when set | |
| 66 Stat.Msk equ Stat.IRQ!Stat.RxF active IRQs | |
| 67 | |
| 68 * Control bit definitions | |
| 69 Ctl.Stop equ %10000000 stop bits (set=two, clear=one) | |
| 70 Ctl.DBit equ %01100000 see data bit table below | |
| 71 Ctl.RxCS equ %00010000 Rx clock source (set=baud rate, clear=external) | |
| 72 Ctl.Baud equ %00001111 see baud rate table below | |
| 73 | |
| 74 * data bit table | |
| 75 DB.8 equ %00000000 eight data bits per character | |
| 76 DB.7 equ %00100000 seven data bits per character | |
| 77 DB.6 equ %01000000 six data bits per character | |
| 78 DB.5 equ %01100000 five data bits per character | |
| 79 | |
| 80 * baud rate table | |
| 81 org $00 | |
| 82 BR.ExClk rmb 1 16x external clock (not supported) | |
| 83 org $11 | |
| 84 BR.00050 rmb 1 50 baud (not supported) | |
| 85 BR.00075 rmb 1 75 baud (not supported) | |
| 86 BR.00110 rmb 1 109.92 baud | |
| 87 BR.00135 rmb 1 134.58 baud (not supported) | |
| 88 BR.00150 rmb 1 150 baud (not supported) | |
| 89 BR.00300 rmb 1 300 baud | |
| 90 BR.00600 rmb 1 600 baud | |
| 91 BR.01200 rmb 1 1200 baud | |
| 92 BR.01800 rmb 1 1800 baud (not supported) | |
| 93 BR.02400 rmb 1 2400 baud | |
| 94 BR.03600 rmb 1 3600 baud (not supported) | |
| 95 BR.04800 rmb 1 4800 baud | |
| 96 BR.07200 rmb 1 7200 baud (not supported) | |
| 97 BR.09600 rmb 1 9600 baud | |
| 98 BR.19200 rmb 1 19200 baud | |
| 99 | |
| 100 * Command bit definitions | |
| 101 Cmd.Par equ %11100000 see parity table below | |
| 102 Cmd.Echo equ %00010000 local echo (set=activated) | |
| 103 Cmd.TIRB equ %00001100 see Tx IRQ/RTS/Break table below | |
| 104 Cmd.RxI equ %00000010 Rx IRQ (set=disabled) | |
| 105 Cmd.DTR equ %00000001 DTR output (set=enabled) | |
| 106 | |
| 107 * parity table | |
| 108 Par.None equ %00000000 | |
| 109 Par.Odd equ %00100000 | |
| 110 Par.Even equ %01100000 | |
| 111 Par.Mark equ %10100000 | |
| 112 Par.Spac equ %11100000 | |
| 113 | |
| 114 * Tx IRQ/RTS/Break table | |
| 115 TIRB.Off equ %00000000 RTS & Tx IRQs disabled | |
| 116 TIRB.On equ %00000100 RTS & Tx IRQs enabled | |
| 117 TIRB.RTS equ %00001000 RTS enabled, Tx IRQs disabled | |
| 118 TIRB.Brk equ %00001100 RTS enabled, Tx IRQs disabled, Tx line Break | |
| 119 | |
| 120 * V.ERR bit definitions | |
| 121 DCDLstEr equ %00100000 DCD lost error | |
| 122 OvrFloEr equ %00000100 Rx data overrun or Rx buffer overflow error | |
| 123 FrmingEr equ %00000010 Rx data framing error | |
| 124 ParityEr equ %00000001 Rx data parity error | |
| 125 | |
| 126 * FloCtlRx bit definitions | |
| 127 FCRxSend equ %10000000 send flow control character | |
| 128 FCRxSent equ %00010000 Rx disabled due to XOFF sent | |
| 129 FCRxDTR equ %00000010 Rx disabled due to DTR | |
| 130 FCRxRTS equ %00000001 Rx disabled due to RTS | |
| 131 | |
| 132 * FloCtlTx bit definitions | |
| 133 FCTxXOff equ %10000000 due to XOFF received | |
| 134 FCTxBrk equ %00000010 due to currently transmitting Break | |
| 135 | |
| 136 * Wrk.Type bit definitions | |
| 137 Parity equ %11100000 parity bits | |
| 138 MdmKill equ %00010000 modem kill option | |
| 139 RxSwFlow equ %00001000 Rx data software (XON/XOFF) flow control | |
| 140 TxSwFlow equ %00000100 Tx data software (XON/XOFF) flow control | |
| 141 RTSFlow equ %00000010 CTS/RTS hardware flow control | |
| 142 DSRFlow equ %00000001 DSR/DTR hardware flow control | |
| 143 | |
| 144 * Wrk.Baud bit definitions | |
| 145 StopBits equ %10000000 number of stop bits code | |
| 146 WordLen equ %01100000 word length code | |
| 147 BaudRate equ %00001111 baud rate code | |
| 148 | |
| 149 * Wrk.XTyp bit definitions | |
| 150 SwpDCDSR equ %10000000 swap DCD+DSR bits (valid for 6551 only) | |
| 151 ForceDTR equ %01000000 don't drop DTR in term routine | |
| 152 RxBufPag equ %00001111 input buffer page count | |
| 153 | |
| 154 * static data area definitions | |
| 155 org V.SCF allow for SCF manager data area | |
| 156 Cpy.Stat rmb 1 Status register copy | |
| 157 CpyDCDSR rmb 1 DSR+DCD status copy | |
| 158 Mask.DCD rmb 1 DCD status bit mask (MUST immediately precede Mask.DSR) | |
| 159 Mask.DSR rmb 1 DSR status bit mask (MUST immediately follow Mask.DCD) | |
| 160 CDSigPID rmb 1 process ID for CD signal | |
| 161 CDSigSig rmb 1 CD signal code | |
| 162 FloCtlRx rmb 1 Rx flow control flags | |
| 163 FloCtlTx rmb 1 Tx flow control flags | |
| 164 RxBufEnd rmb 2 end of Rx buffer | |
| 165 RxBufGet rmb 2 Rx buffer output pointer | |
| 166 RxBufMax rmb 2 Send XOFF (if enabled) at this point | |
| 167 RxBufMin rmb 2 Send XON (if XOFF sent) at this point | |
| 168 RxBufPtr rmb 2 pointer to Rx buffer | |
| 169 RxBufPut rmb 2 Rx buffer input pointer | |
| 170 RxBufSiz rmb 2 Rx buffer size | |
| 171 RxDatLen rmb 2 current length of data in Rx buffer | |
| 172 SigSent rmb 1 keyboard abort/interrupt signal already sent | |
| 173 SSigPID rmb 1 SS.SSig process ID | |
| 174 SSigSig rmb 1 SS.SSig signal code | |
| 175 WritFlag rmb 1 initial write attempt flag | |
| 176 Wrk.Type rmb 1 type work byte (MUST immediately precede Wrk.Baud) | |
| 177 Wrk.Baud rmb 1 baud work byte (MUST immediately follow Wrk.Type) | |
| 178 Wrk.XTyp rmb 1 extended type work byte | |
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179 IFEQ Level-1 |
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180 orgDFIRQ rmb 2 |
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181 ENDC |
| 1469 | 182 regWbuf rmb 2 substitute for regW |
| 183 RxBufDSz equ 256-. default Rx buffer gets remainder of page... | |
| 184 RxBuff rmb RxBufDSz default Rx buffer | |
| 185 MemSize equ . | |
| 186 | |
| 1547 | 187 rev set 2 |
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188 edition set 10 |
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189 |
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190 mod ModSize,ModName,Drivr+Objct,ReEnt+rev,ModEntry,MemSize |
| 1469 | 191 |
| 192 fcb UPDAT. access mode(s) | |
| 193 | |
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194 ModName fcs "sc6551" |
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195 fcb edition |
| 1469 | 196 |
| 197 ifeq MPIFlag-true | |
| 198 SlotSlct fcb MPI.Slot selected MPI slot | |
| 199 else | |
| 200 SlotSlct fcb $FF disable MPI slot selection | |
| 201 endc | |
| 202 | |
| 203 IRQPckt equ * | |
| 204 Pkt.Flip fcb Stat.Flp flip byte | |
| 205 Pkt.Mask fcb Stat.Msk mask byte | |
| 206 fcb $0A priority | |
| 207 | |
| 208 BaudTabl equ * | |
| 209 fcb BR.00110,BR.00300,BR.00600 | |
| 210 fcb BR.01200,BR.02400,BR.04800 | |
| 211 fcb BR.09600,BR.19200 | |
| 212 | |
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213 IFEQ Level-1 |
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214 FIRQRtn tst ,s 'Entire' bit of carry set? |
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215 bmi L003B branch if so |
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216 leas -$01,s make room on stack |
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217 pshs y,x,dp,b,a save regs |
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218 lda $08,s get original CC on stack |
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219 stu $07,s save U |
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220 ora #$80 set 'Entire' bit |
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221 pshs a save CC |
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222 L003B jmp [>D.SvcIRQ] jump to IRQ service routine |
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223 ENDC |
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224 |
| 1469 | 225 * NOTE: SCFMan has already cleared all device memory except for V.PAGE and |
| 226 * V.PORT. Zero-default variables are: CDSigPID, CDSigSig, Wrk.XTyp. | |
| 227 Init clrb default to no error... | |
| 1547 | 228 pshs cc,dp save IRQ/Carry status, system DP |
| 1469 | 229 IFNE H6309 |
| 230 tfr u,w | |
| 231 tfr e,dp | |
| 232 tfr y,w save descriptor pointer | |
| 233 ELSE | |
| 1547 | 234 tfr u,d |
| 235 tfr a,dp | |
| 236 pshs y | |
| 1469 | 237 ENDC |
| 238 ldd <V.PORT base hardware address | |
| 239 IFNE H6309 | |
| 240 incd point to 6551 status address | |
| 241 ELSE | |
| 242 addd #$0001 | |
| 243 ENDC | |
| 244 leax IRQPckt,pc | |
| 245 leay IRQSvc,pc | |
| 246 os9 F$IRQ | |
| 247 IFNE H6309 | |
| 248 tfr w,y recover descriptor pointer | |
| 249 ELSE | |
| 250 puls y | |
| 251 ENDC | |
| 252 lbcs ErrExit go report error... | |
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253 IFEQ Level-1 |
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254 ldd >D.FIRQ |
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255 std <orgDFIRQ |
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256 leax >FIRQRtn,pcr |
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257 stx >D.FIRQ |
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258 ENDC |
| 1469 | 259 ldb M$Opt,y get option size |
| 260 cmpb #IT.XTYP-IT.DTP room for extended type byte? | |
| 261 bls DfltInfo no, go use defaults... | |
| 262 ldd #Stat.DCD*256+Stat.DSR default (unswapped) DCD+DSR masks | |
| 263 tst IT.XTYP,y check extended type byte for swapped DCD & DSR bits | |
| 264 bpl NoSwap no, go skip swapping them... | |
| 265 exg a,b swap to DSR+DCD masks | |
| 266 NoSwap std <Mask.DCD save DCD+DSR (or DSR+DCD) masks | |
| 267 lda IT.XTYP,y get extended type byte | |
| 268 sta <Wrk.XTyp save it | |
| 269 anda #RxBufPag clear all but Rx buffer page count bits | |
| 270 beq DfltInfo none, go use defaults... | |
| 271 clrb make data size an even number of pages | |
| 272 IFNE H6309 | |
| 273 tfr u,w save data pointer | |
| 274 ELSE | |
| 275 pshs u | |
| 276 ENDC | |
| 277 os9 F$SRqMem get extended buffer | |
| 278 tfr u,x copy address | |
| 279 IFNE H6309 | |
| 280 tfr w,u recover data pointer | |
| 281 ELSE | |
| 282 puls u | |
| 283 ENDC | |
| 284 lbcs TermExit error, go remove IRQ entry and exit... | |
| 285 bra SetRxBuf | |
| 286 DfltInfo ldd #RxBufDSz default Rx buffer size | |
| 287 leax RxBuff,u default Rx buffer address | |
| 288 SetRxBuf std <RxBufSiz save Rx buffer size | |
| 289 stx <RxBufPtr save Rx buffer address | |
| 290 stx <RxBufGet set initial Rx buffer input address | |
| 291 stx <RxBufPut set initial Rx buffer output address | |
| 292 IFNE H6309 | |
| 293 addr d,x point to end of Rx buffer | |
| 294 ELSE | |
| 295 leax d,x | |
| 296 ENDC | |
| 297 stx <RxBufEnd save Rx buffer end address | |
| 298 subd #80 characters available in Rx buffer | |
| 299 std <RxBufMax set auto-XOFF threshold | |
| 300 ldd #10 characters remaining in Rx buffer | |
| 301 std <RxBufMin set auto-XON threshold after auto-XOFF | |
| 302 ldb #TIRB.RTS default command register | |
| 303 IFNE H6309 | |
| 304 tim #ForceDTR,<Wrk.XTyp | |
| 305 ELSE | |
| 306 lda #ForceDTR | |
| 307 bita <Wrk.XTyp | |
| 308 ENDC | |
| 309 beq NoDTR no, don't enable DTR yet | |
| 310 orb #Cmd.DTR set (enable) DTR bit | |
| 311 NoDTR ldx <V.PORT get port address | |
| 312 stb CmdReg,x set new command register | |
| 313 ldd IT.PAR,y [A] = IT.PAR, [B] = IT.BAU from descriptor | |
| 314 lbsr SetPort go save it and set up control/format registers | |
| 315 orcc #IntMasks disable IRQs while setting up hardware | |
| 316 IFEQ TC9-true | |
| 317 ELSE | |
| 318 IFNE H6309 | |
| 319 aim #$FC,>PIA1Base+3 | |
| 320 ELSE | |
| 321 lda >PIA1Base+3 | |
| 322 anda #$FC | |
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323 IFEQ Level-1 |
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324 ora #$01 |
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325 ENDC |
| 1469 | 326 sta >PIA1Base+3 |
| 327 ENDC | |
| 328 lda >PIA1Base+2 clear possible pending PIA CART* FIRQ | |
| 329 ENDC | |
| 330 IFGT Level-1 | |
| 331 lda #IRQBit get GIME IRQ bit to use | |
| 332 ora >D.IRQER mask in current GIME IRQ enables | |
| 333 sta >D.IRQER save GIME CART* IRQ enable shadow register | |
| 334 sta >IrqEnR enable GIME CART* IRQs | |
| 335 ENDC | |
| 336 lda StatReg,x ensure old IRQ flags are clear | |
| 337 lda DataReg,x ensure old error and Rx data IRQ flags are clear | |
| 338 lda StatReg,x ... again | |
| 339 lda DataReg,x ... and again | |
| 340 lda StatReg,x get new Status register contents | |
| 341 sta <Cpy.Stat save Status copy | |
| 342 tfr a,b copy it... | |
| 343 eora Pkt.Flip,pc flip bits per D.Poll | |
| 344 anda Pkt.Mask,pc any IRQ(s) still pending? | |
| 345 lbne NRdyErr yes, go report error... (device not plugged in?) | |
| 346 andb #Stat.DSR!Stat.DCD clear all but DSR+DCD status | |
| 347 stb <CpyDCDSR save new DCD+DSR status copy | |
| 348 IFEQ MPIFlag-true | |
| 349 lda SlotSlct,pc get MPI slot select value | |
| 350 bmi NoSelect no MPI slot select, go on... | |
| 351 sta >MPI.Slct set MPI slot select register | |
| 352 ENDC | |
| 1547 | 353 NoSelect puls cc,dp,pc recover IRQ/Carry status, system DP, return |
| 1469 | 354 |
| 355 Term clrb default to no error... | |
| 356 pshs cc,dp save IRQ/Carry status, dummy B, system DP | |
| 357 IFNE H6309 | |
| 358 tfr u,w setup our DP | |
| 359 tfr e,dp | |
| 360 ELSE | |
| 1547 | 361 tfr u,d |
| 1469 | 362 tfr a,dp |
| 363 ENDC | |
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364 IFEQ Level-1 |
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365 ldx >D.Proc |
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366 lda P$ID,x |
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367 sta <V.BUSY |
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368 sta <V.LPRC |
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369 ENDC |
| 1469 | 370 ldx <V.PORT |
| 371 lda CmdReg,x get current Command register contents | |
| 372 anda #^(Cmd.TIRB!Cmd.DTR) disable Tx IRQs, RTS, and DTR | |
| 373 ora #Cmd.RxI disable Rx IRQs | |
| 374 ldb <Wrk.XTyp get extended type byte | |
| 375 andb #ForceDTR forced DTR? | |
| 376 beq KeepDTR no, go leave DTR disabled... | |
| 377 ora #Cmd.DTR set (enable) DTR bit | |
| 378 KeepDTR sta CmdReg,x set DTR and RTS enable/disable | |
| 379 ldd <RxBufSiz get Rx buffer size | |
| 380 tsta less than 256 bytes? | |
| 381 beq TermExit yes, no system memory to return... | |
| 382 pshs u save data pointer | |
| 383 ldu <RxBufPtr get address of system memory | |
| 384 os9 F$SRtMem | |
| 385 puls u recover data pointer | |
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386 TermExit |
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387 IFEQ Level-1 |
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388 ldd <orgDFIRQ |
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389 std >D.FIRQ |
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390 ENDC |
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391 ldd <V.PORT base hardware address is status register |
| 1469 | 392 IFNE H6309 |
| 393 incd point to 6551 status register | |
| 394 ELSE | |
| 395 addd #$0001 | |
| 396 ENDC | |
| 397 ldx #$0000 remove IRQ table entry | |
| 398 leay IRQSvc,pc | |
| 399 puls cc recover IRQ/Carry status | |
| 400 os9 F$IRQ | |
| 401 puls dp,pc restore dummy A, system DP, return | |
| 402 | |
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403 ReadSlp |
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404 IFEQ Level-1 |
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405 lda <V.BUSY |
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406 sta <V.WAKE |
| 1549 | 407 lbsr Sleep0 go suspend process... |
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408 ELSE |
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409 ldd >D.Proc process descriptor address |
| 1469 | 410 sta <V.WAKE save MSB for IRQ service routine |
| 411 tfr d,x copy process descriptor address | |
| 412 IFNE H6309 | |
| 413 oim #Suspend,P$State,x | |
| 414 ELSE | |
| 415 ldb P$State,x | |
| 416 orb #Suspend | |
| 417 stb P$State,x | |
| 418 ENDC | |
| 1549 | 419 lbsr Sleep1 go suspend process... |
| 1469 | 420 ENDC |
| 421 ldx >D.Proc process descriptor address | |
| 422 ldb P$Signal,x pending signal for this process? | |
| 423 beq ChkState no, go check process state... | |
| 424 cmpb #S$Intrpt do we honor signal? | |
| 425 lbls ErrExit yes, go do it... | |
| 426 ChkState equ * | |
| 427 IFNE H6309 | |
| 428 tim #Condem,P$State,x | |
| 429 ELSE | |
| 430 ldb P$State,x | |
| 431 bitb #Condem | |
| 432 ENDC | |
| 433 bne PrAbtErr yes, go do it... | |
| 434 ldb <V.WAKE true interrupt? | |
| 435 beq ReadChk yes, go read the char. | |
| 436 bra ReadSlp no, go suspend the process | |
| 437 | |
| 438 Read clrb default to no errors... | |
| 439 pshs cc,dp save IRQ/Carry status, system DP | |
| 440 IFNE H6309 | |
| 441 tfr u,w setup our DP | |
| 442 tfr e,dp | |
| 443 ELSE | |
| 1547 | 444 tfr u,d |
| 1469 | 445 tfr a,dp |
| 446 ENDC | |
| 447 ReadLoop orcc #IntMasks disable IRQs while checking Rx flow control | |
| 448 ReadChk lda <FloCtlRx get Rx flow control flags | |
| 449 beq ReadChar none, go get Rx character... | |
| 450 ldx <RxDatLen get Rx data count again | |
| 451 cmpx <RxBufMin at or below XON level? | |
| 452 bhi ReadChar no, go get Rx character... | |
| 453 ldx <V.PORT | |
| 454 bita #FCRxSent Rx disabled due to XOFF sent? | |
| 455 beq ChkHWHS no, go check hardware handshake(s)... | |
| 456 ldb <FloCtlTx get Tx flow control flags | |
| 457 bitb #FCTxBrk currently transmitting line Break? | |
| 458 beq NotTxBrk yes, go skip XON this time... | |
| 459 ReadLp2 andcc #^IntMasks turn interupts back on | |
| 460 bra ReadLoop | |
| 461 NotTxBrk equ * | |
| 462 IFNE H6309 | |
| 463 tim #Stat.TxE,StatReg,x | |
| 464 ELSE | |
| 465 pshs a | |
| 466 lda StatReg,x | |
| 467 bita #Stat.TxE | |
| 468 puls a | |
| 469 ENDC | |
| 470 beq ReadLp2 no, go skip XON this time... | |
| 471 ldb <V.XON | |
| 472 stb DataReg,x write XON character | |
| 473 ChkHWHS bita #FCRxDTR!FCRxRTS Rx disabled due to DTR or RTS? | |
| 474 beq RxFloClr no, go clear Rx flow control flag(s)... | |
| 475 ldb CmdReg,x get current Command register contents | |
| 476 andb #^Cmd.TIRB clear Tx IRQ/RTS/Break control bits | |
| 477 orb #TIRB.RTS!Cmd.DTR enable RTS and DTR, disable Tx IRQs | |
| 478 stb CmdReg,x set Command register | |
| 479 RxFloClr clr <FloCtlRx clear Rx flow control flags | |
| 480 ReadChar ldb <V.ERR get accumulated errors, if any | |
| 481 stb PD.ERR,y set/clear error(s) in path descriptor | |
| 482 bne ReprtErr error(s), go report it/them... | |
| 483 ldd <RxDatLen get Rx buffer count | |
| 484 beq ReadSlp none, go sleep while waiting for new Rx data... | |
| 485 IFNE H6309 | |
| 486 decd less character we're about to grab | |
| 487 ELSE | |
| 488 subd #$0001 | |
| 489 ENDC | |
| 490 std <RxDatLen save new Rx data count | |
| 491 orcc #IntMasks see if this fixes the problem | |
| 492 ldx <RxBufGet current Rx buffer pickup position | |
| 493 lda ,x+ get Rx character, set up next pickup position | |
| 494 cmpx <RxBufEnd end of Rx buffer? | |
| 495 blo SetPckUp no, go keep pickup pointer | |
| 496 ldx <RxBufPtr get Rx buffer start address | |
| 497 SetPckUp stx <RxBufGet set new Rx data pickup pointer | |
| 498 puls cc,dp,pc recover IRQ/Carry status, dummy B, system DP, return | |
| 499 | |
| 500 ModEntry lbra Init | |
| 501 bra Read | |
| 502 nop | |
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503 bra Write |
| 1469 | 504 nop |
| 505 IFNE H6309 | |
| 506 bra GStt | |
| 507 nop | |
| 508 ELSE | |
| 509 lbra GStt | |
| 510 ENDC | |
| 511 lbra SStt | |
| 512 lbra Term | |
| 513 | |
| 514 PrAbtErr ldb #E$PrcAbt | |
| 515 bra ErrExit | |
| 516 | |
| 517 ReprtErr clr <V.ERR clear error status | |
| 518 bitb #DCDLstEr DCD lost error? | |
| 519 bne HngUpErr yes, go report it... | |
| 520 ldb #E$Read | |
| 521 ErrExit equ * | |
| 522 IFNE H6309 | |
| 523 oim #Carry,,s set carry | |
| 524 ELSE | |
| 525 lda ,s | |
| 526 ora #Carry | |
| 527 sta ,s | |
| 528 ENDC | |
| 1547 | 529 puls cc,dp,pc restore CC, system DP, return |
| 1469 | 530 |
| 531 HngUpErr ldb #E$HangUp | |
| 532 lda #PST.DCD DCD lost flag | |
| 533 sta PD.PST,y set path status flag | |
| 534 bra ErrExit | |
| 535 | |
| 536 NRdyErr ldb #E$NotRdy | |
| 537 bra ErrExit | |
| 538 | |
| 539 UnSvcErr ldb #E$UnkSvc | |
| 540 bra ErrExit | |
| 541 | |
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542 Write clrb default to no error... |
| 1469 | 543 pshs cc,dp save IRQ/Carry status, Tx character, system DP |
| 544 IFNE H6309 | |
| 545 tfr u,w setup our DP | |
| 546 tfr e,dp | |
| 547 tfr a,e | |
| 548 ELSE | |
| 1547 | 549 pshs a |
| 550 tfr u,d | |
| 551 tfr a,dp | |
| 552 puls a | |
| 1469 | 553 sta <regWbuf |
| 554 ENDC | |
| 555 orcc #IntMasks disable IRQs during error and Tx disable checks | |
| 556 bra WritChr | |
| 557 WritLoop lda <WritFlag | |
| 558 beq WritFast | |
| 559 lbsr Sleep1 | |
| 560 WritFast inc <WritFlag | |
| 561 WritChr ldx <V.PORT | |
| 562 ldb <V.ERR get accumulated errors, if any | |
| 563 andb #DCDLstEr DCD lost error? (ignore other errors, if any) | |
| 564 stb PD.ERR,y set/clear error(s) in path descriptor | |
| 565 bne ReprtErr DCD lost error, go report it... | |
| 566 ChkTxFlo ldb <FloCtlTx get Tx flow control flags | |
| 567 bitb #FCTxBrk currently transmitting line Break? | |
| 568 bne WritLoop yes, go sleep a while... | |
| 569 lda <Wrk.Type get software/hardware handshake enables | |
| 570 bita #DSRFlow DSR/DTR handshake enabled? | |
| 571 * Changed below - BGP | |
| 572 * beq ChkTxFlo no, go check Tx flow control | |
| 573 beq ChkRxFlo no, go check Rx flow control | |
| 574 ldb <Cpy.Stat get copy of status register | |
| 575 bitb <Mask.DSR Tx disabled due to DSR? | |
| 576 bne WritLoop yes, go sleep a while... | |
| 577 bita #TxSwFlow Tx software flow control enabled? | |
| 578 beq ChkRxFlo no, go check pending Rx flow control | |
| 579 bitb #FCTxXOff Tx disabled due to received XOFF? | |
| 580 bne WritLoop yes, go sleep a while... | |
| 581 ChkRxFlo bita #RxSwFlow Rx software flow control enabled? | |
| 582 beq ChkTxE no, go check Tx register empty | |
| 583 ldb <FloCtlRx get Rx flow control flags | |
| 584 bitb #FCRxSend XON/XOFF Rx flow control pending? | |
| 585 bne WritLoop yes, go sleep a while... | |
| 586 ChkTxE equ * | |
| 587 IFNE H6309 | |
| 588 tim #Stat.TxE,StatReg,x | |
| 589 ELSE | |
| 590 pshs a | |
| 591 lda StatReg,x | |
| 592 bita #Stat.TxE | |
| 593 puls a | |
| 594 ENDC | |
| 595 beq WritLoop no, go sleep a while... | |
| 596 IFNE H6309 | |
| 597 ste DataReg,x write Tx character | |
| 598 ELSE | |
| 599 ldb <regWbuf | |
| 600 stb DataReg,x | |
| 601 ENDC | |
| 602 clr <WritFlag clear "initial write attempt" flag | |
| 603 puls cc,dp,pc recover IRQ/Carry status, Tx character, system DP, return | |
| 604 | |
| 605 GStt clrb default to no error... | |
| 606 pshs cc,dp save IRQ/Carry status, dummy B, system DP | |
| 607 IFNE H6309 | |
| 608 tfr u,w setup our DP | |
| 609 tfr e,dp | |
| 610 ELSE | |
| 1547 | 611 pshs a |
| 612 tfr u,d | |
| 613 tfr a,dp | |
| 614 puls a | |
| 1469 | 615 ENDC |
| 616 ldx PD.RGS,y caller's register stack pointer | |
| 617 cmpa #SS.EOF | |
| 618 beq GSExitOK yes, SCF devices never return EOF | |
| 619 cmpa #SS.Ready | |
| 620 bne GetScSiz | |
| 621 ldd <RxDatLen get Rx data length | |
| 622 beq NRdyErr none, go report error | |
| 623 tsta more than 255 bytes? | |
| 624 beq SaveLen no, keep Rx data available | |
| 625 ldb #255 yes, just use 255 | |
| 626 SaveLen stb R$B,x set Rx data available in caller's [B] | |
| 627 GSExitOK puls cc,dp,pc restore Carry status, dummy B, system DP, return | |
| 628 | |
| 629 GetScSiz cmpa #SS.ScSiz | |
| 630 bne GetComSt | |
| 631 ldu PD.DEV,y | |
| 632 ldu V$DESC,u | |
| 633 clra | |
| 634 ldb IT.COL,u | |
| 635 std R$X,x | |
| 636 ldb IT.ROW,u | |
| 637 std R$Y,x | |
| 638 puls cc,dp,pc restore Carry status, dummy B, system DP, return | |
| 639 | |
| 640 GetComSt cmpa #SS.ComSt | |
| 641 lbne UnSvcErr no, go report error | |
| 642 ldd <Wrk.Type | |
| 643 std R$Y,x | |
| 644 clra default to DCD and DSR enabled | |
| 645 ldb <CpyDCDSR | |
| 646 bitb #Mask.DCD | |
| 647 beq CheckDSR no, go check DSR status | |
| 648 ora #DCDStBit | |
| 649 CheckDSR bitb <Mask.DSR DSR bit set (disabled)? | |
| 650 beq SaveCDSt no, go set DCD/DSR status | |
| 651 ora #DSRStBit | |
| 652 SaveCDSt sta R$B,x set 6551 ACIA style DCD/DSR status in caller's [B] | |
| 653 puls cc,dp,pc restore Carry status, dummy B, system DP, return | |
| 654 | |
| 655 BreakSlp ldx #SlpBreak SS.Break duration | |
| 656 bra TimedSlp | |
| 657 | |
| 658 HngUpSlp ldx #SlpHngUp SS.HngUp duration | |
| 659 bra TimedSlp | |
| 660 | |
|
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661 IFEQ Level-1 |
| 1549 | 662 Sleep0 ldx #$0000 |
| 663 bra TimedSlp | |
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664 ENDC |
| 1549 | 665 Sleep1 ldx #1 give up balance of tick |
| 1469 | 666 TimedSlp pshs cc save IRQ enable status |
| 667 andcc #^Intmasks enable IRQs | |
| 668 os9 F$Sleep | |
| 669 puls cc,pc restore IRQ enable status, return | |
| 670 | |
| 671 SStt clrb default to no error... | |
| 672 pshs cc,dp save IRQ/Carry status, dummy B, system DP | |
| 673 IFNE H6309 | |
| 674 tfr u,w setup our DP | |
| 675 tfr e,dp | |
| 676 ELSE | |
| 1547 | 677 pshs a |
| 678 tfr u,d | |
| 679 tfr a,dp | |
| 680 puls a | |
| 1469 | 681 ENDC |
| 682 ldx PD.RGS,y | |
| 683 cmpa #SS.HngUp | |
| 684 bne SetBreak | |
| 685 lda #^Cmd.DTR cleared (disabled) DTR bit | |
| 686 ldx <V.PORT | |
| 687 orcc #IntMasks disable IRQs while setting Command register | |
| 688 anda CmdReg,x mask in current Command register contents | |
| 689 sta CmdReg,x set new Command register | |
| 690 bsr HngUpSlp go sleep for a while... | |
| 691 BreakClr lda #^(Cmd.TIRB!Cmd.DTR) clear (disable) DTR and RTS control bits | |
| 692 FRegClr ldx <V.PORT | |
| 693 anda CmdReg,x mask in current Command register | |
| 694 ldb <FloCtlRx get Rx flow control flags | |
| 695 bitb #FCRxDTR Rx disabled due to DTR? | |
| 696 bne LeaveDTR yes, go leave DTR disabled | |
| 697 ora #Cmd.DTR set (enable) DTR bit | |
| 698 LeaveDTR bitb #FCRxRTS Rx disabled due to RTS? | |
| 699 bne LeaveRTS yes, go leave RTS disabled | |
| 700 ora #TIRB.RTS enable RTS output | |
| 701 LeaveRTS ldb <FloCtlTx get Tx flow control flags | |
| 702 bitb #FCTxBrk currently transmitting line Break? | |
| 703 beq NoTxBrk no, go leave RTS alone... | |
| 704 ora #TIRB.Brk set Tx Break bits | |
| 705 NoTxBrk sta CmdReg,x set new Command register | |
| 706 puls cc,dp,pc restore IRQ/Carry status, dummy B, system DP, return | |
| 707 | |
| 708 SetBreak cmpa #SS.Break Tx line break? | |
| 709 bne SetSSig | |
| 710 ldy <V.PORT | |
| 711 ldd #FCTxBrk*256+TIRB.Brk [A]=flow control flag, [B]=Tx break enable | |
| 712 orcc #Intmasks disable IRQs while messing with flow control flags | |
| 713 ora <FloCtlTx set Tx break flag bit | |
| 714 sta <FloCtlTx save Tx flow control flags | |
| 715 orb CmdReg,y set Tx line break bits | |
| 716 stb CmdReg,y start Tx line break | |
| 717 bsr BreakSlp go sleep for a while... | |
| 718 anda #^FCTxBrk clear Tx break flag bit | |
| 719 sta <FloCtlTx save Tx flow control flags | |
| 720 clr CmdReg,y clear Tx line break | |
| 721 bra BreakClr go restore RTS output to previous... | |
| 722 | |
| 723 SetSSig cmpa #SS.SSig | |
| 724 bne SetRelea | |
| 725 lda PD.CPR,y current process ID | |
| 726 ldb R$X+1,x LSB of [X] is signal code | |
| 727 orcc #IntMasks disable IRQs while checking Rx data length | |
| 728 ldx <RxDatLen | |
| 729 bne RSendSig | |
| 730 std <SSigPID | |
| 731 puls cc,dp,pc restore IRQ/Carry status, dummy B, system DP, return | |
| 732 RSendSig puls cc restore IRQ/Carry status | |
| 733 os9 F$Send | |
| 734 puls dp,pc restore system DP, return | |
| 735 | |
| 736 SetRelea cmpa #SS.Relea | |
| 737 bne SetCDSig | |
| 738 leax SSigPID,u point to Rx data signal process ID | |
| 739 bsr ReleaSig go release signal... | |
| 740 puls cc,dp,pc restore Carry status, dummy B, system DP, return | |
| 741 | |
| 742 SetCDSig cmpa #SS.CDSig set DCD signal? | |
| 743 bne SetCDRel | |
| 744 lda PD.CPR,y current process ID | |
| 745 ldb R$X+1,x LSB of [X] is signal code | |
| 746 std <CDSigPID | |
| 747 puls cc,dp,pc restore Carry status, dummy B, system DP, return | |
| 748 | |
| 749 SetCDRel cmpa #SS.CDRel release DCD signal? | |
| 750 bne SetComSt | |
| 751 CDRelSig leax CDSigPID,u point to DCD signal process ID | |
| 752 bsr ReleaSig go release signal... | |
| 753 puls cc,dp,pc restore Carry status, dummy B, system DP, return | |
| 754 | |
| 755 SetComSt cmpa #SS.ComSt | |
| 756 bne SetOpen | |
| 757 ldd R$Y,x caller's [Y] contains ACIAPAK format type/baud info | |
| 758 bsr SetPort go save it and set up control/format registers | |
| 759 ReturnOK puls cc,dp,pc restore Carry status, dummy B, system DP, return | |
| 760 | |
| 761 SetOpen cmpa #SS.Open | |
| 762 bne SetClose | |
| 763 lda R$Y+1,x get LSB of caller's [Y] | |
| 764 deca real SS.Open from SCF? (SCF sets LSB of [Y] = 1) | |
| 765 bne ReturnOK no, go do nothing but return OK... | |
| 766 lda #TIRB.RTS enabled DTR and RTS outputs | |
| 767 orcc #IntMasks disable IRQs while setting Format register | |
| 768 lbra FRegClr go enable DTR and RTS (if not disabled due to Rx flow control) | |
| 769 | |
| 770 SetClose cmpa #SS.Close | |
| 771 lbne UnSvcErr no, go report error... | |
| 772 lda R$Y+1,x real SS.Close from SCF? (SCF sets LSB of [Y] = 0) | |
| 773 bne ReturnOK no, go do nothing but return OK... | |
| 774 leax SSigPID,u point to Rx data signal process ID | |
| 775 bsr ReleaSig go release signal... | |
| 776 bra CDRelSig go release DCD signal, return from there... | |
| 777 | |
| 778 ReleaSig pshs cc save IRQ enable status | |
| 779 orcc #IntMasks disable IRQs while releasing signal | |
| 780 lda PD.CPR,y get current process ID | |
| 781 suba ,x same as signal process ID? | |
| 782 bne NoReleas no, go return... | |
| 783 sta ,x clear this signal's process ID | |
| 784 NoReleas puls cc,pc restore IRQ enable status, return | |
| 785 | |
| 786 SetPort pshs cc save IRQ enable and Carry status | |
| 787 orcc #IntMasks disable IRQs while setting up ACIA registers | |
| 788 std <Wrk.Type save type/baud in data area | |
| 789 leax BaudTabl,pc | |
| 790 andb #BaudRate clear all but baud rate bits | |
| 791 ldb b,x get baud rate setting | |
| 792 IFNE H6309 | |
| 793 tfr b,e save it temporarily | |
| 794 ELSE | |
| 795 stb <regWbuf | |
| 796 ENDC | |
| 797 ldb <Wrk.Baud get baud info again | |
| 798 andb #^(Ctl.RxCS!Ctl.Baud) clear clock source + baud rate code bits | |
| 799 IFNE H6309 | |
| 800 orr e,b mask in clock source + baud rate and clean up stack | |
| 801 ELSE | |
| 802 orb <regWbuf | |
| 803 ENDC | |
| 804 ldx <V.PORT get port address | |
| 805 anda #Cmd.Par clear all except parity bits | |
| 806 IFNE H6309 | |
| 807 tfr a,e save new command register contents temporarily | |
| 808 ELSE | |
| 809 sta <regWbuf | |
| 810 ENDC | |
| 811 lda CmdReg,x get current command register contents | |
| 812 anda #^Cmd.Par clear parity control bits | |
| 813 IFNE H6309 | |
| 814 orr e,a mask in new parity | |
| 815 ELSE | |
| 816 ora <regWbuf | |
| 817 ENDC | |
| 818 std CmdReg,x set command+control registers | |
| 819 puls cc,pc recover IRQ enable and Carry status, return... | |
| 820 | |
|
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821 IRQSvc |
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822 IFEQ Level-1 |
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823 lda >PIA1Base+2 clear FIRQ |
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6215c588d8ca
Added FIRQ handling code for Level 1--now works under NitrOS-9 Level 1
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824 ENDC |
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Added FIRQ handling code for Level 1--now works under NitrOS-9 Level 1
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825 pshs dp save system DP |
| 1469 | 826 IFNE H6309 |
| 827 tfr u,w setup our DP | |
| 828 tfr e,dp | |
| 829 ELSE | |
| 1547 | 830 tfr u,d setup our DP |
| 831 tfr a,dp | |
| 1469 | 832 ENDC |
| 833 ldx <V.PORT | |
| 834 ldb StatReg,x get current Status register contents | |
| 835 stb <Cpy.Stat save Status register copy | |
| 836 bitb #Stat.Err error(s)? | |
| 837 beq ChkRDRF no, go check Rx data | |
| 838 tst DataReg,x read Rx data register to clear ACIA error flags | |
| 839 bitb #Stat.Frm framing error (assume Rx line Break)? | |
| 840 beq ChkParty no, go check if parity error... | |
| 841 lda <V.QUIT default to keyboard quit ("Break") code | |
| 842 bra RxBreak go pretend we've received V.QUIT character... | |
| 843 | |
| 844 ChkParty bitb #Stat.Par parity error? | |
| 845 beq ChkOvRun no, go check overrun error... | |
| 846 lda #ParityEr mark parity error | |
| 847 ChkOvRun bita #Stat.Ovr overrun error? | |
| 848 beq SaveErrs no, go save errors... | |
| 849 ora #OvrFloEr mark overrun error | |
| 850 SaveErrs ora <V.ERR | |
| 851 sta <V.ERR | |
| 852 lbra ChkTrDCD go check if DCD transition... | |
| 853 | |
| 854 ChkRDRF bitb #Stat.RxF Rx data? | |
| 855 lbeq ChkTrDCD no, go check DCD transition | |
| 856 lda DataReg,x get Rx data | |
| 857 RxBreak beq SavRxDat its a null, go save it... | |
| 1547 | 858 * IFNE H6309 |
| 859 * stf <SigSent clear signal sent flag | |
| 860 * ELSE | |
| 861 * pshs b | |
| 862 * ldb <regWbuf+1 | |
| 863 * stb <SigSent | |
| 864 * puls b | |
| 865 * ENDC | |
| 866 clr <SigSent | |
| 1469 | 867 cmpa <V.INTR interrupt? |
| 868 bne Chk.Quit no, go on... | |
| 869 ldb #S$Intrpt | |
| 870 bra SendSig | |
| 871 | |
| 872 Chk.Quit cmpa <V.QUIT abort? | |
| 873 bne Chk.PChr no, go on... | |
| 874 ldb #S$Abort | |
| 875 SendSig pshs a save Rx data | |
| 876 lda <V.LPRC get last process' ID | |
| 877 os9 F$Send | |
| 878 puls a recover Rx data | |
| 879 stb <SigSent set signal sent flag | |
| 880 bra SavRxDat go save Rx data... | |
| 881 | |
| 882 Chk.PChr cmpa <V.PCHR pause? | |
| 883 bne Chk.Flow no, go on... | |
| 884 ldx <V.DEV2 attached device defined? | |
| 885 beq SavRxDat no, go save Rx data... | |
| 886 sta V.PAUS,x yes, pause attached device | |
| 887 bra SavRxDat go save Rx data... | |
| 888 | |
| 889 Chk.Flow equ * | |
| 890 IFNE H6309 | |
| 891 tim #TxSwFlow,<Wrk.Type Tx data software flow control enabled? | |
| 892 ELSE | |
| 893 pshs a | |
| 894 lda #TxSwFlow | |
| 895 bita <Wrk.Type | |
| 896 puls a | |
| 897 ENDC | |
| 898 beq SavRxDat no, go save Rx data... | |
| 899 cmpa <V.XON XON? | |
| 900 bne Chk.XOff no, go on... | |
| 901 IFNE H6309 | |
| 902 aim #^FCTxXOff,<FloCtlTx clear XOFF received bit | |
| 903 ELSE | |
| 904 pshs a | |
| 905 lda #^FCTxXOff | |
| 906 anda <FloCtlTx | |
| 907 sta <FloCtlTx | |
| 908 puls a | |
| 909 ENDC | |
| 910 bra SetTxFlo go save new Tx flow control flags... | |
| 911 | |
| 912 Chk.XOff cmpa <V.XOFF XOFF? | |
| 913 bne SavRxDat no, go save Rx data... | |
| 914 ldb #FCTxXOff set XOFF received bit | |
| 915 orb <FloCtlTx set software Tx flow control flag | |
| 916 SetTxFlo stb <FloCtlTx save new Tx flow control flags | |
| 917 lbra ChkTrDCD go check DCD transition... | |
| 918 SavRxDat equ * | |
| 919 IFNE H6309 | |
| 920 aim #^FCRxSend,<FloCtlRx clear possible pending XOFF flag | |
| 921 ELSE | |
| 922 pshs a | |
| 923 lda #^FCRxSend | |
| 924 anda <FloCtlRx | |
| 925 sta <FloCtlRx | |
| 926 puls a | |
| 927 ENDC | |
| 928 ldx <RxBufPut get Rx buffer input pointer | |
| 929 IFNE H6309 | |
| 930 ldw <RxDatLen Rx get Rx buffer data length | |
| 931 cmpw <RxBufSiz Rx buffer already full? | |
| 932 ELSE | |
| 933 pshs d | |
| 934 ldd <RxDatLen | |
| 935 std <regWbuf | |
| 936 cmpd <RxBufSiz | |
| 937 puls d | |
| 938 ENDC | |
| 939 blo NotOvFlo no, go skip overflow error... | |
| 940 IFNE H6309 | |
| 941 oim #OvrFloEr,<V.ERR mark RX buffer overflow error | |
| 942 ELSE | |
| 943 ldb #OvrFloEr | |
| 944 orb <V.ERR | |
| 945 stb <V.ERR | |
| 946 ENDC | |
| 947 bra DisRxFlo go ensure Rx is disabled (if possible) | |
| 948 | |
| 949 NotOvFlo sta ,x+ save Rx data | |
| 950 cmpx <RxBufEnd end of Rx buffer? | |
| 951 blo SetLayDn no, go keep laydown pointer | |
| 952 ldx <RxBufPtr get Rx buffer start address | |
| 953 SetLayDn stx <RxBufPut set new Rx data laydown pointer | |
| 954 IFNE H6309 | |
| 955 incw one more byte in Rx buffer | |
| 956 stw <RxDatLen save new Rx data length | |
| 957 cmpw <RxBufMax at or past maximum fill point? | |
| 958 ELSE | |
| 959 pshs d | |
| 960 ldd <regWbuf | |
| 961 addd #1 | |
| 962 std <regWbuf | |
| 963 std <RxDatLen | |
| 964 cmpd <RxBufMax | |
| 965 puls d | |
| 966 ENDC | |
| 967 blo SgnlRxD no, go check Rx data signal... | |
| 968 DisRxFlo ldx <V.PORT | |
| 969 ldb CmdReg,x get current Command register contents | |
| 970 IFNE H6309 | |
| 971 tim #ForceDTR,<Wrk.XTyp forced DTR? | |
| 972 ELSE | |
| 973 lda #ForceDTR | |
| 974 bita <Wrk.XTyp | |
| 975 ENDC | |
| 976 bne DisRxRTS yes, go check RTS disable... | |
| 977 IFNE H6309 | |
| 978 tim #DSRFlow,<Wrk.Type DSR/DTR Flow control? | |
| 979 ELSE | |
| 980 lda #DSRFlow | |
| 981 bita <Wrk.Type | |
| 982 ENDC | |
| 983 beq DisRxRTS no, go check RTS disable | |
| 984 IFNE H6309 | |
| 985 oim #FCRxDTR,<Wrk.Type mark RX disabled due to DTR | |
| 986 ELSE | |
| 987 lda #FCRxDTR | |
| 988 ora <Wrk.Type | |
| 989 sta <Wrk.Type | |
| 990 ENDC | |
| 991 andb #^Cmd.DTR clear (disable) DTR bit | |
| 992 DisRxRTS equ * | |
| 993 IFNE H6309 | |
| 994 tim #RTSFlow,<Wrk.Type | |
| 995 ELSE | |
| 996 lda #RTSFlow | |
| 997 bita <Wrk.Type | |
| 998 ENDC | |
| 999 beq NewRxFlo no, go set new Rx flow control... | |
| 1000 IFNE H6309 | |
| 1001 tim #DSRFlow,<Wrk.Type line break? | |
| 1002 ELSE | |
| 1003 lda #DSRFlow | |
| 1004 bita <Wrk.Type | |
| 1005 ENDC | |
| 1006 bne NewRxFlo yes, go set new Rx flow control... | |
| 1007 IFNE H6309 | |
| 1008 oim #FCRxRTS,<FloCtlRx | |
| 1009 ELSE | |
| 1010 lda #FCRxRTS | |
| 1011 ora <FloCtlRx | |
| 1012 sta <FloCtlRx | |
| 1013 ENDC | |
| 1014 andb #^Cmd.TIRB clear Tx IRQ/RTS/Break control bits (disable RTS) | |
| 1015 NewRxFlo stb CmdReg,x set/clear DTR and RTS in Command register | |
| 1016 IFNE H6309 | |
| 1017 tim #RxSwFlow,<Wrk.Type Rx software flow control? | |
| 1018 ELSE | |
| 1019 ldb <Wrk.Type | |
| 1020 bitb #RxSwFlow | |
| 1021 ENDC | |
| 1022 beq SgnlRxD no, go check Rx data signal... | |
| 1023 lda <V.XOFF XOFF character defined? | |
| 1024 beq SgnlRxD no, go check Rx data signal... | |
| 1025 ldb <FloCtlRx get Rx flow control flags | |
| 1026 bitb #FCRxSent XOFF already sent? | |
| 1027 bne SgnlRxD yes, go check Rx data signal... | |
| 1028 orb #FCRxSend set send XOFF flag | |
| 1029 stb <FloCtlRx set new Rx flow control flags | |
| 1030 IFNE H6309 | |
| 1031 tim #Stat.TxE,StatReg,x | |
| 1032 ELSE | |
| 1033 ldb StatReg,x | |
| 1034 bitb #Stat.TxE | |
| 1035 ENDC | |
| 1036 beq SgnlRxD no, go skip XOFF this time... | |
| 1037 sta DataReg,x write XOFF character | |
| 1038 ldb #FCRxSent set XOFF sent flag | |
| 1039 orb <FloCtlRx mask in current Rx flow control flags | |
| 1040 andb #^FCRxSend clear send XOFF flag | |
| 1041 stb <FloCtlRx save new flow control flags | |
| 1042 SgnlRxD ldb <SigSent already sent abort/interrupt signal? | |
| 1043 bne ChkTrDCD yes, go check DCD transition... | |
| 1044 lda <SSigPID Rx data signal process ID? | |
| 1045 beq ChkTrDCD none, go check DCD transition... | |
| 1046 stb <SSigPID clear Rx data signal | |
| 1047 ldb <SSigSig Rx data signal code | |
| 1048 os9 F$Send | |
| 1049 ChkTrDCD ldx <V.PORT | |
| 1050 lda <Cpy.Stat get Status register copy | |
| 1051 tfr a,b copy it... | |
| 1052 eora <CpyDCDSR mark changes from old DSR+DCD status copy | |
| 1053 andb #Stat.DSR!Stat.DCD clear all but DSR+DCD status | |
| 1054 stb <CpyDCDSR save new DSR+DCD status copy | |
| 1055 bita <Mask.DCD DCD transition? | |
| 1056 beq CkSuspnd no, go check for suspended process... | |
| 1057 bitb <Mask.DCD DCD disabled now? | |
| 1058 beq SgnlDCD no, go check DCD signal... | |
| 1059 lda <Wrk.Type | |
| 1060 bita #MdmKill modem kill enabled? | |
| 1061 beq SgnlDCD no, go on... | |
| 1062 ldx <V.PDLHd path descriptor list header | |
| 1063 beq StCDLost no list, go set DCD lost error... | |
| 1064 lda #PST.DCD DCD lost flag | |
| 1065 PDListLp sta PD.PST,x set path status flag | |
| 1066 ldx PD.PLP,x get next path descriptor in list | |
| 1067 bne PDListLp not end of list, go do another... | |
| 1068 StCDLost lda #DCDLstEr DCD lost error flag | |
| 1069 ora <V.ERR | |
| 1070 sta <V.ERR | |
| 1071 SgnlDCD lda <CDSigPID get process ID, send a DCD signal? | |
| 1072 beq CkSuspnd no, go check for suspended process... | |
| 1073 ldb <CDSigSig get DCD signal code | |
| 1074 clr <CDSigPID clear DCD signal | |
| 1075 os9 F$Send | |
| 1076 | |
| 1077 CkSuspnd clrb clear Carry (for exit) and LSB of process descriptor address | |
| 1078 lda <V.WAKE anybody waiting? ([D]=process descriptor address) | |
| 1079 beq IRQExit no, go return... | |
|
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Code in place for Level 1, but still not working under Level 1
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1080 IFEQ Level-1 |
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Code in place for Level 1, but still not working under Level 1
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1081 clr <V.WAKE |
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50ff40ac6472
Code in place for Level 1, but still not working under Level 1
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1082 ldb #S$Wake |
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Code in place for Level 1, but still not working under Level 1
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1083 os9 F$Send |
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Code in place for Level 1, but still not working under Level 1
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1084 ELSE |
| 1469 | 1085 stb <V.WAKE mark I/O done |
| 1086 tfr d,x copy process descriptor pointer | |
| 1087 lda P$State,x get state flags | |
| 1088 anda #^Suspend clear suspend state | |
| 1089 sta P$State,x save state flags | |
| 1090 ENDC | |
| 1091 IRQExit puls dp,pc recover system DP, return... | |
| 1092 | |
| 1093 emod | |
| 1094 ModSize equ * | |
| 1095 end | |
| 1096 |