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comparison level2/coco3/bootfiles/makefile @ 3142:0413a77a3686

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Build various CoCo3FPGA boot files Allow booting from DriveWire, CoCo3FPGA SD card, and from ROM. Added "RBCOCOFPGA = $(MD)/rbsuper.dr $(MD)/llcoco3fpga.dr $(MD)/sd1_coco3fpga.dd" to the "level2/coco3/bootfiles/makefile " to faciliate the new Coco3FPGA bootfiles. Added "BOOTFILE_COCO3FPGA", "BOOTFILE_COCO3FPGA_SD", "BOOTFILE_COCO3FPGA_ROM", & "BOOTFILE_COCO3FPGA_ROM_DW" to the "level2/coco3/bootfiles/makefile " - Bootfile descriptions as needed for specific Coco3FPGA bootfiles. Added "bootfile_coco3fpga", "bootfile_coco3fpga_sd", "bootfile_coco3fpga_rom", and "bootfile_coco3fpga_rom_dw" to "level2/coco3/bootfiles/makefile" - BOOTFILES section to add the files to the modules for making coco3fpga bootfiles in NitrOS9. Added "bootfile_coco3fpga", "bootfile_coco3fpga_sd", "bootfile_coco3fpga_rom", "bootfile_coco3fpga_rom_dw" and their flags to the "level2/coco3/bootfiles/makefile " - "#Bootfiles" directives section for making Coco3FPGA bootfiles.
author Bill Pierce <merlinious999@gmail.com>
date Sat, 04 Feb 2017 18:33:01 +0100
parents 5095f2b3c81a
children d5c884d63e53
comparison
equal deleted inserted replaced
3141:717ced83b885 3142:0413a77a3686
51 $(MD)/sd0_cocosdc.dd $(MD)/sd1_cocosdc.dd 51 $(MD)/sd0_cocosdc.dd $(MD)/sd1_cocosdc.dd
52 RBDWARDUINO = $(MD)/rbdw.dr $(MD)/dwio_arduino.sb \ 52 RBDWARDUINO = $(MD)/rbdw.dr $(MD)/dwio_arduino.sb \
53 $(MD)/x1.dd $(MD)/x2.dd $(MD)/x3.dd 53 $(MD)/x1.dd $(MD)/x2.dd $(MD)/x3.dd
54 RBDWBECKER = $(MD)/rbdw.dr $(MD)/dwio_becker.sb \ 54 RBDWBECKER = $(MD)/rbdw.dr $(MD)/dwio_becker.sb \
55 $(MD)/x1.dd $(MD)/x2.dd $(MD)/x3.dd 55 $(MD)/x1.dd $(MD)/x2.dd $(MD)/x3.dd
56 RBCOCO3FPGA = $(MD)/rbsuper.dr $(MD)/llcoco3fpga.dr \
57 $(MD)/sd1_coco3fpga.dd
58
56 SCDWV_NET = $(MD)/n_scdwv.dd $(MD)/n1_scdwv.dd $(MD)/n2_scdwv.dd \ 59 SCDWV_NET = $(MD)/n_scdwv.dd $(MD)/n1_scdwv.dd $(MD)/n2_scdwv.dd \
57 $(MD)/n3_scdwv.dd $(MD)/n4_scdwv.dd $(MD)/n5_scdwv.dd \ 60 $(MD)/n3_scdwv.dd $(MD)/n4_scdwv.dd $(MD)/n5_scdwv.dd \
58 $(MD)/n6_scdwv.dd $(MD)/n7_scdwv.dd $(MD)/n8_scdwv.dd \ 61 $(MD)/n6_scdwv.dd $(MD)/n7_scdwv.dd $(MD)/n8_scdwv.dd \
59 $(MD)/n9_scdwv.dd $(MD)/n10_scdwv.dd $(MD)/n11_scdwv.dd \ 62 $(MD)/n9_scdwv.dd $(MD)/n10_scdwv.dd $(MD)/n11_scdwv.dd \
60 $(MD)/n12_scdwv.dd $(MD)/n13_scdwv.dd $(MD)/midi_scdwv.dd 63 $(MD)/n12_scdwv.dd $(MD)/n13_scdwv.dd $(MD)/midi_scdwv.dd
67 CLOCK60HZ = $(MD)/clock_60hz $(MD)/clock2_soft 70 CLOCK60HZ = $(MD)/clock_60hz $(MD)/clock2_soft
68 CLOCK60HZDW = $(MD)/clock_60hz $(MD)/clock2_dw 71 CLOCK60HZDW = $(MD)/clock_60hz $(MD)/clock2_dw
69 72
70 # NitrOS-9 disk bootfile to allow booting from DriveWire server 73 # NitrOS-9 disk bootfile to allow booting from DriveWire server
71 # on a DE1 or Xilinx using Gary Becker's CoCo 3 FGPA 74 # on a DE1 or Xilinx using Gary Becker's CoCo 3 FGPA
75 BOOTFILE_COCO3FPGA = $(MD)/krnp2 $(MD)/ioman $(MD)/init \
76 $(MD)/rbf.mn \
77 $(RBDWBECKER) \
78 $(MD)/ddx0.dd \
79 $(RBCOCO3FPGA) \
80 $(MD)/sd0_coco3fpga.dd\
81 $(MD)/scf.mn \
82 $(VTIO_COWIN_80) \
83 $(MD)/scdwv.dr \
84 $(SCDWV_NET) \
85 $(SCDWV_WIN) \
86 $(SCDWP) \
87 $(PIPE) \
88 $(CLOCK60HZDW)
89
90 BOOTFILE_COCO3FPGA_SD = $(MD)/krnp2 $(MD)/ioman $(MD)/init \
91 $(MD)/rbf.mn \
92 $(RBDWBECKER) \
93 $(MD)/x0.dd \
94 $(RBCOCO3FPGA) \
95 $(MD)/ddsd0_coco3fpga.dd\
96 $(MD)/scf.mn \
97 $(VTIO_COWIN_80) \
98 $(MD)/scdwv.dr \
99 $(SCDWV_NET) \
100 $(SCDWV_WIN) \
101 $(SCDWP) \
102 $(PIPE) \
103 $(CLOCK60HZDW)
104
105 BOOTFILE_COCO3FPGA_ROM = $(MD)/krnp2 $(MD)/ioman $(MD)/init \
106 $(MD)/rbf.mn \
107 $(RBDWBECKER) \
108 $(MD)/x0.dd \
109 $(RBCOCO3FPGA) \
110 $(MD)/ddsd0_coco3fpga.dd\
111 $(MD)/scf.mn \
112 $(VTIO_COWIN_80) \
113 $(MD)/scdwv.dr \
114 $(SCDWV_NET) \
115 $(SCDWV_WIN) \
116 $(SCDWP) \
117 $(PIPE) \
118 $(CLOCK60HZ)
119
120 BOOTFILE_COCO3FPGA_ROM_DW = $(MD)/krnp2 $(MD)/ioman $(MD)/init \
121 $(MD)/rbf.mn \
122 $(RBDWBECKER) \
123 $(MD)/x0.dd \
124 $(RBCOCO3FPGA) \
125 $(MD)/ddsd0_coco3fpga.dd\
126 $(MD)/scf.mn \
127 $(VTIO_COWIN_80) \
128 $(MD)/scdwv.dr \
129 $(SCDWV_NET) \
130 $(SCDWV_WIN) \
131 $(SCDWP) \
132 $(PIPE) \
133 $(CLOCK60HZDW)
134
72 BOOTFILE_BECKER = $(MD)/krnp2 $(MD)/ioman $(MD)/init \ 135 BOOTFILE_BECKER = $(MD)/krnp2 $(MD)/ioman $(MD)/init \
73 $(MD)/rbf.mn \ 136 $(MD)/rbf.mn \
74 $(RBDWBECKER) \ 137 $(RBDWBECKER) \
75 $(MD)/ddx0.dd \ 138 $(MD)/ddx0.dd \
76 $(FLOPPY_40D) \ 139 $(FLOPPY_40D) \
222 $(CLOCK50HZ) 285 $(CLOCK50HZ)
223 286
224 BOOTFILES = bootfile_40d bootfile_40d_50hz bootfile_80d \ 287 BOOTFILES = bootfile_40d bootfile_40d_50hz bootfile_80d \
225 bootfile_80d_50hz bootfile_dw bootfile_dw_headless \ 288 bootfile_80d_50hz bootfile_dw bootfile_dw_headless \
226 bootfile_becker bootfile_arduino bootfile_becker_headless \ 289 bootfile_becker bootfile_arduino bootfile_becker_headless \
227 bootfile_arduino_headless bootfile_cocosdc bootfile_ide 290 bootfile_arduino_headless bootfile_cocosdc bootfile_ide \
291 bootfile_coco3fpga bootfile_coco3fpga_sd \
292 bootfile_coco3fpga_rom bootfile_coco3fpga_rom_dw
293
228 KERNELS = kernel_1773 kernel_1773_50hz kernel_dw kernel_becker \ 294 KERNELS = kernel_1773 kernel_1773_50hz kernel_dw kernel_becker \
229 kernel_arduino kernel_cocosdc kernel_ide kernel_dide 295 kernel_arduino kernel_cocosdc kernel_ide kernel_dide
230 296
231 ALLOBJS = $(BOOTFILES) $(KERNELS) 297 ALLOBJS = $(BOOTFILES) $(KERNELS)
232 298
233 all: $(ALLOBJS) 299 all: $(ALLOBJS)
234 300
235 # Bootfiles 301 # Bootfiles
302 bootfile_coco3fpga: $(BOOTFILE_COCO3FPGA) $(DEPENDS)
303 $(MERGE) $(BOOTFILE_COCO3FPGA)>$@
304
305 bootfile_coco3fpga_sd: $(BOOTFILE_COCO3FPGA_SD) $(DEPENDS)
306 $(MERGE) $(BOOTFILE_COCO3FPGA_SD)>$@
307
308 bootfile_coco3fpga_rom: $(BOOTFILE_COCO3FPGA_ROM) $(DEPENDS)
309 $(MERGE) $(BOOTFILE_COCO3FPGA_ROM)>$@
310
311 bootfile_coco3fpga_rom_dw: $(BOOTFILE_COCO3FPGA_ROM_DW) $(DEPENDS)
312 $(MERGE) $(BOOTFILE_COCO3FPGA_ROM_DW)>$@
313
236 bootfile_becker: $(BOOTFILE_BECKER) $(DEPENDS) 314 bootfile_becker: $(BOOTFILE_BECKER) $(DEPENDS)
237 $(MERGE) $(BOOTFILE_BECKER)>$@ 315 $(MERGE) $(BOOTFILE_BECKER)>$@
238 316
239 bootfile_arduino: $(BOOTFILE_ARDUINO) $(DEPENDS) 317 bootfile_arduino: $(BOOTFILE_ARDUINO) $(DEPENDS)
240 $(MERGE) $(BOOTFILE_ARDUINO)>$@ 318 $(MERGE) $(BOOTFILE_ARDUINO)>$@