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comparison level1/modules/boot_dw.asm @ 2724:05b648103e78 lwtools-port

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Renamed dw3.sb to dwio.sb and rbdw3 to rbdw
author Boisy Pitre <boisy.pitre@nuance.com>
date Mon, 30 Jul 2012 19:35:05 -0500
parents level1/modules/boot_dw3.asm@b8c7b7fbf3c9
children ce3dba57003b
comparison
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2723:22bdfbe8bc68 2724:05b648103e78
1 ********************************************************************
2 * Boot - DriveWire 3 Boot Module
3 *
4 * $Id$
5 *
6 * Edt/Rev YYYY/MM/DD Modified by
7 * Comment
8 * ------------------------------------------------------------------
9 * 1 2008/02/09 Boisy G. Pitre
10 * Created.
11
12 NAM Boot
13 TTL DriveWire Boot Module
14
15 IFP1
16 USE defsfile
17 USE drivewire.d
18 ENDC
19
20 tylg SET Systm+Objct
21 atrv SET ReEnt+rev
22 rev SET 0
23 edition SET 1
24
25 MOD eom,name,tylg,atrv,start,size
26
27 * on-stack buffer to use
28 ORG 0
29 seglist RMB 2 pointer to segment list
30 blockloc RMB 2 pointer to memory requested
31 blockimg RMB 2 duplicate of the above
32 bootloc RMB 3 sector pointer; not byte pointer
33 bootsize RMB 2 size in bytes
34 LSN0Ptr RMB 2 LSN0 pointer
35 size EQU .
36
37 name EQU *
38 FCS /Boot/
39 FCB edition
40
41
42 * Common booter-required defines
43 LSN24BIT EQU 1
44 FLOPPY EQU 0
45
46
47 USE boot_common.asm
48
49
50 ************************************************************
51 ************************************************************
52 * Hardware-Specific Booter Area *
53 ************************************************************
54 ************************************************************
55
56 * HWInit - Initialize the device
57 * Entry: Y = hardware address
58 * Exit: Carry Clear = OK, Set = Error
59 * B = error (Carry Set)
60 HWInit
61 * Set up DDR for side B
62 * ldx #PIA1Base get base address of PIA
63 * ldb 3,x
64 * andb #%11111011
65 * stb 3,x
66 * lda #%11111010
67 * sta 2,x
68 * orb #%00000100
69 * stb 3,x
70
71 * Set up DDR for side A
72 * ldb 1,x
73 * andb #%11111011
74 * stb 1,x $FF20 is now Data Direction Register
75 * lda #%11111110 data direction bits (1=out, 0=in)
76 * sta ,x tell HW
77 * orb #%00000100 reset $FF20 to I/O register
78 * stb 1,x $FF20 is now Data Direction Register
79 HWTerm clrb
80 rts
81
82
83 * HWRead - Read a 256 byte sector from the device
84 * Entry: Y = hardware address
85 * B = bits 23-16 of LSN
86 * X = bits 15-0 of LSN
87 * blockloc,u = ptr to 256 byte sector
88 * Exit: X = ptr to data (i.e. ptr in blockloc,u)
89 HWRead
90 pshs cc,d,x
91 * Send out op code and 3 byte LSN
92 lda #OP_READEX load A with READ opcode
93 Read2 ldb WhichDrv,pcr
94 std ,s
95 leax ,s
96 ldy #5
97 lbsr DWWrite send it to server
98 * Get 256 bytes of sector data
99 ldx blockloc,u
100 ldy #256
101 bsr DWRead read bytes from server
102 bcs ReadEr branch if framing error
103 bne ReadEr2
104
105 * Send two byte checksum
106 pshs y
107 leax ,s
108 ldy #2
109 lbsr DWWrite
110 ldy #1
111 bsr DWRead
112 leas 2,s
113 bcs ReadEx
114 bne ReadEr2
115 ldb ,s
116 beq ReadEx
117 cmpb #E_CRC
118 bne ReadEr
119 lda #OP_REREADEX
120 bra Read2
121 ReadEx EQU *
122 leas 5,s eat stack
123 ldx blockloc,u
124 clrb
125 rts
126 ReadEr2 ldb #E$Read
127 ReadEr
128 leas 5,s eat stack
129 orcc #Carry
130 rts
131
132 USE dwread.asm
133 USE dwwrite.asm
134
135 IFGT Level-1
136 Pad FILL $39,$1D0-3-2-1-*
137 ENDC
138
139 Address FDB $0000
140 WhichDrv FCB $00
141 EMOD
142 eom EQU *
143 END