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comparison level2/coco3/modules/makefile @ 3150:37737e5ec640

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Add coco3fpga RAM disk and RTC driver Added clock2_coco3fpga.as to level1/modules. Added ramd_coco3fpga.asm & r0_ramd_coco3fpga.asm to level2/modules. Build them on level2/coco3. Added definitions to "coco3/modules/makefile" to build 'ramd_coco3fpga.dr", "r0_ramd_cocofga.dd" & "clock2_coco3fpga".
author Bill Pierce <merlinious999@gmail.com>
date Mon, 06 Feb 2017 22:25:15 +0100
parents 717ced83b885
children 1d905c091f7b
comparison
equal deleted inserted replaced
3149:afd0f7d9b514 3150:37737e5ec640
12 CLOCKHARRIS = -DRTCHarrs=1 12 CLOCKHARRIS = -DRTCHarrs=1
13 CLOCKCLOUD9 = -DRTCCloud9=1 13 CLOCKCLOUD9 = -DRTCCloud9=1
14 CLOCKSOFT = -DRTCSoft=1 14 CLOCKSOFT = -DRTCSoft=1
15 CLOCKMESSEMU = -DRTCMessEmu=1 15 CLOCKMESSEMU = -DRTCMessEmu=1
16 CLOCKJVEMU = -DRTCJVEmu=1 16 CLOCKJVEMU = -DRTCJVEmu=1
17 CLOCKCOCO3FPGA = -DRTCCoco3CPGA=1
17 TC3FLAGS = $(AFLAGS) -DTC3=1 $(FLAGS) 18 TC3FLAGS = $(AFLAGS) -DTC3=1 $(FLAGS)
18 IDEFLAGS = $(AFLAGS) -DIDE=1 $(FLAGS) 19 IDEFLAGS = $(AFLAGS) -DIDE=1 $(FLAGS)
19 SDFLAGS = $(AFLAGS) -DCOCOSDC=1 -DITTYP=128 $(FLAGS) 20 SDFLAGS = $(AFLAGS) -DCOCOSDC=1 -DITTYP=128 $(FLAGS)
20 CC3FPGAFLAGS = $(AFLAGS) -DCC3FPGA=1 $(FLAGS) 21 CC3FPGAFLAGS = $(AFLAGS) -DCC3FPGA=1 $(FLAGS)
21 22
29 KERNEL = krnp2 krnp3_perr krnp4_regdump ccbkrn 30 KERNEL = krnp2 krnp3_perr krnp4_regdump ccbkrn
30 SYSMODS = ioman init sysgo_h0 sysgo_dd sysgo_rom sysgo_bd rominfo vectors 31 SYSMODS = ioman init sysgo_h0 sysgo_dd sysgo_rom sysgo_bd rominfo vectors
31 CLOCKS = clock_60hz clock_50hz \ 32 CLOCKS = clock_60hz clock_50hz \
32 clock2_elim clock2_disto2 clock2_disto4 clock2_bnb \ 33 clock2_elim clock2_disto2 clock2_disto4 clock2_bnb \
33 clock2_smart clock2_harris clock2_cloud9 clock2_soft \ 34 clock2_smart clock2_harris clock2_cloud9 clock2_soft \
34 clock2_jvemu clock2_messemu clock2_dw 35 clock2_jvemu clock2_messemu clock2_dw clock2_coco3fpga
35 36
36 RBF = rbf.mn \ 37 RBF = rbf.mn \
37 rbdw.dr dwio.sb dwio_becker.sb dwio_arduino.sb \ 38 rbdw.dr dwio.sb dwio_becker.sb dwio_arduino.sb \
38 rb1773.dr rb1773_scii_ff74.dr rb1773_scii_ff58.dr \ 39 rb1773.dr rb1773_scii_ff74.dr rb1773_scii_ff58.dr \
39 d0_35s.dd d1_35s.dd d2_35s.dd d3_35s.dd \ 40 d0_35s.dd d1_35s.dd d2_35s.dd d3_35s.dd \
47 rbsuper.dr lltc3.dr llide.dr llcocosdc.dr \ 48 rbsuper.dr lltc3.dr llide.dr llcocosdc.dr \
48 ddi0_ide.dd i0_ide.dd i1_ide.dd ih_ide.dd \ 49 ddi0_ide.dd i0_ide.dd i1_ide.dd ih_ide.dd \
49 dds0_tc3.dd s0_tc3.dd s1_tc3.dd s2_tc3.dd s3_tc3.dd s4_tc3.dd \ 50 dds0_tc3.dd s0_tc3.dd s1_tc3.dd s2_tc3.dd s3_tc3.dd s4_tc3.dd \
50 s5_tc3.dd s6_tc3.dd sh_tc3.dd \ 51 s5_tc3.dd s6_tc3.dd sh_tc3.dd \
51 ddsd0_cocosdc.dd sd0_cocosdc.dd sd1_cocosdc.dd \ 52 ddsd0_cocosdc.dd sd0_cocosdc.dd sd1_cocosdc.dd \
52 llcoco3fpga.dr ddsd0_coco3fpga.dd sd0_coco3fpga.dd sd1_coco3fpga.dd 53 llcoco3fpga.dr ddsd0_coco3fpga.dd sd0_coco3fpga.dd sd1_coco3fpga.dd \
54 ramd_coco3fpga.dr r0_ramd_coco3fpga.dd
53 55
54 SCF = scf.mn \ 56 SCF = scf.mn \
55 vtio.dr vrn.dr scbbp.dr scbbt.dr scdwp.dr sspak.dr sc6551.dr \ 57 vtio.dr vrn.dr scbbp.dr scbbt.dr scdwp.dr sspak.dr sc6551.dr \
56 cowin.io cogrf.io covdg.io covdg_small.io \ 58 cowin.io cogrf.io covdg.io covdg_small.io \
57 keydrv_cc3.sb snddrv_cc3.sb \ 59 keydrv_cc3.sb snddrv_cc3.sb \
255 $(AS) $< $(ASOUT)$@ $(AFLAGS) -DRAMSize=192 257 $(AS) $< $(ASOUT)$@ $(AFLAGS) -DRAMSize=192
256 258
257 ddr0_192k.dd: r0.asm 259 ddr0_192k.dd: r0.asm
258 $(AS) $< $(ASOUT)$@ $(AFLAGS) -DRAMSize=192 -DDD=1 260 $(AS) $< $(ASOUT)$@ $(AFLAGS) -DRAMSize=192 -DDD=1
259 261
262 # Coco3fpga ramd descriptors
263 r0_ramd_coco3fpga.dd: ramddesc_coco3fpga.asm
264 $(AS) $< $(ASOUT)$@ $(AFLAGS)
265
260 # DriveWire SCF descriptors 266 # DriveWire SCF descriptors
261 term_scdwv.dt: scdwvdesc.asm 267 term_scdwv.dt: scdwvdesc.asm
262 $(AS) $< $(ASOUT)$@ $(AFLAGS) -DAddr=0 268 $(AS) $< $(ASOUT)$@ $(AFLAGS) -DAddr=0
263 269
264 n_scdwv.dd: scdwvdesc.asm 270 n_scdwv.dd: scdwvdesc.asm