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comparison level1/atari/bootroms/liber809.asm @ 2627:56876a9752b9

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Added liber809 ROM
author Boisy Pitre <boisy.pitre@nuance.com>
date Sat, 25 Feb 2012 18:53:18 -0600
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children 65b1b5c80fec
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2626:cff23b8fc512 2627:56876a9752b9
1 *****************************************************
2 *
3 * Boot ROM for the 6809-based Atari XL/XE
4 * Currently DriveWire based
5 *
6 * (C) 2012 Boisy G. Pitre
7 *
8
9 use atari.d
10 use drivewire.d
11
12 RAMDest EQU $4000 location of routine copied to RAM
13
14 org $F000
15
16
17
18 *******************************************************
19 * ROM CODE
20 *
21 * This code is run from ROM
22 *
23 * ENTRY POINT!
24 RESETVct
25 * mask interrupts, then prepare to copy routine into RAM
26 orcc #$50
27 clr D.IRQENSHDW DW routines use this low-mem global, so we clear it
28 leax Target,pcr
29 ldu #RAMDest
30 ldy #TargetL
31
32 * copy over the target routine from ROM into RAM
33 loop@
34 lda ,x+
35 sta ,u+
36 leay -1,y
37 bne loop@
38 * this is our jumping off point into the RAM routine
39 jmp RAMDest
40
41
42 *******************************************************
43 * RAM CODE
44 *
45 * This code is copied to lower RAM and executed there.
46 *
47 Target
48 * setup the stack and the Atari hardware
49 lds #$0100
50 lbsr ClearIO
51 lbsr SetupPIA
52 lbsr SetupPOKEY
53 lbsr SetupSerial
54 lbsr SetupANTIC
55
56 * Put Atari into All RAM mode
57 clr $D40E
58 clr $D20E
59 lda #%11111110 $8000-$CFFF, $D800-$FFFF RAM!!!
60 sta PORTB
61 IFNE TEST_RAM_MODE
62 TESTADDR equ $5000
63 ldx #$0013
64 stx TESTADDR
65 ldx TESTADDR
66 cmpx #$0013
67 lbne green
68 ENDC
69
70 ldx #$8000
71 ldy #$0000
72 ReadLoop
73 * bsr Wait
74 * Send Read Command
75 cmpy #$0050
76 bne keepon
77 leax $800,x
78 leay 8,y skip sectors $50-$57 ($D000-$D7FFF)
79 keepon
80 pshs x,y
81 pshs y
82 ldd #$0000
83 pshs d
84 lda #OP_READEX
85 pshs a
86 leax ,s
87 ldy #$0005
88 lbsr Write
89 leas 5,s
90
91 * Get Sector Data
92 ldy #$100
93 ldx ,s
94 clra
95 lbsr Read
96 bcs readerr
97
98 * Send CRC
99 pshs y
100 leax ,s
101 ldy #$0002
102 lbsr Write
103 leas 2,s
104
105 * Get Error Code
106 pshs a
107 leax ,s
108 ldy #$0001
109 clra
110 lbsr Read
111 puls a,x,y
112 bcs readerr
113 tsta
114 bne ReadLoop
115 leax $100,x
116 leay 1,y
117 cmpx #$0000
118 bne ReadLoop
119 ldx -2,x
120
121 jmp [>$FFFE]
122
123 checkerr
124 * redo transfer
125 leax -$100,x
126 leay -1,y
127 bra ReadLoop
128
129 readerr
130
131 green clra
132 gl@ inca
133 sta COLBK
134 lbsr Wait
135 cmpx ,s
136 bra gl@
137
138 SetupPIA
139 LDA #$38 ;LOOK AT DATA DIRECTION REGISTERS IN PIA
140 STA PACTL
141 STA PBCTL
142 LDA #0 ;MAKE ALL INPUTS
143 STA PORTA
144 LDA #$FF ;MAKE ALL OUTPUTS
145 STA PORTB
146 LDA #$3C ;BACK TO PORTS
147 STA PACTL
148 STA PBCTL
149 rts
150
151 * clear the I/O space between $D000-$D3FFF
152 ClearIO
153 clrb
154 loop
155 ldx #$D000
156 clr b,x
157 ldx #$D200
158 clr b,x
159 ldx #$D300
160 clr b,x
161 ldx #$D400
162 clr b,x
163 decb
164 bne loop
165 rts
166
167
168 * setup POKEY here
169 SetupPOKEY
170 lda #3
171 sta $D20F ; set POKEY to active
172 rts
173
174
175 SetupSerial
176 ldd #$1000 initialize POKEY to ~38.4K
177 * ldd #$2800 initialize POKEY to ~19.2K
178 std AUDF3
179
180 lda #$23
181 sta SKCTL
182
183 lda #$28 clock ch. 3 with 1.79 MHz, ch. 4 with ch. 3
184 sta AUDCTL set audio control
185 rts
186
187 * setup ANTIC here
188 SetupANTIC
189 lda #$46
190 sta COLBK
191 rts
192
193
194 * DriveWire read/write routines
195 use dwread.asm
196
197 use dwwrite.asm
198
199 * Unused vectors routed here
200 SWI3Vct
201 SWI2Vct
202 FIRQVct
203 IRQVct
204 SWIVct
205 NMIVct
206 rti
207
208 * End of our RAM-based routine
209 TargetL equ *-Target
210
211
212
213 * 6809 Vectors - these go at the very last 16 bytes of ROM
214 fill $FF,$FFF0-*
215 fdb $0000 Reserved
216 fdb SWI3Vct SWI3
217 fdb SWI2Vct SWI2
218 fdb FIRQVct /FIRQ
219 fdb IRQVct /IRQ
220 fdb SWIVct SWI
221 fdb NMIVct /NMI
222 fdb RESETVct /RESET