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comparison level2/coco3_6309/modules/makefile @ 2180:660cc987e18d

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Added DriveWire 3 modules to distribution
author boisy
date Sat, 07 Mar 2009 20:04:42 +0000
parents 755b1b8ea019
children 2a889a511f0a
comparison
equal deleted inserted replaced
2179:6a7746370ffd 2180:660cc987e18d
18 18
19 DEPENDS = ./makefile 19 DEPENDS = ./makefile
20 TPB = ../../3rdparty/booters 20 TPB = ../../3rdparty/booters
21 21
22 BOOTERS = boot_1773_6ms boot_1773_30ms \ 22 BOOTERS = boot_1773_6ms boot_1773_30ms \
23 boot_burke boot_rampak boot_wd1002 23 boot_burke boot_rampak boot_wd1002 boot_dw3
24 BOOTTRACK = rel_32 rel_40 rel_80 rel_32_50hz rel_40_50hz rel_80_50hz $(BOOTERS) krn 24 BOOTTRACK = rel_32 rel_40 rel_80 rel_32_50hz rel_40_50hz rel_80_50hz $(BOOTERS) krn
25 KERNEL = krnp2 krnp3_perr krnp4_regdump 25 KERNEL = krnp2 krnp3_perr krnp4_regdump
26 SYSMODS = ioman init sysgo_h0 sysgo_dd 26 SYSMODS = ioman init sysgo_h0 sysgo_dd
27 CLOCKS = clock_60hz clock_50hz \ 27 CLOCKS = clock_60hz clock_50hz \
28 clock2_elim clock2_disto2 clock2_disto4 clock2_bnb \ 28 clock2_elim clock2_disto2 clock2_disto4 clock2_bnb \
29 clock2_smart clock2_harris clock2_cloud9 clock2_soft \ 29 clock2_smart clock2_harris clock2_cloud9 clock2_soft \
30 clock2_jvemu clock2_messemu 30 clock2_jvemu clock2_messemu clock2_dw3
31 31
32 RBF = rbf.mn \ 32 RBF = rbf.mn \
33 rbdw3.dr dw3.sb \
33 rb1773.dr rb1773_scii_ff74.dr rb1773_scii_ff58.dr \ 34 rb1773.dr rb1773_scii_ff74.dr rb1773_scii_ff58.dr \
34 d0_35s.dd d1_35s.dd d2_35s.dd d3_35s.dd \ 35 d0_35s.dd d1_35s.dd d2_35s.dd d3_35s.dd \
35 d0_40d.dd d1_40d.dd d2_40d.dd d0_80d.dd \ 36 d0_40d.dd d1_40d.dd d2_40d.dd d0_80d.dd \
36 d1_80d.dd d2_80d.dd \ 37 d1_80d.dd d2_80d.dd \
37 ddd0_35s.dd ddd0_40d.dd ddd0_80d.dd \ 38 ddd0_35s.dd ddd0_40d.dd ddd0_80d.dd \
38 rammer.dr r0_8k.dd r0_96k.dd r0_128k.dd r0_192k.dd \ 39 rammer.dr r0_8k.dd r0_96k.dd r0_128k.dd r0_192k.dd \
39 ddr0_8k.dd ddr0_96k.dd ddr0_128k.dd ddr0_192k.dd md.dd 40 ddr0_8k.dd ddr0_96k.dd ddr0_128k.dd ddr0_192k.dd md.dd \
41 ddx0.dd x0.dd x1.dd x2.dd x3.dd
40 42
41 43
42 SCF = scf.mn \ 44 SCF = scf.mn \
43 vtio.dr vrn.dr scbbp.dr scbbt.dr sspak.dr sc6551.dr \ 45 vtio.dr vrn.dr scbbp.dr scbbt.dr scdwp.dr sspak.dr sc6551.dr \
44 cowin.io cogrf.io covdg.io covdg_small.io \ 46 cowin.io cogrf.io covdg.io covdg_small.io \
45 keydrv_cc3.sb snddrv_cc3.sb \ 47 keydrv_cc3.sb snddrv_cc3.sb \
46 joydrv_joy.sb joydrv_6551L.sb joydrv_6552L.sb \ 48 joydrv_joy.sb joydrv_6551L.sb joydrv_6552L.sb \
47 joydrv_6551M.sb joydrv_6552M.sb \ 49 joydrv_6551M.sb joydrv_6552M.sb \
48 nil.dd p_scbbp.dd \ 50 nil.dd p_scbbp.dd p_scdwp.dd \
49 t1_scbbt.dd t2_sc6551.dd t3_sc6551.dd \ 51 t1_scbbt.dd t2_sc6551.dd t3_sc6551.dd \
50 ftdd.dd vi.dd ssp.dd term_scbbt.dt term_sc6551.dt \ 52 ftdd.dd vi.dd ssp.dd term_scbbt.dt term_sc6551.dt \
51 term_vdg.dt term_win40.dt term_win80.dt w.dw w1.dw w2.dw \ 53 term_vdg.dt term_win40.dt term_win80.dt w.dw w1.dw w2.dw \
52 w3.dw w4.dw w5.dw w6.dw w7.dw \ 54 w3.dw w4.dw w5.dw w6.dw w7.dw \
53 w8.dw w9.dw w10.dw w11.dw w12.dw w13.dw w14.dw w15.dw \ 55 w8.dw w9.dw w10.dw w11.dw w12.dw w13.dw w14.dw w15.dw \
186 $(AS) $< $(ASOUT)$@ $(AFLAGS) -aRAMSize=192 188 $(AS) $< $(ASOUT)$@ $(AFLAGS) -aRAMSize=192
187 189
188 ddr0_192k.dd: r0.asm 190 ddr0_192k.dd: r0.asm
189 $(AS) $< $(ASOUT)$@ $(AFLAGS) -aRAMSize=192 -aDD=1 191 $(AS) $< $(ASOUT)$@ $(AFLAGS) -aRAMSize=192 -aDD=1
190 192
193 # DriveWire 3 descriptors
194 ddx0.dd: dwdesc.asm
195 $(AS) $< $(ASOUT)$@ $(AFLAGS) -aDD=1 -aDNum=0
196
197 x0.dd: dwdesc.asm
198 $(AS) $< $(ASOUT)$@ $(AFLAGS) -aDNum=0
199
200 x1.dd: dwdesc.asm
201 $(AS) $< $(ASOUT)$@ $(AFLAGS) -aDNum=1
202
203 x2.dd: dwdesc.asm
204 $(AS) $< $(ASOUT)$@ $(AFLAGS) -aDNum=2
205
206 x3.dd: dwdesc.asm
207 $(AS) $< $(ASOUT)$@ $(AFLAGS) -aDNum=3
208
191 # VDGInt Modules 209 # VDGInt Modules
192 covdg.io: covdg.asm 210 covdg.io: covdg.asm
193 $(AS) $(AFLAGS) $(ASOUT)$@ $< -aCOCO2=1 211 $(AS) $(AFLAGS) $(ASOUT)$@ $< -aCOCO2=1
194 212
195 covdg_small.io: covdg.asm 213 covdg_small.io: covdg.asm