Mercurial > hg > Members > kono > nitros9-code
comparison level2/modules/xacia.asm @ 0:6641a883d6b0
Initial revision
author | boisy |
---|---|
date | Thu, 04 Apr 2002 16:34:12 +0000 |
parents | |
children | d603059f2b9a |
comparison
equal
deleted
inserted
replaced
-1:000000000000 | 0:6641a883d6b0 |
---|---|
1 ******************************************************************** | |
2 * XACIA - Enhanced 6551 driver | |
3 * | |
4 * $Id$ | |
5 * | |
6 * Ed. Comments Who YY/MM/DD | |
7 * ------------------------------------------------------------------ | |
8 * 10 Bruce Isted distribution version BRI | |
9 | |
10 nam XACIA | |
11 ttl Enhanced 6551 driver | |
12 | |
13 ifp1 | |
14 use defsfile | |
15 use scfdefs | |
16 endc | |
17 | |
18 * miscellaneous definitions | |
19 DCDStBit equ %00100000 DCD status bit for SS.CDSta call | |
20 DSRStBit equ %01000000 DSR status bit for SS.CDSta call | |
21 Edtn equ 10 | |
22 TkPerSec equ 60 system clock ticks per second | |
23 Vrsn equ 1 | |
24 | |
25 * conditional assembly flags | |
26 *A6551 set true 6551 SACIA version | |
27 *A6552 set false 65C52 DACIA version | |
28 SlpBreak set TkPerSec/2+1 line Break duration | |
29 SlpHngUp set TkPerSec/4+1 hang up (drop DTR) duration | |
30 | |
31 ifeq A6552-true | |
32 nam DACIA | |
33 ttl 65C52 Dual ACIA driver | |
34 else | |
35 | |
36 ifeq A6551-true | |
37 nam SACIA | |
38 ttl 6551 Single ACIA driver | |
39 endc | |
40 endc | |
41 | |
42 ifeq A6552-true | |
43 * 65C52 register definitions | |
44 org 0 | |
45 ISReg rmb 1 IRQ Status (read only) | |
46 IEReg equ ISReg IRQ Enable (write only) | |
47 CSReg rmb 1 Control Status (read only) | |
48 CFReg equ CSReg Control/Format (write only) | |
49 CDReg rmb 1 Compare Data (write only, unused in this driver) | |
50 TBReg equ CDReg Transmit Break (write only) | |
51 DataReg rmb 1 receive/transmit Data (read Rx / write Tx) | |
52 | |
53 * IRQ Status/Enable bit definitions | |
54 ISE.IRQ equ %10000000 IRQ occurred/enable | |
55 ISE.TxE equ %01000000 Tx data register Empty | |
56 ISE.CTS equ %00100000 CTS transition | |
57 ISE.DCD equ %00010000 DCD transition | |
58 ISE.DSR equ %00001000 DSR transition | |
59 ISE.FOB equ %00000100 Rx data Framing or Overrun error, or Break | |
60 ISE.Par equ %00000010 Rx data Parity error | |
61 ISE.RxF equ %00000001 Rx data register Full | |
62 | |
63 ISE.Errs equ ISE.FOB!ISE.Par IRQ Status error bits | |
64 ISE.Flip equ $00 all ISR bits active when set | |
65 ISE.Mask equ ISE.CTS!ISE.DCD!ISE.DSR!ISE.FOB!ISE.Par!ISE.RxF active IRQs | |
66 | |
67 * Control Status bit definitions | |
68 CS.Frame equ %10000000 framing error (set=error) | |
69 CS.TxE equ %01000000 Tx data empty (set=empty) | |
70 CS.CTS equ %00100000 CTS input (set=disabled) | |
71 CS.DCD equ %00010000 DCD input (set=disabled) | |
72 CS.DSR equ %00001000 DSR input (set=disabled) | |
73 CS.Break equ %00000100 Rx line break (set=received break) | |
74 CS.DTR equ %00000010 DTR output (set=disabled) | |
75 CS.RTS equ %00000001 RTS output (set=disabled) | |
76 | |
77 * Control bit definitions | |
78 C.TBRCDR equ %01000000 Tx Break/Compare Data register access (set=Tx Break) | |
79 C.StpBit equ %00100000 stop bits (set=two, clear=one) | |
80 C.Echo equ %00010000 local echo (set=activated) | |
81 C.Baud equ %00001111 see baud rate table below | |
82 | |
83 * baud rate table | |
84 org 0 | |
85 BR.00050 rmb 1 50 baud (not supported) | |
86 BR.00110 rmb 1 109.92 baud | |
87 BR.00135 rmb 1 134.58 baud (not supported) | |
88 BR.00150 rmb 1 150 baud (not supported) | |
89 BR.00300 rmb 1 300 baud | |
90 BR.00600 rmb 1 600 baud | |
91 BR.01200 rmb 1 1200 baud | |
92 BR.01800 rmb 1 1800 baud (not supported) | |
93 BR.02400 rmb 1 2400 baud | |
94 BR.03600 rmb 1 3600 baud (not supported) | |
95 BR.04800 rmb 1 4800 baud | |
96 BR.07200 rmb 1 7200 baud (not supported) | |
97 BR.09600 rmb 1 9600 baud | |
98 BR.19200 rmb 1 19200 baud | |
99 BR.38400 rmb 1 38400 baud | |
100 BR.ExClk rmb 1 external Rx and Tx clocks (not supported) | |
101 | |
102 * Format bit definitions | |
103 F.Slct equ %10000000 register select (set=Format, clear=Control) | |
104 F.DatBit equ %01100000 see data bit table below | |
105 F.Par equ %00011100 see parity table below | |
106 F.DTR equ %00000010 DTR output (set=disabled) | |
107 F.RTS equ %00000001 RTS output (set=disabled) | |
108 | |
109 * data bit table | |
110 DB.5 equ %00000000 five data bits per character | |
111 DB.6 equ %00100000 six data bits per character | |
112 DB.7 equ %01000000 seven data bits per character | |
113 DB.8 equ %01100000 eight data bits per character | |
114 | |
115 * parity table | |
116 Par.None equ %00000000 | |
117 Par.Odd equ %00000100 | |
118 Par.Even equ %00001100 | |
119 Par.Mark equ %00010100 | |
120 Par.Spac equ %00011100 | |
121 | |
122 * Transmit Break bit definitions | |
123 TB.Brk equ %00000010 Tx break control (set=transmit continuous line Break) | |
124 TB.Par equ %00000001 parity check (set=parity bit to ISE.Par, clear=normal) | |
125 else | |
126 | |
127 ifeq A6551-true | |
128 * 6551 register definitions | |
129 org 0 | |
130 DataReg rmb 1 receive/transmit Data (read Rx / write Tx) | |
131 StatReg rmb 1 status (read only) | |
132 PRstReg equ StatReg programmed reset (write only) | |
133 CmdReg rmb 1 command (read/write) | |
134 CtlReg rmb 1 control (read/write) | |
135 | |
136 * Status bit definitions | |
137 Stat.IRQ equ %10000000 IRQ occurred | |
138 Stat.DSR equ %01000000 DSR level (clear = active) | |
139 Stat.DCD equ %00100000 DCD level (clear = active) | |
140 Stat.TxE equ %00010000 Tx data register Empty | |
141 Stat.RxF equ %00001000 Rx data register Full | |
142 Stat.Ovr equ %00000100 Rx data Overrun error | |
143 Stat.Frm equ %00000010 Rx data Framing error | |
144 Stat.Par equ %00000001 Rx data Parity error | |
145 | |
146 Stat.Err equ Stat.Ovr!Stat.Frm!Stat.Par Status error bits | |
147 Stat.Flp equ $00 all Status bits active when set | |
148 Stat.Msk equ Stat.IRQ!Stat.RxF active IRQs | |
149 | |
150 * Control bit definitions | |
151 Ctl.Stop equ %10000000 stop bits (set=two, clear=one) | |
152 Ctl.DBit equ %01100000 see data bit table below | |
153 Ctl.RxCS equ %00010000 Rx clock source (set=baud rate, clear=external) | |
154 Ctl.Baud equ %00001111 see baud rate table below | |
155 | |
156 * data bit table | |
157 DB.8 equ %00000000 eight data bits per character | |
158 DB.7 equ %00100000 seven data bits per character | |
159 DB.6 equ %01000000 six data bits per character | |
160 DB.5 equ %01100000 five data bits per character | |
161 | |
162 * baud rate table | |
163 org $00 | |
164 BR.ExClk rmb 1 16x external clock (not supported) | |
165 org $11 | |
166 BR.00050 rmb 1 50 baud (not supported) | |
167 BR.00075 rmb 1 75 baud (not supported) | |
168 BR.00110 rmb 1 109.92 baud | |
169 BR.00135 rmb 1 134.58 baud (not supported) | |
170 BR.00150 rmb 1 150 baud (not supported) | |
171 BR.00300 rmb 1 300 baud | |
172 BR.00600 rmb 1 600 baud | |
173 BR.01200 rmb 1 1200 baud | |
174 BR.01800 rmb 1 1800 baud (not supported) | |
175 BR.02400 rmb 1 2400 baud | |
176 BR.03600 rmb 1 3600 baud (not supported) | |
177 BR.04800 rmb 1 4800 baud | |
178 BR.07200 rmb 1 7200 baud (not supported) | |
179 BR.09600 rmb 1 9600 baud | |
180 BR.19200 rmb 1 19200 baud | |
181 | |
182 * Command bit definitions | |
183 Cmd.Par equ %11100000 see parity table below | |
184 Cmd.Echo equ %00010000 local echo (set=activated) | |
185 Cmd.TIRB equ %00001100 see Tx IRQ/RTS/Break table below | |
186 Cmd.RxI equ %00000010 Rx IRQ (set=disabled) | |
187 Cmd.DTR equ %00000001 DTR output (set=enabled) | |
188 | |
189 * parity table | |
190 Par.None equ %00000000 | |
191 Par.Odd equ %00100000 | |
192 Par.Even equ %01100000 | |
193 Par.Mark equ %10100000 | |
194 Par.Spac equ %11100000 | |
195 | |
196 * Tx IRQ/RTS/Break table | |
197 TIRB.Off equ %00000000 RTS & Tx IRQs disabled | |
198 TIRB.On equ %00000100 RTS & Tx IRQs enabled | |
199 TIRB.RTS equ %00001000 RTS enabled, Tx IRQs disabled | |
200 TIRB.Brk equ %00001100 RTS enabled, Tx IRQs disabled, Tx line Break | |
201 endc | |
202 endc | |
203 | |
204 * V.ERR bit definitions | |
205 DCDLstEr equ %00100000 DCD lost error | |
206 OvrFloEr equ %00000100 Rx data overrun or Rx buffer overflow error | |
207 FrmingEr equ %00000010 Rx data framing error | |
208 ParityEr equ %00000001 Rx data parity error | |
209 | |
210 * FloCtlRx bit definitions | |
211 FCRxSend equ %10000000 send flow control character | |
212 FCRxSent equ %00010000 Rx disabled due to XOFF sent | |
213 FCRxDTR equ %00000010 Rx disabled due to DTR | |
214 FCRxRTS equ %00000001 Rx disabled due to RTS | |
215 | |
216 * FloCtlTx bit definitions | |
217 FCTxXOff equ %10000000 due to XOFF received | |
218 FCTxBrk equ %00000010 due to currently transmitting Break | |
219 | |
220 * Wrk.Type bit definitions | |
221 Parity equ %11100000 parity bits | |
222 MdmKill equ %00010000 modem kill option | |
223 RxSwFlow equ %00001000 Rx data software (XON/XOFF) flow control | |
224 TxSwFlow equ %00000100 Tx data software (XON/XOFF) flow control | |
225 RTSFlow equ %00000010 CTS/RTS hardware flow control | |
226 DSRFlow equ %00000001 DSR/DTR hardware flow control | |
227 | |
228 * Wrk.Baud bit definitions | |
229 StopBits equ %10000000 number of stop bits code | |
230 WordLen equ %01100000 word length code | |
231 BaudRate equ %00001111 baud rate code | |
232 | |
233 * Wrk.XTyp bit definitions | |
234 SwpDCDSR equ %10000000 swap DCD+DSR bits (valid for 6551 only) | |
235 ForceDTR equ %01000000 don't drop DTR in term routine | |
236 RxBufPag equ %00001111 input buffer page count | |
237 | |
238 * static data area definitions | |
239 org V.SCF allow for SCF manager data area | |
240 | |
241 ifeq A6552-true | |
242 Cpy.CR rmb 1 Control register copy (MUST immediately precede Cpy.FR) | |
243 Cpy.FR rmb 1 Format register copy (MUST immediately follow Cpy.CR) | |
244 Cpy.ISR rmb 1 IRQ Status register copy (MUST immediately precede Cpy.CSR) | |
245 Cpy.CSR rmb 1 Control Status register copy (MUST immediately follow Cpy.ISR) | |
246 else | |
247 | |
248 ifeq A6551-true | |
249 Cpy.Stat rmb 1 Status register copy | |
250 CpyDCDSR rmb 1 DSR+DCD status copy | |
251 Mask.DCD rmb 1 DCD status bit mask (MUST immediately precede Mask.DSR) | |
252 Mask.DSR rmb 1 DSR status bit mask (MUST immediately follow Mask.DCD) | |
253 endc | |
254 endc | |
255 | |
256 CDSigPID rmb 1 process ID for CD signal | |
257 CDSigSig rmb 1 CD signal code | |
258 FloCtlRx rmb 1 Rx flow control flags | |
259 FloCtlTx rmb 1 Tx flow control flags | |
260 RxBufEnd rmb 2 end of Rx buffer | |
261 RxBufGet rmb 2 Rx buffer output pointer | |
262 RxBufMax rmb 2 Send XOFF (if enabled) at this point | |
263 RxBufMin rmb 2 Send XON (if XOFF sent) at this point | |
264 RxBufPtr rmb 2 pointer to Rx buffer | |
265 RxBufPut rmb 2 Rx buffer input pointer | |
266 RxBufSiz rmb 2 Rx buffer size | |
267 RxDatLen rmb 2 current length of data in Rx buffer | |
268 SigSent rmb 1 keyboard abort/interrupt signal already sent | |
269 SSigPID rmb 1 SS.SSig process ID | |
270 SSigSig rmb 1 SS.SSig signal code | |
271 WritFlag rmb 1 initial write attempt flag | |
272 Wrk.Type rmb 1 type work byte (MUST immediately precede Wrk.Baud) | |
273 Wrk.Baud rmb 1 baud work byte (MUST immediately follow Wrk.Type) | |
274 Wrk.XTyp rmb 1 extended type work byte | |
275 RxBufDSz equ 256-. default Rx buffer gets remainder of page... | |
276 RxBuff rmb RxBufDSz default Rx buffer | |
277 MemSize equ . | |
278 | |
279 mod ModSize,ModName,Drivr+Objct,ReEnt+Vrsn,ModEntry,MemSize | |
280 | |
281 fcb UPDAT. access mode(s) | |
282 | |
283 ifeq A6552-true | |
284 ModName fcs "DACIA" | |
285 else | |
286 | |
287 ifeq A6551-true | |
288 ModName fcs "SACIA" | |
289 endc | |
290 endc | |
291 | |
292 fcb Edtn | |
293 | |
294 SlotSlct fcb MPI.Slot selected MPI slot | |
295 | |
296 ModEntry equ * | |
297 lbra Init | |
298 lbra Read | |
299 lbra Writ | |
300 lbra GStt | |
301 lbra SStt | |
302 lbra Term | |
303 | |
304 IRQPckt equ * | |
305 | |
306 ifeq A6552-true | |
307 Pkt.Flip fcb ISE.Flip D.Poll flip byte | |
308 Pkt.Mask fcb ISE.Mask D.Poll mask byte | |
309 else | |
310 | |
311 ifeq A6551-true | |
312 Pkt.Flip fcb Stat.Flp flip byte | |
313 Pkt.Mask fcb Stat.Msk mask byte | |
314 endc | |
315 endc | |
316 | |
317 fcb $0A priority | |
318 | |
319 BaudTabl equ * | |
320 | |
321 ifeq A6552-true | |
322 fcb BR.00110,BR.00300,BR.00600 | |
323 fcb BR.01200,BR.02400,BR.04800 | |
324 fcb BR.09600,BR.19200,BR.38400 | |
325 else | |
326 | |
327 ifeq A6551-true | |
328 fcb BR.00110,BR.00300,BR.00600 | |
329 fcb BR.01200,BR.02400,BR.04800 | |
330 fcb BR.09600,BR.19200 | |
331 endc | |
332 endc | |
333 | |
334 | |
335 * NOTE: SCFMan has already cleared all device memory except for V.PAGE and | |
336 * V.PORT. Zero-default variables are: CDSigPID, CDSigSig, Wrk.XTyp. | |
337 Init equ * | |
338 clrb default to no error... | |
339 pshs cc,b,dp save IRQ/Carry status, dummy B, system DP | |
340 lbsr SetDP go set our DP | |
341 pshs y save descriptor pointer | |
342 ldd <V.PORT base hardware address | |
343 | |
344 ifeq A6552-true | |
345 else | |
346 | |
347 ifeq A6551-true | |
348 addd #1 point to 6551 status address | |
349 endc | |
350 endc | |
351 | |
352 leax IRQPckt,pcr | |
353 leay IRQSvc,pcr | |
354 os9 F$IRQ | |
355 puls y recover descriptor pointer | |
356 lbcs ErrExit go report error... | |
357 ldb M$Opt,y get option size | |
358 cmpb #IT.XTYP-IT.DTP room for extended type byte? | |
359 bls DfltInfo no, go use defaults... | |
360 | |
361 ifeq A6552-true | |
362 else | |
363 | |
364 ifeq A6551-true | |
365 ldd #Stat.DCD*256+Stat.DSR default (unswapped) DCD+DSR masks | |
366 tst IT.XTYP,y check extended type byte for swapped DCD & DSR bits | |
367 bpl NoSwap no, go skip swapping them... | |
368 exg a,b swap to DSR+DCD masks | |
369 NoSwap std <Mask.DCD save DCD+DSR (or DSR+DCD) masks | |
370 endc | |
371 endc | |
372 | |
373 lda IT.XTYP,y get extended type byte | |
374 sta <Wrk.XTyp save it | |
375 anda #RxBufPag clear all but Rx buffer page count bits | |
376 beq DfltInfo none, go use defaults... | |
377 clrb make data size an even number of pages | |
378 pshs u save data pointer | |
379 os9 F$SRqMem get extended buffer | |
380 tfr u,x copy address | |
381 puls u recover data pointer | |
382 lbcs TermExit error, go remove IRQ entry and exit... | |
383 bra SetRxBuf | |
384 | |
385 DfltInfo ldd #RxBufDSz default Rx buffer size | |
386 leax RxBuff,u default Rx buffer address | |
387 SetRxBuf std <RxBufSiz save Rx buffer size | |
388 stx <RxBufPtr save Rx buffer address | |
389 stx <RxBufGet set initial Rx buffer input address | |
390 stx <RxBufPut set initial Rx buffer output address | |
391 leax d,x point to end of Rx buffer | |
392 stx <RxBufEnd save Rx buffer end address | |
393 subd #80 characters available in Rx buffer | |
394 std <RxBufMax set auto-XOFF threshold | |
395 ldd #10 characters remaining in Rx buffer | |
396 std <RxBufMin set auto-XON threshold after auto-XOFF | |
397 | |
398 ifeq A6552-true | |
399 ldd #C.TBRCDR*256+(F.Slct!F.DTR!F.RTS) [A]=control, [B]=format register | |
400 sta <Cpy.CR save control register copy | |
401 lda <Wrk.XTyp | |
402 anda #ForceDTR forced DTR? | |
403 beq NoDTR no, don't enable DTR yet | |
404 andb #^F.DTR clear (enable) DTR bit | |
405 NoDTR stb <Cpy.FR save format register copy | |
406 else | |
407 | |
408 ifeq A6551-true | |
409 ldb #TIRB.RTS default command register | |
410 lda <Wrk.XTyp | |
411 anda #ForceDTR forced DTR? | |
412 beq NoDTR no, don't enable DTR yet | |
413 orb #Cmd.DTR set (enable) DTR bit | |
414 NoDTR ldx <V.PORT get port address | |
415 stb CmdReg,x set new command register | |
416 endc | |
417 endc | |
418 | |
419 ldd IT.PAR,y [A] = IT.PAR, [B] = IT.BAU from descriptor | |
420 lbsr SetPort go save it and set up control/format registers | |
421 orcc #IntMasks disable IRQs while setting up hardware | |
422 lda >PIA1Base+3 get PIA CART* input control register | |
423 anda #$FC clear PIA CART* control bits | |
424 sta >PIA1Base+3 disable PIA CART* FIRQs | |
425 lda >PIA1Base+2 clear possible pending PIA CART* FIRQ | |
426 lda #$01 GIME CART* IRQ bit | |
427 ora >D.IRQER mask in current GIME IRQ enables | |
428 sta >D.IRQER save GIME CART* IRQ enable shadow register | |
429 sta >IrqEnR enable GIME CART* IRQs | |
430 | |
431 ifeq A6552-true | |
432 lda #ISE.IRQ!ISE.Mask DACIA IRQ enables | |
433 sta IEReg,x enable DACIA IRQs for this port ([X]=V.PORT from SetPort) | |
434 ldb ISReg,x ensure old CTS, DCD, and DSR transition IRQ flags are clear | |
435 ldb DataReg,x ensure old error and Rx data IRQ flags are clear | |
436 ldb ISReg,x ... again | |
437 ldb DataReg,x ... and again | |
438 ldd ISReg,x get new IRQ and Control status registers | |
439 eora Pkt.Flip,pcr flip bits per D.Poll | |
440 anda Pkt.Mask,pcr any IRQ(s) still pending? | |
441 lbne NRdyErr yes, go report error... (device not plugged in?) | |
442 std <Cpy.ISR save new IRQ and Control status register copies | |
443 else | |
444 | |
445 ifeq A6551-true | |
446 lda StatReg,x ensure old IRQ flags are clear | |
447 lda DataReg,x ensure old error and Rx data IRQ flags are clear | |
448 lda StatReg,x ... again | |
449 lda DataReg,x ... and again | |
450 lda StatReg,x get new Status register contents | |
451 sta <Cpy.Stat save Status copy | |
452 tfr a,b copy it... | |
453 eora Pkt.Flip,pcr flip bits per D.Poll | |
454 anda Pkt.Mask,pcr any IRQ(s) still pending? | |
455 lbne NRdyErr yes, go report error... (device not plugged in?) | |
456 andb #Stat.DSR!Stat.DCD clear all but DSR+DCD status | |
457 stb <CpyDCDSR save new DCD+DSR status copy | |
458 endc | |
459 endc | |
460 | |
461 lda SlotSlct,pcr get MPI slot select value | |
462 bmi NoSelect no MPI slot select, go on... | |
463 sta >MPI.Slct set MPI slot select register | |
464 NoSelect puls cc,b,dp,pc recover IRQ/Carry status, dummy B, system DP, return | |
465 | |
466 | |
467 Term equ * | |
468 clrb default to no error... | |
469 pshs cc,b,dp save IRQ/Carry status, dummy B, system DP | |
470 lbsr SetDP go set our DP | |
471 | |
472 ifeq A6552-true | |
473 lda #^ISE.IRQ disable all DACIA IRQs | |
474 ldx <V.PORT | |
475 sta IEReg,x disable DACIA IRQs for this port | |
476 lda <Cpy.FR get format register copy | |
477 ora #F.DTR!F.RTS set (disable) DTR and RTS bits | |
478 ldb <Wrk.XTyp get extended type byte | |
479 andb #ForceDTR forced DTR? | |
480 beq KeepDTR no, go leave DTR disabled... | |
481 anda #^F.DTR clear (enable) DTR bit | |
482 KeepDTR sta CFReg,x set DTR and RTS enable/disable | |
483 else | |
484 | |
485 ifeq A6551-true | |
486 ldx <V.PORT | |
487 lda CmdReg,x get current Command register contents | |
488 anda #^(Cmd.TIRB!Cmd.DTR) disable Tx IRQs, RTS, and DTR | |
489 ora #Cmd.RxI disable Rx IRQs | |
490 ldb <Wrk.XTyp get extended type byte | |
491 andb #ForceDTR forced DTR? | |
492 beq KeepDTR no, go leave DTR disabled... | |
493 ora #Cmd.DTR set (enable) DTR bit | |
494 KeepDTR sta CmdReg,x set DTR and RTS enable/disable | |
495 endc | |
496 endc | |
497 | |
498 ldd <RxBufSiz get Rx buffer size | |
499 tsta less than 256 bytes? | |
500 beq TermExit yes, no system memory to return... | |
501 pshs u save data pointer | |
502 ldu <RxBufPtr get address of system memory | |
503 os9 F$SRtMem | |
504 puls u recover data pointer | |
505 TermExit ldd <V.PORT base hardware address is status register | |
506 | |
507 ifeq A6552-true | |
508 else | |
509 | |
510 ifeq A6551-true | |
511 addd #1 point to 6551 status register | |
512 endc | |
513 endc | |
514 | |
515 ldx #$0000 remove IRQ table entry | |
516 leay IRQSvc,pcr | |
517 puls cc recover IRQ/Carry status | |
518 os9 F$IRQ | |
519 puls a,dp,pc restore dummy A, system DP, return | |
520 | |
521 | |
522 ReadSlp ldd >D.Proc process descriptor address | |
523 sta <V.WAKE save MSB for IRQ service routine | |
524 tfr d,x copy process descriptor address | |
525 ldb P$State,x get process state flag | |
526 orb #Suspend set suspend flag | |
527 stb P$State,x put process in suspend state | |
528 lbsr Sleep1 go suspend process... | |
529 ldx >D.Proc process descriptor address | |
530 ldb P$Signal,x pending signal for this process? | |
531 beq ChkState no, go check process state... | |
532 cmpb #S$Intrpt do we honor signal? | |
533 bls ErrExit yes, go do it... | |
534 ChkState ldb P$State,x get process state | |
535 bitb #Condem we be dead? | |
536 bne PrAbtErr yes, go do it... | |
537 ldb <V.WAKE true interrupt? | |
538 bne ReadSlp no, go suspend again... | |
539 ReadLoop puls cc,b,dp recover IRQ/Carry status, dummy B, system DP | |
540 | |
541 Read equ * | |
542 clrb default to no errors... | |
543 pshs cc,b,dp save IRQ/Carry status, dummy B, system DP | |
544 lbsr SetDP go set our DP | |
545 orcc #IntMasks disable IRQs while checking Rx flow control | |
546 lda <FloCtlRx get Rx flow control flags | |
547 beq ReadChar none, go get Rx character... | |
548 ldx <RxDatLen get Rx data count again | |
549 cmpx <RxBufMin at or below XON level? | |
550 bhi ReadChar no, go get Rx character... | |
551 ldx <V.PORT | |
552 bita #FCRxSent Rx disabled due to XOFF sent? | |
553 beq ChkHWHS no, go check hardware handshake(s)... | |
554 ldb <FloCtlTx get Tx flow control flags | |
555 bitb #FCTxBrk currently transmitting line Break? | |
556 bne ReadLoop yes, go skip XON this time... | |
557 | |
558 ifeq A6552-true | |
559 ldb CSReg,x get new Control Status register | |
560 bitb #CS.TxE Tx data register empty? | |
561 beq ReadLoop no, go skip XON this time... | |
562 ldb <V.XON | |
563 stb DataReg,x write XON character | |
564 ChkHWHS bita #FCRxDTR!FCRxRTS Rx disabled due to DTR or RTS? | |
565 beq RxFloClr no, go clear Rx flow control flag(s)... | |
566 ldb <Cpy.FR get Format register copy | |
567 andb #^(F.DTR!F.RTS) clear (enable) DTR and RTS bits | |
568 stb <Cpy.FR save Format register copy | |
569 stb CFReg,x set Format register | |
570 else | |
571 | |
572 ifeq A6551-true | |
573 ldb StatReg,x get new Status register | |
574 bitb #Stat.TxE Tx data register empty? | |
575 beq ReadLoop no, go skip XON this time... | |
576 ldb <V.XON | |
577 stb DataReg,x write XON character | |
578 ChkHWHS bita #FCRxDTR!FCRxRTS Rx disabled due to DTR or RTS? | |
579 beq RxFloClr no, go clear Rx flow control flag(s)... | |
580 ldb CmdReg,x get current Command register contents | |
581 andb #^Cmd.TIRB clear Tx IRQ/RTS/Break control bits | |
582 orb #TIRB.RTS!Cmd.DTR enable RTS and DTR, disable Tx IRQs | |
583 stb CmdReg,x set Command register | |
584 endc | |
585 endc | |
586 | |
587 RxFloClr clr <FloCtlRx clear Rx flow control flags | |
588 ReadChar ldb <V.ERR get accumulated errors, if any | |
589 stb PD.ERR,y set/clear error(s) in path descriptor | |
590 bne ReprtErr error(s), go report it/them... | |
591 ldx <RxDatLen get Rx buffer count | |
592 beq ReadSlp none, go sleep while waiting for new Rx data... | |
593 leax -1,x less character we're about to grab | |
594 stx <RxDatLen save new Rx data count | |
595 ldx <RxBufGet current Rx buffer pickup position | |
596 lda ,x+ get Rx character, set up next pickup position | |
597 cmpx <RxBufEnd end of Rx buffer? | |
598 blo SetPckUp no, go keep pickup pointer | |
599 ldx <RxBufPtr get Rx buffer start address | |
600 SetPckUp stx <RxBufGet set new Rx data pickup pointer | |
601 puls cc,b,dp,pc recover IRQ/Carry status, dummy B, system DP, return | |
602 | |
603 | |
604 PrAbtErr ldb #E$PrcAbt | |
605 bra ErrExit | |
606 | |
607 ReprtErr clr <V.ERR clear error status | |
608 bitb #DCDLstEr DCD lost error? | |
609 bne HngUpErr yes, go report it... | |
610 ldb #E$Read | |
611 ErrExit puls cc restore IRQ enable and Carry status | |
612 coma error, set Carry | |
613 puls a,dp,pc restore dummy A (or Tx character), system DP, return | |
614 | |
615 HngUpErr ldb #E$HangUp | |
616 lda #PST.DCD DCD lost flag | |
617 sta PD.PST,y set path status flag | |
618 bra ErrExit | |
619 | |
620 NRdyErr ldb #E$NotRdy | |
621 bra ErrExit | |
622 | |
623 UnSvcErr ldb #E$UnkSvc | |
624 bra ErrExit | |
625 | |
626 | |
627 WritLoop lda <WritFlag first pass through for this Tx character? | |
628 beq WritFast yes, don't sleep yet... | |
629 lbsr Sleep1 go sleep for balance of tick... | |
630 WritFast inc <WritFlag set "initial write attempt" flag | |
631 puls cc,a,dp recover IRQ/Carry status, Tx character, system DP | |
632 | |
633 Writ equ * | |
634 clrb default to no error... | |
635 pshs cc,a,dp save IRQ/Carry status, Tx character, system DP | |
636 lbsr SetDP go set our DP | |
637 ldx <V.PORT | |
638 orcc #IntMasks disable IRQs during error and Tx disable checks | |
639 ldb <V.ERR get accumulated errors, if any | |
640 andb #DCDLstEr DCD lost error? (ignore other errors, if any) | |
641 stb PD.ERR,y set/clear error(s) in path descriptor | |
642 bne ReprtErr DCD lost error, go report it... | |
643 | |
644 ifeq A6552-true | |
645 ldb <Cpy.CSR get copy of control status register | |
646 bitb #CS.CTS Tx disabled due to CTS? | |
647 bne WritLoop yes, go sleep a while... | |
648 lda <Wrk.Type get software/hardware handshake enables | |
649 bita #DSRFlow DSR/DTR handshake enabled? | |
650 beq ChkTxFlo no, go check Tx flow control | |
651 bitb #CS.DSR Tx disabled due to DSR? | |
652 bne WritLoop yes, go sleep a while... | |
653 else | |
654 | |
655 ifeq A6551-true | |
656 lda <Wrk.Type get software/hardware handshake enables | |
657 bita #DSRFlow DSR/DTR handshake enabled? | |
658 beq ChkTxFlo no, go check Tx flow control | |
659 ldb <Cpy.Stat get copy of status register | |
660 bitb <Mask.DSR Tx disabled due to DSR? | |
661 bne WritLoop yes, go sleep a while... | |
662 endc | |
663 endc | |
664 | |
665 ChkTxFlo ldb <FloCtlTx get Tx flow control flags | |
666 bitb #FCTxBrk currently transmitting line Break? | |
667 bne WritLoop yes, go sleep a while... | |
668 bita #TxSwFlow Tx software flow control enabled? | |
669 beq ChkRxFlo no, go check pending Rx flow control | |
670 bitb #FCTxXOff Tx disabled due to received XOFF? | |
671 bne WritLoop yes, go sleep a while... | |
672 ChkRxFlo bita #RxSwFlow Rx software flow control enabled? | |
673 beq ChkTxE no, go check Tx register empty | |
674 ldb <FloCtlRx get Rx flow control flags | |
675 bitb #FCRxSend XON/XOFF Rx flow control pending? | |
676 bne WritLoop yes, go sleep a while... | |
677 ChkTxE lda 1,s get Tx character | |
678 | |
679 ifeq A6552-true | |
680 ldb CSReg,x get new control status register | |
681 bitb #CS.TxE Tx register empty? | |
682 beq WritLoop no, go sleep a while... | |
683 sta DataReg,x write Tx character | |
684 else | |
685 | |
686 ifeq A6551-true | |
687 ldb StatReg,x get new status register | |
688 bitb #Stat.TxE Tx register empty? | |
689 beq WritLoop no, go sleep a while... | |
690 sta DataReg,x write Tx character | |
691 endc | |
692 endc | |
693 | |
694 clr <WritFlag clear "initial write attempt" flag | |
695 puls cc,a,dp,pc recover IRQ/Carry status, Tx character, system DP, return | |
696 | |
697 | |
698 GStt equ * | |
699 clrb default to no error... | |
700 pshs cc,b,dp save IRQ/Carry status, dummy B, system DP | |
701 lbsr SetDP go set our DP | |
702 ldx PD.RGS,y caller's register stack pointer | |
703 cmpa #SS.EOF | |
704 beq GSExitOK yes, SCF devices never return EOF | |
705 cmpa #SS.Ready | |
706 bne GetScSiz | |
707 ldd <RxDatLen get Rx data length | |
708 beq NRdyErr none, go report error | |
709 tsta more than 255 bytes? | |
710 beq SaveLen no, keep Rx data available | |
711 ldb #255 yes, just use 255 | |
712 SaveLen stb R$B,x set Rx data available in caller's [B] | |
713 GSExitOK puls cc,b,dp,pc restore Carry status, dummy B, system DP, return | |
714 | |
715 GetScSiz cmpa #SS.ScSiz | |
716 bne GetComSt | |
717 ldu PD.DEV,y | |
718 ldu V$DESC,u | |
719 clra | |
720 ldb IT.COL,u | |
721 std R$X,x | |
722 ldb IT.ROW,u | |
723 std R$Y,x | |
724 puls cc,b,dp,pc restore Carry status, dummy B, system DP, return | |
725 | |
726 GetComSt cmpa #SS.ComSt | |
727 lbne UnSvcErr no, go report error | |
728 ldd <Wrk.Type | |
729 std R$Y,x | |
730 clra default to DCD and DSR enabled | |
731 | |
732 ifeq A6552-true | |
733 ldb <Cpy.CSR get current status | |
734 bitb #CS.DCD DCD bit set (disabled)? | |
735 else | |
736 | |
737 ifeq A6551-true | |
738 ldb <CpyDCDSR get current DSR+DCD status | |
739 bitb <Mask.DCD DCD bit set (disabled)? | |
740 endc | |
741 endc | |
742 | |
743 beq CheckDSR no, go check DSR status | |
744 ora #DCDStBit | |
745 | |
746 ifeq A6552-true | |
747 CheckDSR bitb #CS.DSR DSR bit set (disabled)? | |
748 else | |
749 | |
750 ifeq A6551-true | |
751 CheckDSR bitb <Mask.DSR DSR bit set (disabled)? | |
752 endc | |
753 endc | |
754 | |
755 beq SaveCDSt no, go set DCD/DSR status | |
756 ora #DSRStBit | |
757 SaveCDSt sta R$B,x set 6551 ACIA style DCD/DSR status in caller's [B] | |
758 puls cc,b,dp,pc restore Carry status, dummy B, system DP, return | |
759 | |
760 | |
761 BreakSlp ldx #SlpBreak SS.Break duration | |
762 bra TimedSlp | |
763 HngUpSlp ldx #SlpHngUp SS.HngUp duration | |
764 bra TimedSlp | |
765 Sleep1 ldx #1 give up balance of tick | |
766 TimedSlp pshs cc save IRQ enable status | |
767 andcc #Intmasks enable IRQs | |
768 os9 F$Sleep | |
769 puls cc,pc restore IRQ enable status, return | |
770 | |
771 | |
772 SStt equ * | |
773 clrb default to no error... | |
774 pshs cc,b,dp save IRQ/Carry status, dummy B, system DP | |
775 lbsr SetDP go set our DP | |
776 ldx PD.RGS,y | |
777 cmpa #SS.HngUp | |
778 bne SetBreak | |
779 | |
780 ifeq A6552-true | |
781 lda #F.DTR set (disable) DTR bit | |
782 ldx <V.PORT | |
783 orcc #IntMasks disable IRQs while setting Format register | |
784 ora <Cpy.FR mask in Format register copy | |
785 sta <Cpy.FR save Format register copy | |
786 sta CFReg,x set new Format register | |
787 bsr HngUpSlp go sleep for a while... | |
788 lda #^(F.DTR!F.RTS) clear (enable) DTR and RTS bits | |
789 FRegClr ldx <V.PORT | |
790 anda <Cpy.FR mask in Format register copy | |
791 ldb <FloCtlRx get Rx flow control flags | |
792 bitb #FCRxDTR Rx disabled due to DTR? | |
793 beq LeaveDTR no, go leave DTR enabled | |
794 ora #F.DTR set (disable) DTR bit | |
795 LeaveDTR bitb #FCRxRTS Rx disabled due to RTS? | |
796 beq LeaveRTS no, go leave RTS enabled | |
797 ora #F.RTS set (disable) RTS bit | |
798 LeaveRTS sta <Cpy.FR save Format register copy | |
799 sta CFReg,x set new Format register | |
800 else | |
801 | |
802 ifeq A6551-true | |
803 lda #^Cmd.DTR cleared (disabled) DTR bit | |
804 ldx <V.PORT | |
805 orcc #IntMasks disable IRQs while setting Command register | |
806 anda CmdReg,x mask in current Command register contents | |
807 sta CmdReg,x set new Command register | |
808 bsr HngUpSlp go sleep for a while... | |
809 BreakClr lda #^(Cmd.TIRB!Cmd.DTR) clear (disable) DTR and RTS control bits | |
810 FRegClr ldx <V.PORT | |
811 anda CmdReg,x mask in current Command register | |
812 ldb <FloCtlRx get Rx flow control flags | |
813 bitb #FCRxDTR Rx disabled due to DTR? | |
814 bne LeaveDTR yes, go leave DTR disabled | |
815 ora #Cmd.DTR set (enable) DTR bit | |
816 LeaveDTR bitb #FCRxRTS Rx disabled due to RTS? | |
817 bne LeaveRTS yes, go leave RTS disabled | |
818 ora #TIRB.RTS enable RTS output | |
819 LeaveRTS ldb <FloCtlTx get Tx flow control flags | |
820 bitb #FCTxBrk currently transmitting line Break? | |
821 beq NotTxBrk no, go leave RTS alone... | |
822 ora #TIRB.Brk set Tx Break bits | |
823 NotTxBrk sta CmdReg,x set new Command register | |
824 endc | |
825 endc | |
826 | |
827 puls cc,b,dp,pc restore IRQ/Carry status, dummy B, system DP, return | |
828 | |
829 SetBreak cmpa #SS.Break Tx line break? | |
830 bne SetSSig | |
831 | |
832 ifeq A6552-true | |
833 ldy <V.PORT | |
834 ldd #FCTxBrk*256+TB.Brk [A]=flow control flag, [B]=Tx break enable | |
835 orcc #Intmasks disable IRQs while messing with flow control flags | |
836 ora <FloCtlTx set Tx break flag bit | |
837 sta <FloCtlTx save Tx flow control flags | |
838 stb TBReg,y start Tx line break | |
839 bsr BreakSlp go sleep for a while... | |
840 anda #^FCTxBrk clear Tx break flag bit | |
841 sta <FloCtlTx save Tx flow control flags | |
842 clr TBReg,y end Tx line break | |
843 puls cc,b,dp,pc restore IRQ/Carry status, dummy B, system DP, return | |
844 else | |
845 | |
846 ifeq A6551-true | |
847 ldy <V.PORT | |
848 ldd #FCTxBrk*256+TIRB.Brk [A]=flow control flag, [B]=Tx break enable | |
849 orcc #Intmasks disable IRQs while messing with flow control flags | |
850 ora <FloCtlTx set Tx break flag bit | |
851 sta <FloCtlTx save Tx flow control flags | |
852 orb CmdReg,y set Tx line break bits | |
853 stb CmdReg,y start Tx line break | |
854 bsr BreakSlp go sleep for a while... | |
855 anda #^FCTxBrk clear Tx break flag bit | |
856 sta <FloCtlTx save Tx flow control flags | |
857 bra BreakClr go restore RTS output to previous... | |
858 endc | |
859 endc | |
860 | |
861 SetSSig cmpa #SS.SSig | |
862 bne SetRelea | |
863 lda PD.CPR,y current process ID | |
864 ldb R$X+1,x LSB of [X] is signal code | |
865 orcc #IntMasks disable IRQs while checking Rx data length | |
866 ldx <RxDatLen | |
867 bne RSendSig | |
868 std <SSigPID | |
869 puls cc,b,dp,pc restore IRQ/Carry status, dummy B, system DP, return | |
870 RSendSig puls cc restore IRQ/Carry status | |
871 os9 F$Send | |
872 puls a,dp,pc restore dummy A, system DP, return | |
873 | |
874 SetRelea cmpa #SS.Relea | |
875 bne SetCDSig | |
876 leax SSigPID,u point to Rx data signal process ID | |
877 bsr ReleaSig go release signal... | |
878 puls cc,b,dp,pc restore Carry status, dummy B, system DP, return | |
879 | |
880 SetCDSig cmpa #SS.CDSig set DCD signal? | |
881 bne SetCDRel | |
882 lda PD.CPR,y current process ID | |
883 ldb R$X+1,x LSB of [X] is signal code | |
884 std <CDSigPID | |
885 puls cc,b,dp,pc restore Carry status, dummy B, system DP, return | |
886 | |
887 SetCDRel cmpa #SS.CDRel release DCD signal? | |
888 bne SetComSt | |
889 CDRelSig leax CDSigPID,u point to DCD signal process ID | |
890 bsr ReleaSig go release signal... | |
891 puls cc,b,dp,pc restore Carry status, dummy B, system DP, return | |
892 | |
893 SetComSt cmpa #SS.ComSt | |
894 bne SetOpen | |
895 ldd R$Y,x caller's [Y] contains ACIAPAK format type/baud info | |
896 bsr SetPort go save it and set up control/format registers | |
897 ReturnOK puls cc,b,dp,pc restore Carry status, dummy B, system DP, return | |
898 | |
899 SetOpen cmpa #SS.Open | |
900 bne SetClose | |
901 lda R$Y+1,x get LSB of caller's [Y] | |
902 deca real SS.Open from SCF? (SCF sets LSB of [Y] = 1) | |
903 bne ReturnOK no, go do nothing but return OK... | |
904 | |
905 ifeq A6552-true | |
906 lda #^(F.DTR!F.RTS) clear (enable) DTR and RTS bits | |
907 else | |
908 | |
909 ifeq A6551-true | |
910 lda #TIRB.RTS enabled DTR and RTS outputs | |
911 endc | |
912 endc | |
913 | |
914 orcc #IntMasks disable IRQs while setting Format register | |
915 lbra FRegClr go enable DTR and RTS (if not disabled due to Rx flow control) | |
916 | |
917 SetClose cmpa #SS.Close | |
918 lbne UnSvcErr no, go report error... | |
919 lda R$Y+1,x real SS.Close from SCF? (SCF sets LSB of [Y] = 0) | |
920 bne ReturnOK no, go do nothing but return OK... | |
921 leax SSigPID,u point to Rx data signal process ID | |
922 bsr ReleaSig go release signal... | |
923 bra CDRelSig go release DCD signal, return from there... | |
924 | |
925 ReleaSig pshs cc save IRQ enable status | |
926 orcc #IntMasks disable IRQs while releasing signal | |
927 lda PD.CPR,y get current process ID | |
928 suba ,x same as signal process ID? | |
929 bne NoReleas no, go return... | |
930 sta ,x clear this signal's process ID | |
931 NoReleas puls cc,pc restore IRQ enable status, return | |
932 | |
933 ifeq A6552-true | |
934 SetPort pshs cc save IRQ enable and Carry status | |
935 orcc #IntMasks disable IRQs while setting up DACIA registers | |
936 std <Wrk.Type save type/baud in data area | |
937 lsra *shift parity bits into | |
938 lsra *position for 65C52's | |
939 lsra *format register | |
940 anda #F.Par clear all except parity bits | |
941 pshs a save parity temporarily | |
942 comb translate word length bits to 65C52's word length code | |
943 andb #F.DatBit clear all except word length bits | |
944 orb ,s+ mask in parity and clean up stack | |
945 lda <Wrk.Baud get baud information | |
946 anda #BaudRate clear all but baud rate bits | |
947 leax BaudTabl,pcr | |
948 lda a,x get baud rate setting | |
949 pshs a save it temporarily | |
950 lda <Wrk.Baud get stop bit(s) information | |
951 lsra *shift stop bit into position | |
952 lsra *for 65C52's control register | |
953 anda #C.StpBit clear all except stop bit code | |
954 ora ,s+ mask in baud rate and clean up stack | |
955 pshs d save stopbits/baudrate and wordlength/parity temporarily | |
956 ldd <Cpy.CR get old control/format register copies | |
957 anda #^(C.StpBit!C.Baud) clear stop bit and baud rate code bits | |
958 ora ,s+ mask in stop bit(s) and baud rate | |
959 andb #^(F.DatBit!F.Par) clear word length and parity code bits | |
960 orb ,s+ mask in word length and parity | |
961 ldx <V.PORT get port address | |
962 std <Cpy.CR save control/format register copies | |
963 sta CFReg,x set control register | |
964 stb CFReg,x set format register | |
965 puls cc,pc recover IRQ enable and Carry status, return... | |
966 else | |
967 | |
968 ifeq A6551-true | |
969 SetPort pshs cc save IRQ enable and Carry status | |
970 orcc #IntMasks disable IRQs while setting up ACIA registers | |
971 std <Wrk.Type save type/baud in data area | |
972 leax BaudTabl,pcr | |
973 andb #BaudRate clear all but baud rate bits | |
974 ldb b,x get baud rate setting | |
975 pshs b save it temporarily | |
976 ldb <Wrk.Baud get baud info again | |
977 andb #^(Ctl.RxCS!Ctl.Baud) clear clock source + baud rate code bits | |
978 orb ,s+ mask in clock source + baud rate and clean up stack | |
979 ldx <V.PORT get port address | |
980 anda #Cmd.Par clear all except parity bits | |
981 pshs a save new command register contents temporarily | |
982 lda CmdReg,x get current command register contents | |
983 anda #^Cmd.Par clear parity control bits | |
984 ora ,s+ mask in new parity | |
985 std CmdReg,x set command+control registers | |
986 puls cc,pc recover IRQ enable and Carry status, return... | |
987 endc | |
988 endc | |
989 | |
990 SetDP pshs u save our data pointer | |
991 puls dp set our DP | |
992 leas 1,s clean up stack | |
993 rts | |
994 | |
995 AccumErr ora <V.ERR | |
996 sta <V.ERR | |
997 rts | |
998 | |
999 | |
1000 ifeq A6552-true | |
1001 IRQSvc equ * | |
1002 pshs dp save system DP | |
1003 bsr SetDP go set our DP | |
1004 ldx <V.PORT | |
1005 ldb CSReg,x get current Control/Status register | |
1006 std <Cpy.ISR save ISR (from D.Poll check) and CSR copies | |
1007 bita #ISE.FOB!ISE.Par FRM/OVR/BRK or Parity error? | |
1008 beq ChkRDRF no, go check Rx data | |
1009 tst DataReg,x read Rx data register to clear DACIA error flags | |
1010 bitb #CS.Break Rx line break? | |
1011 beq ChkParty no, go check if parity error... | |
1012 lda <V.QUIT default to keyboard quit ("Break") code | |
1013 bra RxBreak go pretend we've received V.QUIT character... | |
1014 | |
1015 ChkParty anda #ISE.Par parity error? | |
1016 beq ChkFrame no, go check framing error | |
1017 lda #ParityEr mark parity error | |
1018 ChkFrame bitb #CS.Frame framing error? | |
1019 beq ChkOvRun no, go check overrun error... | |
1020 ora #FrmingEr mark Framing error | |
1021 ChkOvRun tsta any other error flag(s) set? | |
1022 bne SaveErrs yes, go save them... | |
1023 ora #OvrFloEr must be overrun error, mark it | |
1024 SaveErrs bsr AccumErr go save accumulated errors... | |
1025 lbra ChkTrDCD go check if DCD transition... | |
1026 | |
1027 ChkRDRF bita #ISE.RxF Rx data? | |
1028 lbeq ChkTrDCD no, go check DCD transition | |
1029 lda DataReg,x get Rx data | |
1030 RxBreak beq SavRxDat its a null, go save it... | |
1031 clr <SigSent clear signal sent flag | |
1032 cmpa <V.INTR interrupt? | |
1033 bne Chk.Quit no, go on... | |
1034 ldb #S$Intrpt | |
1035 bra SendSig | |
1036 Chk.Quit cmpa <V.QUIT abort? | |
1037 bne Chk.PChr no, go on... | |
1038 ldb #S$Abort | |
1039 SendSig pshs a save Rx data | |
1040 lda <V.LPRC get last process' ID | |
1041 os9 F$Send | |
1042 puls a recover Rx data | |
1043 stb <SigSent set signal sent flag | |
1044 bra SavRxDat go save Rx data... | |
1045 Chk.PChr cmpa <V.PCHR pause? | |
1046 bne Chk.Flow no, go on... | |
1047 ldx <V.DEV2 attached device defined? | |
1048 beq SavRxDat no, go save Rx data... | |
1049 sta V.PAUS,x yes, pause attached device | |
1050 bra SavRxDat go save Rx data... | |
1051 Chk.Flow ldb <Wrk.Type | |
1052 bitb #TxSwFlow Tx data software flow control enabled? | |
1053 beq SavRxDat no, go save Rx data... | |
1054 cmpa <V.XON XON? | |
1055 bne Chk.XOff no, go on... | |
1056 ldb #^FCTxXOff clear XOFF received bit | |
1057 andb <FloCtlTx clear software Tx flow control flag | |
1058 bra SetTxFlo go save new Tx flow control flags... | |
1059 Chk.XOff cmpa <V.XOFF XOFF? | |
1060 bne SavRxDat no, go save Rx data... | |
1061 ldb #FCTxXOff set XOFF received bit | |
1062 orb <FloCtlTx set software Tx flow control flag | |
1063 SetTxFlo stb <FloCtlTx save new Tx flow control flags | |
1064 lbra ChkTrDCD go check DCD transition... | |
1065 SavRxDat ldb <FloCtlRx get Rx flow control flags | |
1066 andb #^FCRxSend clear possible pending XOFF flag | |
1067 stb <FloCtlRx save Rx flow control flags | |
1068 ldy <RxBufPut get Rx buffer input pointer | |
1069 ldx <RxDatLen Rx get Rx buffer data length | |
1070 cmpx <RxBufSiz Rx buffer already full? | |
1071 blo NotOvFlo no, go skip overflow error... | |
1072 lda #OvrFloEr mark Rx buffer overflow | |
1073 lbsr AccumErr go save accumulated errors... | |
1074 bra DisRxFlo go ensure Rx is disabled (if possible) | |
1075 NotOvFlo sta ,y+ save Rx data | |
1076 cmpy <RxBufEnd end of Rx buffer? | |
1077 blo SetLayDn no, go keep laydown pointer | |
1078 ldy <RxBufPtr get Rx buffer start address | |
1079 SetLayDn sty <RxBufPut set new Rx data laydown pointer | |
1080 leax 1,x one more byte in Rx buffer | |
1081 stx <RxDatLen save new Rx data length | |
1082 cmpx <RxBufMax at or past maximum (XOFF) fill point? | |
1083 blo SgnlRxD no, go check Rx data signal... | |
1084 DisRxFlo lda <Wrk.XTyp | |
1085 ldb <Cpy.FR get Format register copy | |
1086 bita #ForceDTR forced DTR? | |
1087 bne DisRxRTS yes, go check RTS disable... | |
1088 lda <Wrk.Type | |
1089 bita #DSRFlow DSR/DTR flow control enabled? | |
1090 beq DisRxRTS no, go check RTS disable | |
1091 lda <FloCtlRx get Rx flow control flags | |
1092 ora #FCRxDTR mark Rx disabled by DTR | |
1093 sta <FloCtlRx save new Rx flow control flags | |
1094 orb #F.DTR set (disable) DTR bit | |
1095 DisRxRTS lda <Wrk.Type | |
1096 bita #RTSFlow CTS/RTS flow control enabled? | |
1097 beq NewRxFlo no, go set new Rx flow control... | |
1098 lda <FloCtlRx get Rx flow control flags | |
1099 ora #FCRxRTS mark Rx disabled by RTS | |
1100 sta <FloCtlRx save new Rx flow control flags | |
1101 orb #F.RTS set (disable) RTS bit | |
1102 NewRxFlo ldx <V.PORT | |
1103 stb <Cpy.FR save Format register copy | |
1104 stb CFReg,x set/clear DTR and RTS in Format register | |
1105 lda <Wrk.Type | |
1106 bita #RxSwFlow Rx data software flow control enabled? | |
1107 beq SgnlRxD no, go check Rx data signal... | |
1108 lda <V.XOFF XOFF character defined? | |
1109 beq SgnlRxD no, go check Rx data signal... | |
1110 ldb <FloCtlRx get Rx flow control flags | |
1111 bitb #FCRxSent XOFF already sent? | |
1112 bne SgnlRxD yes, go check Rx data signal... | |
1113 orb #FCRxSend set send XOFF flag | |
1114 stb <FloCtlRx set new Rx flow control flags | |
1115 ldb <Cpy.CSR get Control status register copy | |
1116 bitb #CS.TxE Tx data register empty? | |
1117 beq SgnlRxD no, go skip XOFF this time... | |
1118 sta DataReg,x write XOFF character | |
1119 ldb #FCRxSent set XOFF sent flag | |
1120 orb <FloCtlRx mask in current Rx flow control flags | |
1121 andb #^FCRxSend clear send XOFF flag | |
1122 stb <FloCtlRx save new flow control flags | |
1123 SgnlRxD ldb <SigSent already sent abort/interrupt signal? | |
1124 bne ChkTrDCD yes, go check DCD transition... | |
1125 lda <SSigPID Rx data signal process ID? | |
1126 beq ChkTrDCD none, go check DCD transition... | |
1127 ldb <SSigSig Rx data signal code | |
1128 clr <SSigPID clear Rx data signal | |
1129 os9 F$Send | |
1130 | |
1131 ChkTrDCD ldd <Cpy.ISR get IRQ and Control Status copies | |
1132 bita #ISE.DCD DCD transition? | |
1133 beq CkSuspnd no, go check for suspended process... | |
1134 bitb #CS.DCD DCD disabled now? | |
1135 beq SgnlDCD no, go check DCD signal... | |
1136 lda <Wrk.Type | |
1137 bita #MdmKill modem kill enabled? | |
1138 beq SgnlDCD no, go on... | |
1139 ldx <V.PDLHd path descriptor list header | |
1140 beq StCDLost no list, go set DCD lost error... | |
1141 lda #PST.DCD DCD lost flag | |
1142 PDListLp sta PD.PST,x set path status flag | |
1143 ldx PD.PLP,x get next path descriptor in list | |
1144 bne PDListLp not end of list, go do another... | |
1145 StCDLost lda #DCDLstEr DCD lost error flag | |
1146 lbsr AccumErr go save accumulated errors... | |
1147 SgnlDCD lda <CDSigPID get process ID, send a DCD signal? | |
1148 beq CkSuspnd no, go check for suspended process... | |
1149 ldb <CDSigSig get DCD signal code | |
1150 clr <CDSigPID clear DCD signal | |
1151 os9 F$Send | |
1152 | |
1153 CkSuspnd clrb clear Carry (for exit) and LSB of process descriptor address | |
1154 lda <V.WAKE anybody waiting? ([D]=process descriptor address) | |
1155 beq IRQExit no, go return... | |
1156 stb <V.WAKE mark I/O done | |
1157 tfr d,x copy process descriptor pointer | |
1158 lda P$State,x get state flags | |
1159 anda #^Suspend clear suspend state | |
1160 sta P$State,x save state flags | |
1161 IRQExit puls dp,pc recover system DP, return... | |
1162 else | |
1163 | |
1164 ifeq A6551-true | |
1165 IRQSvc equ * | |
1166 pshs dp save system DP | |
1167 bsr SetDP go set our DP | |
1168 ldx <V.PORT | |
1169 ldb StatReg,x get current Status register contents | |
1170 stb <Cpy.Stat save Status register copy | |
1171 bitb #Stat.Err error(s)? | |
1172 beq ChkRDRF no, go check Rx data | |
1173 tst DataReg,x read Rx data register to clear ACIA error flags | |
1174 bitb #Stat.Frm framing error (assume Rx line Break)? | |
1175 beq ChkParty no, go check if parity error... | |
1176 lda <V.QUIT default to keyboard quit ("Break") code | |
1177 bra RxBreak go pretend we've received V.QUIT character... | |
1178 | |
1179 ChkParty clra clear old IRQ status | |
1180 bitb #Stat.Par parity error? | |
1181 beq ChkOvRun no, go check overrun error... | |
1182 ora #ParityEr mark parity error | |
1183 ChkOvRun bita #Stat.Ovr overrun error? | |
1184 beq SaveErrs no, go save errors... | |
1185 ora #OvrFloEr mark overrun error | |
1186 SaveErrs bsr AccumErr go save accumulated errors... | |
1187 lbra ChkTrDCD go check if DCD transition... | |
1188 | |
1189 ChkRDRF bitb #Stat.RxF Rx data? | |
1190 lbeq ChkTrDCD no, go check DCD transition | |
1191 lda DataReg,x get Rx data | |
1192 RxBreak beq SavRxDat its a null, go save it... | |
1193 clr <SigSent clear signal sent flag | |
1194 cmpa <V.INTR interrupt? | |
1195 bne Chk.Quit no, go on... | |
1196 ldb #S$Intrpt | |
1197 bra SendSig | |
1198 Chk.Quit cmpa <V.QUIT abort? | |
1199 bne Chk.PChr no, go on... | |
1200 ldb #S$Abort | |
1201 SendSig pshs a save Rx data | |
1202 lda <V.LPRC get last process' ID | |
1203 os9 F$Send | |
1204 puls a recover Rx data | |
1205 stb <SigSent set signal sent flag | |
1206 bra SavRxDat go save Rx data... | |
1207 Chk.PChr cmpa <V.PCHR pause? | |
1208 bne Chk.Flow no, go on... | |
1209 ldx <V.DEV2 attached device defined? | |
1210 beq SavRxDat no, go save Rx data... | |
1211 sta V.PAUS,x yes, pause attached device | |
1212 bra SavRxDat go save Rx data... | |
1213 Chk.Flow ldb <Wrk.Type | |
1214 bitb #TxSwFlow Tx data software flow control enabled? | |
1215 beq SavRxDat no, go save Rx data... | |
1216 cmpa <V.XON XON? | |
1217 bne Chk.XOff no, go on... | |
1218 ldb #^FCTxXOff clear XOFF received bit | |
1219 andb <FloCtlTx clear software Tx flow control flag | |
1220 bra SetTxFlo go save new Tx flow control flags... | |
1221 Chk.XOff cmpa <V.XOFF XOFF? | |
1222 bne SavRxDat no, go save Rx data... | |
1223 ldb #FCTxXOff set XOFF received bit | |
1224 orb <FloCtlTx set software Tx flow control flag | |
1225 SetTxFlo stb <FloCtlTx save new Tx flow control flags | |
1226 lbra ChkTrDCD go check DCD transition... | |
1227 SavRxDat ldb <FloCtlRx get Rx flow control flags | |
1228 andb #^FCRxSend clear possible pending XOFF flag | |
1229 stb <FloCtlRx save Rx flow control flags | |
1230 ldy <RxBufPut get Rx buffer input pointer | |
1231 ldx <RxDatLen Rx get Rx buffer data length | |
1232 cmpx <RxBufSiz Rx buffer already full? | |
1233 blo NotOvFlo no, go skip overflow error... | |
1234 lda #OvrFloEr mark Rx buffer overflow | |
1235 lbsr AccumErr go save accumulated errors... | |
1236 bra DisRxFlo go ensure Rx is disabled (if possible) | |
1237 NotOvFlo sta ,y+ save Rx data | |
1238 cmpy <RxBufEnd end of Rx buffer? | |
1239 blo SetLayDn no, go keep laydown pointer | |
1240 ldy <RxBufPtr get Rx buffer start address | |
1241 SetLayDn sty <RxBufPut set new Rx data laydown pointer | |
1242 leax 1,x one more byte in Rx buffer | |
1243 stx <RxDatLen save new Rx data length | |
1244 cmpx <RxBufMax at or past maximum fill point? | |
1245 blo SgnlRxD no, go check Rx data signal... | |
1246 DisRxFlo ldx <V.PORT | |
1247 lda <Wrk.XTyp | |
1248 ldb CmdReg,x get current Command register contents | |
1249 bita #ForceDTR forced DTR? | |
1250 bne DisRxRTS yes, go check RTS disable... | |
1251 lda <Wrk.Type | |
1252 bita #DSRFlow DSR/DTR flow control enabled? | |
1253 beq DisRxRTS no, go check RTS disable | |
1254 lda <FloCtlRx get Rx flow control flags | |
1255 ora #FCRxDTR mark Rx disabled by DTR | |
1256 sta <FloCtlRx save new Rx flow control flags | |
1257 andb #^Cmd.DTR clear (disable) DTR bit | |
1258 DisRxRTS lda <Wrk.Type | |
1259 bita #RTSFlow CTS/RTS flow control enabled? | |
1260 beq NewRxFlo no, go set new Rx flow control... | |
1261 lda <FloCtlTx get Tx flow control flags | |
1262 bita #FCTxBrk currently transmitting line Break? | |
1263 bne NewRxFlo yes, go set new Rx flow control... | |
1264 lda <FloCtlRx get Rx flow control flags | |
1265 ora #FCRxRTS mark Rx disabled by RTS | |
1266 sta <FloCtlRx save new Rx flow control flags | |
1267 andb #^Cmd.TIRB clear Tx IRQ/RTS/Break control bits (disable RTS) | |
1268 NewRxFlo stb CmdReg,x set/clear DTR and RTS in Command register | |
1269 lda <Wrk.Type | |
1270 bita #RxSwFlow Rx software flow control enabled? | |
1271 beq SgnlRxD no, go check Rx data signal... | |
1272 lda <V.XOFF XOFF character defined? | |
1273 beq SgnlRxD no, go check Rx data signal... | |
1274 ldb <FloCtlRx get Rx flow control flags | |
1275 bitb #FCRxSent XOFF already sent? | |
1276 bne SgnlRxD yes, go check Rx data signal... | |
1277 orb #FCRxSend set send XOFF flag | |
1278 stb <FloCtlRx set new Rx flow control flags | |
1279 ldb StatReg,x get new Status register | |
1280 bitb #Stat.TxE Tx data register empty? | |
1281 beq SgnlRxD no, go skip XOFF this time... | |
1282 sta DataReg,x write XOFF character | |
1283 ldb #FCRxSent set XOFF sent flag | |
1284 orb <FloCtlRx mask in current Rx flow control flags | |
1285 andb #^FCRxSend clear send XOFF flag | |
1286 stb <FloCtlRx save new flow control flags | |
1287 SgnlRxD ldb <SigSent already sent abort/interrupt signal? | |
1288 bne ChkTrDCD yes, go check DCD transition... | |
1289 lda <SSigPID Rx data signal process ID? | |
1290 beq ChkTrDCD none, go check DCD transition... | |
1291 ldb <SSigSig Rx data signal code | |
1292 clr <SSigPID clear Rx data signal | |
1293 os9 F$Send | |
1294 | |
1295 ChkTrDCD ldx <V.PORT | |
1296 lda <Cpy.Stat get Status register copy | |
1297 tfr a,b copy it... | |
1298 eora <CpyDCDSR mark changes from old DSR+DCD status copy | |
1299 andb #Stat.DSR!Stat.DCD clear all but DSR+DCD status | |
1300 stb <CpyDCDSR save new DSR+DCD status copy | |
1301 bita <Mask.DCD DCD transition? | |
1302 beq CkSuspnd no, go check for suspended process... | |
1303 bitb <Mask.DCD DCD disabled now? | |
1304 beq SgnlDCD no, go check DCD signal... | |
1305 lda <Wrk.Type | |
1306 bita #MdmKill modem kill enabled? | |
1307 beq SgnlDCD no, go on... | |
1308 ldx <V.PDLHd path descriptor list header | |
1309 beq StCDLost no list, go set DCD lost error... | |
1310 lda #PST.DCD DCD lost flag | |
1311 PDListLp sta PD.PST,x set path status flag | |
1312 ldx PD.PLP,x get next path descriptor in list | |
1313 bne PDListLp not end of list, go do another... | |
1314 StCDLost lda #DCDLstEr DCD lost error flag | |
1315 lbsr AccumErr go save accumulated errors... | |
1316 SgnlDCD lda <CDSigPID get process ID, send a DCD signal? | |
1317 beq CkSuspnd no, go check for suspended process... | |
1318 ldb <CDSigSig get DCD signal code | |
1319 clr <CDSigPID clear DCD signal | |
1320 os9 F$Send | |
1321 | |
1322 CkSuspnd clrb clear Carry (for exit) and LSB of process descriptor address | |
1323 lda <V.WAKE anybody waiting? ([D]=process descriptor address) | |
1324 beq IRQExit no, go return... | |
1325 stb <V.WAKE mark I/O done | |
1326 tfr d,x copy process descriptor pointer | |
1327 lda P$State,x get state flags | |
1328 anda #^Suspend clear suspend state | |
1329 sta P$State,x save state flags | |
1330 IRQExit puls dp,pc recover system DP, return... | |
1331 endc | |
1332 endc | |
1333 | |
1334 | |
1335 emod | |
1336 ModSize equ * | |
1337 end | |
1338 |