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comparison level1/modules/llcoco3fpga.asm @ 3253:6dec962b072d

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Fix up comments and whitespace in llcoco3fpga.asm No code changes.
author Tormod Volden <debian.tormod@gmail.com>
date Sat, 07 Apr 2018 22:56:07 +0200
parents c505ae3120c4
children
comparison
equal deleted inserted replaced
3252:c505ae3120c4 3253:6dec962b072d
6 * $FF64 (Control Register Write) 6 * $FF64 (Control Register Write)
7 * Bit 7 : SD Enable 7 * Bit 7 : SD Enable
8 * Bit 6 : Enable Interrupt 8 * Bit 6 : Enable Interrupt
9 * Bits 5-1 : not used 9 * Bits 5-1 : not used
10 * Bit 0 : SPI Device Select #1 (DE1 SD Card) 10 * Bit 0 : SPI Device Select #1 (DE1 SD Card)
11 * 11 *
12 * $FF64 (Status Register Read) 12 * $FF64 (Status Register Read)
13 * Bit 7 : IRQ Active 13 * Bit 7 : IRQ Active
14 * Bits 6-2 : not used 14 * Bits 6-2 : not used
15 * Bit 1 : SD Card Locked (Write Protect) 15 * Bit 1 : SD Card Locked (Write Protect)
16 * Bit 0 : SD Installed 16 * Bit 0 : SD Installed
23 * 1 2012/06/16 Gary Becker 23 * 1 2012/06/16 Gary Becker
24 * Rewritten to work with 8 bit SPI on CoCo3FPGA 24 * Rewritten to work with 8 bit SPI on CoCo3FPGA
25 * 2 2015/06/06 Gary Becker 25 * 2 2015/06/06 Gary Becker
26 * Removed any code to enable multiple slots (single slot only) 26 * Removed any code to enable multiple slots (single slot only)
27 27
28 *Level EQU 2
29
30 NAM llcoco3fpga 28 NAM llcoco3fpga
31 TTL Low-level SDHC/SD/MMC driver 29 TTL Low-level SDHC/SD/MMC driver
32 30
33 USE defsfile 31 USE defsfile
34 USE rbsuper.d 32 USE rbsuper.d
35 33
36 tylg SET Sbrtn+Objct 34 tylg SET Sbrtn+Objct
37 atrv SET ReEnt+rev 35 atrv SET ReEnt+rev
38 rev SET 0 36 rev SET 0
39 edition SET 4 37 edition SET 4
40 38
41 MOD eom,name,tylg,atrv,start,0 39 MOD eom,name,tylg,atrv,start,0
42 40
43 ORG V.LLMem 41 ORG V.LLMem
44 * Low-level driver static memory area 42 * Low-level driver static memory area
45 SEC_CNT RMB 1 Number of sectors to transfer 43 SEC_CNT RMB 1 Number of sectors to transfer
46 SEC_LOC RMB 2 Where they are or where they go 44 SEC_LOC RMB 2 Where they are or where they go
47 SEC_ADD RMB 3 LSN of sector 45 SEC_ADD RMB 3 LSN of sector
48 SDVersion RMB 1 0 = Byte Addressable SD 46 SDVersion RMB 1 0 = Byte Addressable SD
49 * !0 = Sector Addressable SD 47 * !0 = Sector Addressable SD
50 CMDStorage RMB 1 Command storage area for read/write CMDs 48 CMDStorage RMB 1 Command storage area for read/write CMDs
51 SD_SEC_ADD RMB 4 Four bytes because some devices are byte addressable 49 SD_SEC_ADD RMB 4 Four bytes because some devices are byte addressable
52 CMDCRC RMB 1 50 CMDCRC RMB 1
53 51
54 ************************************** 52 **************************************
55 * Command bytes storage area 53 * Command bytes storage area
56 ************************************** 54 **************************************
57 CMD0 fcb $40,$00,$00,$00,$00,$95 55 CMD0 fcb $40,$00,$00,$00,$00,$95
58 *CMD1 fcb $41,$00,$00,$00,$00,$95 56 *CMD1 fcb $41,$00,$00,$00,$00,$95
59 CMD8 fcb $48,$00,$00,$01,$AA,$87 57 CMD8 fcb $48,$00,$00,$01,$AA,$87
60 *CMD13 fcb $4D,$00,$00,$00,$00,$95 58 *CMD13 fcb $4D,$00,$00,$00,$00,$95
61 CMD16 fcb $50,$00,$00,$02,$00,$FF was 95 59 CMD16 fcb $50,$00,$00,$02,$00,$FF was 95
62 ACMD41V1 fcb $69,$00,$00,$00,$00,$FF was 95 60 ACMD41V1 fcb $69,$00,$00,$00,$00,$FF was 95
63 ACMD41V2 fcb $69,$40,$00,$00,$00,$FF was 95 61 ACMD41V2 fcb $69,$40,$00,$00,$00,$FF was 95
64 CMD55 fcb $77,$00,$00,$00,$00,$FF was 95 62 CMD55 fcb $77,$00,$00,$00,$00,$FF was 95
65 CMD58 fcb $7A,$00,$00,$00,$00,$FF was 95 63 CMD58 fcb $7A,$00,$00,$00,$00,$FF was 95
66 64
67 * Read/Write commands 65 * Read/Write commands
68 CMDRead EQU $5100 Command to read a single block 66 CMDRead EQU $5100 Command to read a single block
69 CMDWrite EQU $5800 Command to write a sector 67 CMDWrite EQU $5800 Command to write a sector
70 CMDEnd EQU $00FF Every command ends with $95 68 CMDEnd EQU $00FF Every command ends with $95
71 * SPI Address Equates 69 * SPI Address Equates
72 * SPI Control Register 70 * SPI Control Register
73 SPICTRL EQU 0 71 SPICTRL EQU 0
74 SLOT_SEL_0 EQU 1 72 SLOT_SEL_0 EQU 1
75 SPI_IRQ_EN EQU $40 73 SPI_IRQ_EN EQU $40
76 SPI_EN EQU $80 Sets SPI enable and IRQ enable 74 SPI_EN EQU $80 Sets SPI enable and IRQ enable
77 * SPI Status Register 75 * SPI Status Register
78 SPISTAT EQU 0 76 SPISTAT EQU 0
79 CARD_DET_0 EQU 1 77 CARD_DET_0 EQU 1
80 CARD_LOCK_0 EQU 2 78 CARD_LOCK_0 EQU 2
81 IRQ_SLOT_0 EQU $80 79 IRQ_SLOT_0 EQU $80
82 * SPI Transmit / Receive Register 80 * SPI Transmit / Receive Register
83 SPIDAT EQU 1 81 SPIDAT EQU 1
84 * Test 8 bit LED display 82 * Test 8 bit LED display
85 SPITRACE EQU $FF66 83 SPITRACE EQU $FF66
86 84
87 name FCS /llcoco3fpga/ 85 name FCS /llcoco3fpga/
88 86
120 * Setup read command 118 * Setup read command
121 orcc #IntMasks disable interrupts 119 orcc #IntMasks disable interrupts
122 ldx V.Port-UOFFSET,u Get address of hardware 120 ldx V.Port-UOFFSET,u Get address of hardware
123 lda V.SectCnt,u Get number of sectors to read 121 lda V.SectCnt,u Get number of sectors to read
124 sta SEC_CNT,u Save it to our usable storage 122 sta SEC_CNT,u Save it to our usable storage
125 ldd V.CchPSpot,u get the location to copy the sector into 123 ldd V.CchPSpot,u get the location to copy the sector into
126 std SEC_LOC,u Save it into our usable storage 124 std SEC_LOC,u Save it into our usable storage
127 ldd V.PhysSect,u Copy Sector Adrress into our storage 125 ldd V.PhysSect,u Copy Sector Adrress into our storage
128 std SEC_ADD,u 126 std SEC_ADD,u
129 lda V.PhysSect+2,u 127 lda V.PhysSect+2,u
130 sta SEC_ADD+2,u 128 sta SEC_ADD+2,u
131 lda SPISTAT,x 129 lda SPISTAT,x
132 lsra 130 lsra
133 bcc EREAD No card installed, so no reads 131 bcc EREAD No card installed, so no reads
134 lphr lda SEC_CNT,u 132 lphr lda SEC_CNT,u
135 ldd #CMDRead 133 ldd #CMDRead
136 std CMDStorage,u Read command and clear MSB of address 134 std CMDStorage,u Read command and clear MSB of address
137 ldd #CMDEnd 135 ldd #CMDEnd
138 std SD_SEC_ADD+3,u Clear LSB of address and CRC 136 std SD_SEC_ADD+3,u Clear LSB of address and CRC
139 rd_loop lda #(SPI_EN+SLOT_SEL_0) but not IRQ enable 137 rd_loop lda #(SPI_EN+SLOT_SEL_0) but not IRQ enable
140 bsr LSNMap0 Setup the appropriate LSN value for the card, build command, 138 bsr LSNMap0 Setup the appropriate LSN value for the card, build command,
141 * setup SPI to access the card, and sends command 139 * setup SPI to access the card, and sends command
142 bcs EREAD If we timed out, branch with error 140 bcs EREAD If we timed out, branch with error
143 bne EREAD If the R1 was not 0 141 bne EREAD If the R1 was not 0
144 142
145 ldy SEC_LOC,u Get the sector buffer address 143 ldy SEC_LOC,u Get the sector buffer address
148 cmpa #$FE Do we need more cycles?????? 146 cmpa #$FE Do we need more cycles??????
149 nop 147 nop
150 bne lprd 148 bne lprd
151 * Read the 512 Byte sector 149 * Read the 512 Byte sector
152 * we need a minumum of 4 CPU cycles to read in the 8 bits 150 * we need a minumum of 4 CPU cycles to read in the 8 bits
153 RDSectorLoop lda SPIDAT,x 151 RDSectorLoop lda SPIDAT,x
154 sta ,y+ ? cycles ????????????? 152 sta ,y+ ? cycles ?????????????
155 nop might be too much ??????? 153 nop might be too much ???????
156 lda SPIDAT,x 154 lda SPIDAT,x
157 sta ,y+ 155 sta ,y+
158 decb 156 decb
161 lda SPIDAT,x Send 2x FF to get the CRC 159 lda SPIDAT,x Send 2x FF to get the CRC
162 sty SEC_LOC,u Save out buffer pointer 160 sty SEC_LOC,u Save out buffer pointer
163 * nop Might be too many cycles ????????? 161 * nop Might be too many cycles ?????????
164 lda SPIDAT,x We ignore the CRC 162 lda SPIDAT,x We ignore the CRC
165 dec SEC_CNT,u decrement # of hw sectors to read 163 dec SEC_CNT,u decrement # of hw sectors to read
166 beq finird if zero, we are finished 164 beq finird if zero, we are finished
167 *Increment sector number by 1 for sector addressable or $200 for byte addressable 165 *Increment sector number by 1 for sector addressable or $200 for byte addressable
168 incsec inc SEC_ADD+2,u add one to 3 byte LSN 166 incsec inc SEC_ADD+2,u add one to 3 byte LSN
169 bne lphr if we are at 0 then we need to add 167 bne lphr if we are at 0 then we need to add
170 inc SEC_ADD+1,u the carry to the next byte 168 inc SEC_ADD+1,u the carry to the next byte
171 bne lphr 169 bne lphr
172 inc SEC_ADD,u 170 inc SEC_ADD,u
173 bra lphr 171 bra lphr
175 * No errors, exit 173 * No errors, exit
176 finird 174 finird
177 ldd #$0000 Disable SPI and exit 175 ldd #$0000 Disable SPI and exit
178 sta SPICTRL,x 176 sta SPICTRL,x
179 andcc #^(IntMasks+Carry) Renable Interrupts and clear carry 177 andcc #^(IntMasks+Carry) Renable Interrupts and clear carry
180 rts return 178 rts return
181 179
182 ************** 180 **************
183 * LSNMap 181 * LSNMap
184 * Take physical LSN and convert into SDHC/SD/MMC LSN 182 * Take physical LSN and convert into SDHC/SD/MMC LSN
185 * SD/MMC uses a 32 bit byte mapping for the LSN, so we must shift the logical LSN up one bit 183 * SD/MMC uses a 32 bit byte mapping for the LSN, so we must shift the logical LSN up one bit
191 LSNMap0 189 LSNMap0
192 sta SPICTRL,x 190 sta SPICTRL,x
193 nop 191 nop
194 lda SPIDAT,x Send 1 FF 192 lda SPIDAT,x Send 1 FF
195 lda SDVersion,u 193 lda SDVersion,u
196 bne secadd GoTo Sector Address type 194 bne secadd GoTo Sector Address type
197 *Save the sector number into the command 195 *Save the sector number into the command
198 ldd SEC_ADD+1,u bytes 1 and 2 (middle and LSB) 196 ldd SEC_ADD+1,u bytes 1 and 2 (middle and LSB)
199 aslb Byte address needs to be shifter one more bit 197 aslb Byte address needs to be shifter one more bit
200 rola 198 rola
201 std SD_SEC_ADD+1,u and stored in the first 3 bytes of a 4 byte address 199 std SD_SEC_ADD+1,u and stored in the first 3 bytes of a 4 byte address
202 lda SEC_ADD,u MSB 200 lda SEC_ADD,u MSB
203 rola 201 rola
204 sta SD_SEC_ADD,u 202 sta SD_SEC_ADD,u
205 bra merge 203 bra merge
206 secadd 204 secadd
207 ldd SEC_ADD+1,u Save the sector number into our storage 205 ldd SEC_ADD+1,u Save the sector number into our storage
208 std SD_SEC_ADD+2,u Store in the last three bytes of the 4 byte address 206 std SD_SEC_ADD+2,u Store in the last three bytes of the 4 byte address
209 lda SEC_ADD,u 207 lda SEC_ADD,u
210 sta SD_SEC_ADD+1,u 208 sta SD_SEC_ADD+1,u
211 merge lda SPIDAT,x Send 1 FF 209 merge lda SPIDAT,x Send 1 FF
212 LSNMap1 210 LSNMap1
218 * Y = Address of first byte of command sequence 216 * Y = Address of first byte of command sequence
219 * Exit: 217 * Exit:
220 * Registers preserved: all but A/B/X 218 * Registers preserved: all but A/B/X
221 cmdsend 219 cmdsend
222 lda ,y 220 lda ,y
223 sta $FF66 221 sta SPITRACE
224 ldb #6 222 ldb #6
225 cslp lda ,y+ 223 cslp lda ,y+
226 sta SPIDAT,x 224 sta SPIDAT,x
227 decb 225 decb
228 bne cslp 226 bne cslp
232 * Exit: A = R1 230 * Exit: A = R1
233 * CC.C = 0 OK 231 * CC.C = 0 OK
234 * CC.C = 1 ERROR 232 * CC.C = 1 ERROR
235 * Registers preserved: all but A/B 233 * Registers preserved: all but A/B
236 GetR1 234 GetR1
237 andcc #^Carry Clear Carry 235 andcc #^Carry Clear Carry
238 ldb #$00 Probably too much 236 ldb #$00 Probably too much
239 lpgtr1 lda SPIDAT,x 237 lpgtr1 lda SPIDAT,x
240 bpl finigtr1 238 bpl finigtr1
241 decb 239 decb
242 bne lpgtr1 240 bne lpgtr1
243 comb set carry for error 241 comb set carry for error
244 finigtr1 rts 242 finigtr1 rts
245 243
259 * All registers may be modified 257 * All registers may be modified
260 * Static variables may NOT be modified 258 * Static variables may NOT be modified
261 ll_write 259 ll_write
262 orcc #IntMasks disable interrupts 260 orcc #IntMasks disable interrupts
263 ldx V.Port-UOFFSET,u Get address of hardware 261 ldx V.Port-UOFFSET,u Get address of hardware
264 lda V.SectCnt,u Get number of sectors to write` 262 lda V.SectCnt,u Get number of sectors to write
265 sta SEC_CNT,u Save it to our usable storage 263 sta SEC_CNT,u Save it to our usable storage
266 ldd V.CchPSpot,u get the location to of the sector send 264 ldd V.CchPSpot,u get the location to of the sector send
267 std SEC_LOC,u Save it into our usable storage 265 std SEC_LOC,u Save it into our usable storage
268 ldd V.PhysSect,u Copy Sector Adrress into our storage 266 ldd V.PhysSect,u Copy Sector Adrress into our storage
269 std SEC_ADD,u 267 std SEC_ADD,u
270 lda V.PhysSect+2,u 268 lda V.PhysSect+2,u
271 sta SEC_ADD+2,u 269 sta SEC_ADD+2,u
272 lda SPISTAT,x 270 lda SPISTAT,x
273 lsra 271 lsra
274 lbcc EWRITE No card installed, so no writes 272 lbcc EWRITE No card installed, so no writes
275 lsra 273 lsra
276 lbcs EWP Write Protected, then exit with WP error 274 lbcs EWP Write Protected, then exit with WP error
277 * The big read sector loop comes to here 275 * The big read sector loop comes to here
278 lphw ldd #CMDWrite 276 lphw ldd #CMDWrite
279 std CMDStorage,u 277 std CMDStorage,u
280 ldd #CMDEnd 278 ldd #CMDEnd
281 std SD_SEC_ADD+3,u LSB of address and CRC 279 std SD_SEC_ADD+3,u LSB of address and CRC
282 wr_loop lda #(SPI_EN+SLOT_SEL_0) 280 wr_loop lda #(SPI_EN+SLOT_SEL_0)
283 bsr LSNMap0 Setup the appropriate LSN value for the card, build command, 281 bsr LSNMap0 Setup the appropriate LSN value for the card, build command,
284 * setup SPI to access the card, and sends command 282 * setup SPI to access the card, and sends command
285 bcs EWRITE 283 bcs EWRITE
286 bne EWRITE 284 bne EWRITE
287 285
288 lda SPIDAT,x 2 bytes >= 1 byte after R1 286 lda SPIDAT,x 2 bytes >= 1 byte after R1
289 nop Might not be enough ????? 287 nop Might not be enough ?????
290 nop 288 nop
291 lda SPIDAT,x 289 lda SPIDAT,x
292 ldd #$FE00 Start of sector byte and clear counter 290 ldd #$FE00 Start of sector byte and clear counter
293 ldy SEC_LOC,u get the location of the sectors(s) to write 291 ldy SEC_LOC,u get the location of the sectors(s) to write
294 sta SPIDAT,x Mark the start of the sector 292 sta SPIDAT,x Mark the start of the sector
295 nop Too much ??????? 293 nop Too much ???????
296 * Write the 512 Byte sector 294 * Write the 512 Byte sector
297 WRSectorLoop lda ,y+ 295 WRSectorLoop lda ,y+
298 sta SPIDAT,x 296 sta SPIDAT,x
299 nop 297 nop
300 lda ,y+ 298 lda ,y+
301 sta SPIDAT,x 299 sta SPIDAT,x
302 decb 300 decb
318 lda SPIDAT,x 316 lda SPIDAT,x
319 cmpa #$E5 Response - Data accepted token if this is not it, then we have an issue 317 cmpa #$E5 Response - Data accepted token if this is not it, then we have an issue
320 beq fnd0 First byte? if not, check one more byte. 318 beq fnd0 First byte? if not, check one more byte.
321 lda SPIDAT,x 319 lda SPIDAT,x
322 cmpa #$E5 Response - Data accepted token if this is not it, then we have an issue 320 cmpa #$E5 Response - Data accepted token if this is not it, then we have an issue
323 bne EWRITE Write error 321 bne EWRITE Write error
324 * Check to see if the write is complete 322 * Check to see if the write is complete
325 fnd0 lda SPIDAT,x 323 fnd0 lda SPIDAT,x
326 beq lpwr2 324 beq lpwr2
327 bra fnd0 Ths beq and bra could be a bne, but I want the extra cycles 325 bra fnd0 Ths beq and bra could be a bne, but I want the extra cycles
328 lpwr2 lda SPIDAT,x 326 lpwr2 lda SPIDAT,x
329 cmpa #$FF 327 cmpa #$FF
330 beq wfin 328 beq wfin
331 bra lpwr2 329 bra lpwr2
332 wfin ldb #10 Lets send 16 more FF just in case 330 wfin ldb #10 Lets send 10 more FF just in case
333 finlp lda SPIDAT,x 331 finlp lda SPIDAT,x
334 decb 332 decb
335 bne finlp 333 bne finlp
336 dec SEC_CNT,u decrement # of hw sectors to read 334 dec SEC_CNT,u decrement # of hw sectors to read
337 beq finiwr if zero, we are finished 335 beq finiwr if zero, we are finished
338 inc SEC_ADD+2,u add one to 3 byte LSN 336 inc SEC_ADD+2,u add one to 3 byte LSN
339 bne lphw if we are at 0 then we need to add 337 bne lphw if we are at 0 then we need to add
340 inc SEC_ADD+1,u the carry to the next byte 338 inc SEC_ADD+1,u the carry to the next byte
341 lbne lphw 339 lbne lphw
342 inc SEC_ADD,u 340 inc SEC_ADD,u
352 EWRITE 350 EWRITE
353 ldd #$0000+E$Write A=Enable SPI Interface, but not CS 351 ldd #$0000+E$Write A=Enable SPI Interface, but not CS
354 * B=Write Error 352 * B=Write Error
355 bra RETERR 353 bra RETERR
356 EWP 354 EWP
357 ldd #$0000+E$WP A=Enable SPI Interface, but not CS 355 ldd #$0000+E$WP A=Enable SPI Interface, but not CS
358 * B=Write Protect Error 356 * B=Write Protect Error
359 357
360 RETERR 358 RETERR
361 sta SPICTRL,x Set the hardware 359 sta SPICTRL,x Set the hardware
362 andcc #^IntMasks Enable interrupts 360 andcc #^IntMasks Enable interrupts
376 * 374 *
377 * Note: This routine is called ONCE: for the first device 375 * Note: This routine is called ONCE: for the first device
378 * IT IS NOT CALLED PER DEVICE! 376 * IT IS NOT CALLED PER DEVICE!
379 * 377 *
380 ll_init 378 ll_init
381 orcc #IntMasks disable interrupts 379 orcc #IntMasks disable interrupts
382 lda $FFD9 Speed up 380 lda $FFD9 Speed up
383 ldx V.PORT-UOFFSET,u load x with the hw address for the IRQ routine 381 ldx V.PORT-UOFFSET,u load x with the hw address for the IRQ routine
384 lda SPISTAT,x 382 lda SPISTAT,x
385 lsra 383 lsra
386 bcc NOTRDY If there is no card, nothing to do 384 bcc NOTRDY If there is no card, nothing to do
387 * Enable SPI 385 * Enable SPI
388 ldd #SPI_EN*256+$10 Enable SPI Interface, but not CS 386 ldd #SPI_EN*256+$10 Enable SPI Interface, but not CS
389 * 16*8 cycles is >= 74 387 * 16*8 cycles is >= 74
390 sta SPICTRL,x 388 sta SPICTRL,x
391 389
392 *send at least 74 clock cycles with no SS, 12*8 = 96 390 *send at least 74 clock cycles with no SS, 16*8 = 128
393 lpff lda SPIDAT,x Send FF 391 lpff lda SPIDAT,x Send FF
394 decb 2 cycles, need 4 392 decb 2 cycles, need 4
395 * nop 2 cycles 393 * nop 2 cycles
396 bne lpff 3 Cycles 394 bne lpff 3 Cycles
397 *Initialize card 0 395 *Initialize card 0
403 * Send CMD0 401 * Send CMD0
404 lda SPIDAT,x Send 1 FF 402 lda SPIDAT,x Send 1 FF
405 nop ????????? enough 403 nop ????????? enough
406 leay CMD0,pcr Might need more cycles ??????? 404 leay CMD0,pcr Might need more cycles ???????
407 lda SPIDAT,x Send 1 more FF 405 lda SPIDAT,x Send 1 more FF
408 lbsr cmdsend Also does a GETR1 406 lbsr cmdsend Also does a GETR1
409 bcs NOTRDY 407 bcs NOTRDY
410 anda #$7E Idle is ok 408 anda #$7E Idle is ok
411 bne NOTRDY but nothing else 409 bne NOTRDY but nothing else
412 410
413 * Send CMD8 411 * Send CMD8
414 lda SPIDAT,x Send 1 FF 412 lda SPIDAT,x Send 1 FF
415 nop ?????? enough 413 nop ?????? enough
416 leay CMD8,pcr Might need more cycles ?????? 414 leay CMD8,pcr Might need more cycles ??????
417 lda SPIDAT,x Sens 1 more FF 415 lda SPIDAT,x Send 1 more FF
418 lbsr cmdsend Also does an GETR1 416 lbsr cmdsend Also does an GETR1
419 bcs SDV1 417 bcs SDV1
420 anda #$7E 418 anda #$7E
421 bne SDV1 419 bne SDV1
422 lda SPIDAT,x Byte 1 of R3/R7, through it away 420 lda SPIDAT,x Byte 1 of R3/R7, throw it away
423 nop 421 nop
424 nop might need more ???????? 422 nop might need more ????????
425 nop 423 nop
426 lda SPIDAT,x Byte 2 of R3/R7, throught it away 424 lda SPIDAT,x Byte 2 of R3/R7, throw it away
427 nop 425 nop
428 nop 426 nop
429 nop 427 nop
430 lda SPIDAT,x Byte 3 of R3/R7, should be 1 428 lda SPIDAT,x Byte 3 of R3/R7, should be 1
431 cmpa #$01 2 cycles 429 cmpa #$01 2 cycles
432 bne NOTRDY 2 cycles 430 bne NOTRDY 2 cycles
433 nop 431 nop
434 lda SPIDAT,x Byte 4 of R3/R7, should be $AA 432 lda SPIDAT,x Byte 4 of R3/R7, should be $AA
435 cmpa #$AA 2 cycles 433 cmpa #$AA 2 cycles
436 bne NOTRDY 2 cycles 434 bne NOTRDY 2 cycles
437 nop 435 nop
438 436
439 * Send ACMD41 by first CMD55 437 * Send ACMD41 by first CMD55
440 loop41V2 lda SPIDAT,x Send 1 FF 438 loop41V2 lda SPIDAT,x Send 1 FF
441 nop 439 nop
442 leay CMD55,pcr might need more ?????? 440 leay CMD55,pcr might need more ??????
443 lda SPIDAT,x Send 1 FF 441 lda SPIDAT,x Send 1 FF
444 lbsr cmdsend Also does an GETR1 442 lbsr cmdsend Also does an GETR1
445 bcs NOTRDY 443 bcs NOTRDY
446 anda #$7E Idle is ok 444 anda #$7E Idle is ok
447 bne NOTRDY but nothing else 445 bne NOTRDY but nothing else
448 446
449 * Then send ACMD41 447 * Then send ACMD41
450 lda SPIDAT,x 448 lda SPIDAT,x
451 nop 449 nop
452 leay ACMD41V2,pcr 450 leay ACMD41V2,pcr
453 lda SPIDAT,x 451 lda SPIDAT,x
454 lbsr cmdsend 452 lbsr cmdsend
455 bcs NOTRDY No response 453 bcs NOTRDY No response
456 beq Send58 If 0 then CMD58 454 beq Send58 If 0 then CMD58
457 cmpa #$01 if 1 then try again 455 cmpa #$01 if 1 then try again
458 beq loop41V2 456 beq loop41V2
459 lbra NOTRDY 457 lbra NOTRDY
460 458
461 * Send CMD58 to V2 card 459 * Send CMD58 to V2 card
462 Send58 lda SPIDAT,x 460 Send58 lda SPIDAT,x
463 nop ?????? ENOUGH 461 nop ?????? ENOUGH
464 leay CMD58,pcr Read OCR 462 leay CMD58,pcr Read OCR
465 lda SPIDAT,x 463 lda SPIDAT,x
466 lbsr cmdsend 464 lbsr cmdsend
467 lbcs NOTRDY 465 lbcs NOTRDY
468 lda SPIDAT,x Byte 1 of OCR 466 lda SPIDAT,x Byte 1 of OCR
469 anda #$40 CCS bit 1= sector 0= byte 467 anda #$40 CCS bit 1= sector 0= byte
470 sta SDVersion,u 468 sta SDVersion,u
471 lda SPIDAT,x Byte 2 of R3/R7, through it away 469 lda SPIDAT,x Byte 2 of R3/R7, throw it away
472 nop 470 nop
473 nop 471 nop
474 lda SPIDAT,x Byte 3 of R3/R7, through it away 472 lda SPIDAT,x Byte 3 of R3/R7, throw it away
475 nop 473 nop
476 nop 474 nop
477 lda SPIDAT,x Byte 4 of R3/R7, through it away 475 lda SPIDAT,x Byte 4 of R3/R7, throw it away
478 lda SDVersion,u 0 = byte addressable, !0 = block addressable 476 lda SDVersion,u 0 = byte addressable, !0 = block addressable
479 bne FININIT 477 bne FININIT
480 bra Send16 478 bra Send16
481 479
482 * Send ACMD41 by first CMD55 480 * Send ACMD41 by first CMD55
484 482
485 loop41V1 lda SPIDAT,x Get extra bytes in case we got a bad R7 previously 483 loop41V1 lda SPIDAT,x Get extra bytes in case we got a bad R7 previously
486 nop 484 nop
487 lda SPIDAT,x 485 lda SPIDAT,x
488 * nop 486 * nop
489 clr SDVersion,u Byte addressable 487 clr SDVersion,u Byte addressable
490 lda SPIDAT,x 488 lda SPIDAT,x
491 * nop 489 * nop
492 leay CMD55,pcr 490 leay CMD55,pcr
493 lda SPIDAT,x 491 lda SPIDAT,x
494 lbsr cmdsend 492 lbsr cmdsend
495 lbcs NOTRDY 493 lbcs NOTRDY
496 anda #$7E Idle is ok 494 anda #$7E Idle is ok
497 lbne NOTRDY but nothing else 495 lbne NOTRDY but nothing else
498 496
499 * Then send ACMD41 497 * Then send ACMD41
500 lda SPIDAT,x 498 lda SPIDAT,x
501 * nop 499 * nop
502 leay ACMD41V1,pcr 500 leay ACMD41V1,pcr
503 lda SPIDAT,x 501 lda SPIDAT,x
504 lbsr cmdsend 502 lbsr cmdsend
505 lbcs NOTRDY 503 lbcs NOTRDY
506 beq Send16 If 0 then CMD16 504 beq Send16 If 0 then CMD16
507 cmpa #$01 if 1 then try again 505 cmpa #$01 if 1 then try again
508 beq loop41V1 506 beq loop41V1
509 lbra NOTRDY 507 lbra NOTRDY
510 * Send CMD16 508 * Send CMD16
511 Send16 lda SPIDAT,x 509 Send16 lda SPIDAT,x
512 * nop 510 * nop
513 leay CMD16,pcr 511 leay CMD16,pcr
514 lda SPIDAT,x 512 lda SPIDAT,x
515 lbsr cmdsend 513 lbsr cmdsend
516 lbne NOTRDY but nothing else 514 lbne NOTRDY but nothing else
517 * Finish INIT 515 * Finish INIT
518 FININIT 516 FININIT
519 lda SPIDAT,x Send last FF 517 lda SPIDAT,x Send last FF
520 * nop 518 * nop
521 * lda SDVersion,u 519 * lda SDVersion,u
522 * sta $ff66 520 * sta SPITRACE
523 * lda #SPI_EN+SPI_IRQ_EN Turn on SPI and Interrupt and turn off CS 521 * lda #SPI_EN+SPI_IRQ_EN Turn on SPI and Interrupt and turn off CS
524 lda #SPI_EN Turn on SPI and turn off CS 522 lda #SPI_EN Turn on SPI and turn off CS
525 sta SPICTRL,x 523 sta SPICTRL,x
526 524
527 *Finished with initialization 525 *Finished with initialization
528 *Use the stat routine to return 526 *Use the stat routine to return
529 527
560 ll_term 558 ll_term
561 clrb 559 clrb
562 andcc #^Carry 560 andcc #^Carry
563 rts 561 rts
564 562
565 EMOD 563 EMOD
566 eom EQU * 564 eom EQU *
567 END 565 END