comparison level1/modules/rb1773.asm @ 1619:b113a1589fa3

Robert's additions to the source for SC-II support, and a bug fix to the verify routine.
author boisy
date Thu, 24 Jun 2004 21:18:08 +0000 (2004-06-24)
parents dc3272e71faa
children c228f9fbe3b8
comparison
equal deleted inserted replaced
1618:78b98373061d 1619:b113a1589fa3
1 ******************************************************************** 1 ********************************************************************
2 * rb1773 - Western Digital 1773 Disk Controller Driver 2 * rb1773 - Western Digital 1773 Disk Controller Driver
3 *
4 * $Id$
5 *
6 * This driver has been tested with the following controllers:
7 * - Tandy FD-502 "shortie" disk controller
8 * - Disto Super Controller I
9 * - Disto Super Controller II
10 *
11 * This driver can also be assembled to support the no-halt feature of
12 * the Disto Super Controller II.
13 *
3 * 14 *
4 * A lot of references to **.CYL or <u00B6 using 16 bit registers can be 15 * A lot of references to **.CYL or <u00B6 using 16 bit registers can be
5 * changed to 8 bit registers with a +1 offset, since track #'s >255 are 16 * changed to 8 bit registers with a +1 offset, since track #'s >255 are
6 * ignored 17 * ignored
7 * 18 *
8 * NOTE: 512 bytes is reserved as a physical sector buffer. Any reads/ 19 * NOTE: 512 bytes is reserved as a physical sector buffer. Any reads/
9 * writes are done from this buffer to the controller. Copies of the 256 20 * writes are done from this buffer to the controller. Copies of the 256
10 * byte chunk needed are done by a block memory move 21 * byte chunk needed are done by a block memory move
22 *
23 *
24 ********** DISTO SUPER CONTROLLER II NOTES **********
25 *
26 * SCII 0=standard controller 1=Disto Super Controller II
27 * SCIIALT 0=Normal I/O register 1=Alternative registers; See below
11 * 28 *
12 * Disto Super Controller II Registers: 29 * Disto Super Controller II Registers:
13 * 30 *
14 * $FF74 RW.Dat --- R/W Buffer data #1 31 * $FF74 RW.Dat --- R/W Buffer data #1
15 * $FF75 mirror of $FF74 32 * $FF75 mirror of $FF74
24 * Read D7 = FDC INT Status (Inverted) 41 * Read D7 = FDC INT Status (Inverted)
25 * $FF77 mirror of $FF76 42 * $FF77 mirror of $FF76
26 * #1: any write to $FF76-$FF77 clears Buffer counter 43 * #1: any write to $FF76-$FF77 clears Buffer counter
27 * #2: in buffered mode only 44 * #2: in buffered mode only
28 * 45 *
29 * $Id$ 46 * Alternate port is at $FF58-$FF5B in case of hardware conflicts.
30 * 47 *
31 * Edt/Rev YYYY/MM/DD Modified by 48 * Edt/Rev YYYY/MM/DD Modified by
32 * Comment 49 * Comment
33 * ------------------------------------------------------------------ 50 * ------------------------------------------------------------------
34 * 11 1993/05/12 ??? 51 * 11 1993/05/12 ???
41 * 11r1 2003/09/03 Boisy G. Pitre 58 * 11r1 2003/09/03 Boisy G. Pitre
42 * Added code to sense if HW is present or not and return error if not. 59 * Added code to sense if HW is present or not and return error if not.
43 * 60 *
44 * 1r0 2004/05/20 Boisy G. Pitre 61 * 1r0 2004/05/20 Boisy G. Pitre
45 * Restarted edition due to name change; backported to Level 1 62 * Restarted edition due to name change; backported to Level 1
63 *
64 * 2004/06/01 Robert Gault
65 * Added code to obtain an SCII driver, at least for the Sleep mode. It
66 * would be quite difficult and probably not worth the effort to permit
67 * selection of both Sleep and IRQ SCII drivers. However, both normal
68 * and Alt SCII I/O registers are supported.
69 *
70 * Cleaned up some errors in the last version of rb1773.
46 71
47 nam rb1773 72 nam rb1773
48 ttl Western Digital 1773 Disk Controller Driver 73 ttl Western Digital 1773 Disk Controller Driver
49 74
75 * These lines needed if assembling with on a Color computer.
76 *SCII set 1 * 0=not present 1=present
77 *SCIIALT set 1 * 0=normal address 1=alternate
78 SCIIHACK set 0 * 0=stock model 1=512 byte buffer
79 *H6309 set 1
80 *LEVEL set 2
81 * These lines needed if not using latest os9def files.
82 *TkPerSec set 60
83 *DPort set $FF40
84
85 * This should be changed for NitrOS9 project to "use defsfile"
50 IFP1 86 IFP1
51 use defsfile 87 use defsfile
52 ENDC 88 ENDC
53 89
54 tylg set Drivr+Objct 90 tylg set Drivr+Objct
59 * Configuration Settings 95 * Configuration Settings
60 N.Drives equ 4 number of drives to support 96 N.Drives equ 4 number of drives to support
61 TC9 equ 0 Set to 1 for TC9 special slowdowns 97 TC9 equ 0 Set to 1 for TC9 special slowdowns
62 PRECOMP equ 0 Set to 1 to turn on write precompensation 98 PRECOMP equ 0 Set to 1 to turn on write precompensation
63 99
100 * Disto Super Controller defs
101 IFEQ SCIIALT
102 RW.Dat equ $FF74
103 RW.Ctrl equ $FF76
104 ELSE
105 RW.Dat equ $FF58
106 RW.Ctrl equ $FF5A
107 ENDC
108
109
64 * WD-17X3 Definitions 110 * WD-17X3 Definitions
65 CtrlReg equ $00 Control register for Tandy controllers; not part of WD 111 CtrlReg equ $00 Control register for Tandy controllers; not part of WD
66 WD_Cmd equ $08 112 WD_Cmd equ $08
67 WD_Stat equ WD_Cmd 113 WD_Stat equ WD_Cmd
68 WD_Trak equ $09 114 WD_Trak equ $09
69 WD_Sect equ $0A 115 WD_Sect equ $0A
70 WD_Data equ $0B 116 WD_Data equ $0B
71 117
72 * WD-17X3 Commands 118 * WD-17X3 Commands
73 S$FrcInt equ $D0 119 S$FrcInt equ $D0 Force interrupt
74 120
75 * Control Register Definitions 121 * Control Register Definitions
76 C_HALT equ %10000000 Halt line to CPU is active when set 122 C_HALT equ %10000000 Halt line to CPU is active when set
77 C_SIDSEL equ %01000000 Side select (0 = front side, 1 = back side) 123 C_SIDSEL equ %01000000 Side select (0 = front side, 1 = back side)
78 C_DBLDNS equ %00100000 Density (0 = single, 1 = double) 124 C_DBLDNS equ %00100000 Density (0 = single, 1 = double)
79 C_WPRCMP equ %00010000 Write precompensation (0 = off, 1 = on) 125 C_WPRCMP equ %00010000 Write precompensation (0 = off, 1 = on)
80 C_MOTOR equ %00001000 Drive motor (0 = off, 1 = on) 126 C_MOTOR equ %00001000 Drive motor (0 = off, 1 = on)
81 C_DRV2 equ %00000100 Drive 2 selected when set 127 C_DRV2 equ %00000100 Drive 2 selected when set
82 C_DRV1 equ %00000010 Drive 1 selected when set 128 C_DRV1 equ %00000010 Drive 1 selected when set
83 C_DRV0 equ %00000001 Drive 0 selected when set 129 C_DRV0 equ %00000001 Drive 0 selected when set
84 130
85 mod eom,name,tylg,atrv,start,size 131 mod eom,name,tylg,atrv,start,size
86 132
87 u0000 rmb DRVBEG+(DRVMEM*N.Drives) 133 u0000 rmb DRVBEG+(DRVMEM*N.Drives)
88 u00A7 rmb 2 Last drive table accessed (ptr) 134 u00A7 rmb 2 Last drive table accessed (ptr)
89 CtlImg rmb 1 Bit mask for control reg (drive #, side,etc) 135 CtlImg rmb 1 Bit mask for control reg (drive #, side,etc)
90 u00AA rmb 1 136 u00AA rmb 1 drive change flag
91 sectbuf rmb 2 Ptr to 512 byte sector buffer 137 sectbuf rmb 2 Ptr to 512 byte sector buffer
92 u00AD rmb 1 138 u00AD rmb 1 head flag; 0=front 1 = back
93 u00AE rmb 1 139 u00AE rmb 1 LSB of LSN
94 FBlock rmb 2 block number for format 140 FBlock rmb 2 block number for format
95 IFGT Level-1 141 IFGT Level-1
96 FTask rmb 1 task number for format 142 FTask rmb 1 task number for format
97 ENDC 143 ENDC
98 VIRQPak rmb 2 Vi.Cnt word for VIRQ 144 VIRQPak rmb 2 Vi.Cnt word for VIRQ
99 u00B3 rmb 2 Vi.Rst word for VIRQ 145 u00B3 rmb 2 Vi.Rst word for VIRQ
100 u00B5 rmb 1 Vi.Stat byte for VIRQ (drive motor timeout) 146 u00B5 rmb 1 Vi.Stat byte for VIRQ (drive motor timeout)
101 loglsn rmb 2 OS9's logical sector # 147 loglsn rmb 2 OS9's logical sector #
102 physlsn rmb 1 PCDOS (512 byte sector) sector # 148 * Removed next line and added two new ones. RG
149 * PCDOS does not ask driver for any info.
150 * physlsn rmb 2 PCDOS (512 byte sector) #
151 flag512 rmb 1 PCDOS (512 byte sector) 0=no, 1=yes
152 flagform rmb 1 SCII format flag
103 size equ . 153 size equ .
104 154
105 fcb DIR.+SHARE.+PEXEC.+PWRIT.+PREAD.+EXEC.+UPDAT. 155 fcb DIR.+SHARE.+PEXEC.+PWRIT.+PREAD.+EXEC.+UPDAT.
106 156
107 name fcs /rb1773/ 157 name fcs /rb1773/
124 * B = error code 174 * B = error code
125 * 175 *
126 * New code added 09/03/2003 by Boisy G. Pitre 176 * New code added 09/03/2003 by Boisy G. Pitre
127 * Write a pattern to $FF4B and read it back to verify that the hardware 177 * Write a pattern to $FF4B and read it back to verify that the hardware
128 * does exist. 178 * does exist.
129 Init ldx V.PORT,u get Base port address 179 Init equ *
180 * Two new lines for SCII. RG
181 IFNE SCII
182 clr RW.Ctrl clear SCII control register
183 clr flagform,u clear SCII format flag
184 ENDC
185 ldx V.PORT,u get Base port address
130 lda WD_Data,x get byte at FDC Data register 186 lda WD_Data,x get byte at FDC Data register
131 coma complement it to modify it 187 coma complement it to modify it
132 sta WD_Data,x write it 188 sta WD_Data,x write it
133 clrb 189 clrb
134 Init2 decb delay a bit... 190 Init2 decb delay a bit...
145 lda #S$FrcInt "Force Interrupt" command 201 lda #S$FrcInt "Force Interrupt" command
146 sta ,x send to FDC 202 sta ,x send to FDC
147 lbsr FDCDelay time delay for ~ 108 cycles 203 lbsr FDCDelay time delay for ~ 108 cycles
148 lda ,x eat status register 204 lda ,x eat status register
149 ldd #$FF*256+N.Drives 'invalid' value & # of drives 205 ldd #$FF*256+N.Drives 'invalid' value & # of drives
150 sta >physlsn,u set 512 byte sector # to bogus value
151 sta >physlsn+1,u
152 leax DRVBEG,u point to start of drive tables 206 leax DRVBEG,u point to start of drive tables
153 l@ sta ,x DD.TOT MSB to bogus value 207 l1 sta ,x DD.TOT MSB to bogus value
154 sta <V.TRAK,x init current track # to bogus value 208 sta <V.TRAK,x init current track # to bogus value
155 leax <DRVMEM,x point to next drive table 209 leax <DRVMEM,x point to next drive table
156 decb done all drives yet? 210 decb done all drives yet?
157 bne l@ no, init them all 211 bne l1 no, init them all
158 leax >NMISvc,pc point to NMI service routine 212 leax >NMISvc,pc point to NMI service routine
159 IFGT Level-1 213 IFGT Level-1
160 stx <D.NMI install as system NMI 214 stx <D.NMI install as system NMI
161 ELSE 215 ELSE
162 stx >D.XNMI+1 NMI jump vector operand 216 stx >D.XNMI+1 NMI jump vector operand
163 lda #$7E JMP code 217 lda #$7E JMP code
164 sta >D.XNMI NMI jump vector opcode 218 sta >D.XNMI NMI jump vector opcode
165 ENDC 219 ENDC
166 pshs y save device dsc. ptr 220 pshs y save device dsc. ptr
167 leay >u00B5,u point to Vi.Stat in VIRQ packet 221 leay >u00B5,u point to Vi.Stat in VIRQ packet
168 tfr y,d make it the status register ptr for IRQ 222 tfr y,d make it the status register ptr for IRQ
169 leay >IRQSvc,pc point to IRQ service routine 223 leay >IRQSvc,pc point to IRQ service routine
170 leax >IRQPkt,pc point to IRQ packet 224 leax >IRQPkt,pc point to IRQ packet
171 os9 F$IRQ install IRQ 225 os9 F$IRQ install IRQ
172 puls y Get back device dsc. ptr 226 puls y Get back device dsc. ptr
173 bcs Return If we can't install IRQ, exit 227 bcs Return If we can't install IRQ, exit
174 IFNE SCII
175 lda MPI.Slct
176 sta mpislot,u
177 ldd #RW.Ctrl
178 leay SC2vec,pcr
179 os9 F$IRQ
180 bcs Return
181 pshs cc
182 orcc #IntMasks
183 lda $FF23
184 * disable FIRQ from cart. set flag on falling edge of CART
185 anda #$FC
186 sta $FF23
187 lda $FF22
188 lda D.IRQER
189 ora #1 enable CART IRQ
190 sta D.IRQER .. save in IRQENR shadow
191 sta IRQENR .. and actual register
192 puls cc
193 ENDC
194 ldd #512 Request 512 byte sector buffer 228 ldd #512 Request 512 byte sector buffer
195 pshs u Preserve device mem ptr 229 pshs u Preserve device mem ptr
196 os9 F$SRqMem Request sector buffer 230 os9 F$SRqMem Request sector buffer
197 tfr u,x Move ptr to sector buffer to x 231 tfr u,x Move ptr to sector buffer to x
198 puls u Restore device mem ptr 232 puls u Restore device mem ptr
234 ELSE 268 ELSE
235 ldx #$0000 269 ldx #$0000
236 ENDC 270 ENDC
237 leay >IRQSvc,pc point to IRQ service routine 271 leay >IRQSvc,pc point to IRQ service routine
238 os9 F$IRQ Remove IRQ 272 os9 F$IRQ Remove IRQ
239 IFNE SCII
240 IFNE H6309
241 tfr 0,x "remove"
242 ELSE
243 ldx #$0000
244 ENDC
245 leay SC2vec,pcr
246 os9 F$IRQ Remove IRQ
247 ENDC
248 pshs u Save device mem ptr 273 pshs u Save device mem ptr
249 ldu >sectbuf,u Get pointer to sector buffer 274 ldu >sectbuf,u Get pointer to sector buffer
250 ldd #512 Return sector buffer memory 275 ldd #512 Return sector buffer memory
251 os9 F$SRtMem 276 os9 F$SRtMem
252 puls u Restore device mem ptr 277 puls u Restore device mem ptr
258 ENDC 283 ENDC
259 ex rts return 284 ex rts return
260 285
261 * Check if 512 byte sector conversion needed 286 * Check if 512 byte sector conversion needed
262 * Entry: B:X=LSN 287 * Entry: B:X=LSN
263 * U=Static mem ptr 288 * U=Static mem ptr
264 * Y=Path dsc. ptr 289 * Y=Path dsc. ptr
265 * Exit: X=New LSN (same as original for 256 byte sectors, 1/2 of original 290 * Exit: X=New LSN (same as original for 256 byte sectors, 1/2 of original
266 * for 512 byte sectors 291 * for 512 byte sectors
267 Chk512 pshs x,b save LSN 292 * regD changed
268 stx >loglsn,u save OS9 LSN 293 Chk512 equ *
269 lda <PD.TYP,y get device type from path dsc. 294 clr flag512,u set to 256 byte sector
270 anda #%00000100 mask out all but 512 byte sector flag 295 stx >loglsn,u save OS9 LSN
271 bne Log2Phys 512 byte sectors, go process 296 lda <PD.TYP,y get device type from path dsc.
272 L00CA puls pc,x,b restore LSN & return 297 anda #%00000100 mask out all but 512 byte sector flag
298 bne Log2Phys 512 byte sectors, go process
299 rts RG
273 * 512 byte sector processing goes here 300 * 512 byte sector processing goes here
274 Log2Phys puls x,b Get back LSN 301 * regB should be saved and not just cleared at end because there is
275 clrb Clear carry for rotate (also high byte of LSN) 302 * a subsequent tst for the msb of lsn. The test is pointless if B
276 tfr x,d Move to mathable register 303 * is changed.
277 IFNE H6309 304 Log2Phys pshs b save MSB of LSN; new RG
278 rord Divide LSN by 2 305 * Minor inefficiencies here that I have changed, RG
279 ELSE 306 tfr x,d
280 rora 307 IFNE H6309
308 lsrd
309 ELSE
310 lsra
281 rorb 311 rorb
282 ENDC 312 ENDC
283 tfr d,x Move new LSN back to X 313 tfr d,x move new LSN back to regX
284 stx >physlsn,u Save 'physical' LSN (for controller) 314 * New line for stock SCII controller with 256 max no-halt.
285 clrb No error & return 315 inc flag512,u set to 512 byte sector
286 rts 316 puls b,pc regB will be tested later for >0
287 317
288 start lbra Init 318 start lbra Init
289 bra Read 319 bra Read
290 nop 320 nop
291 lbra Write 321 lbra Write
312 pshs x preserve sector # 342 pshs x preserve sector #
313 lbsr L0162 go read the sector 343 lbsr L0162 go read the sector
314 puls x restore sector # 344 puls x restore sector #
315 bcs ex if error, exit 345 bcs ex if error, exit
316 pshs y,x save path dsc ptr & LSN 346 pshs y,x save path dsc ptr & LSN
317 leax ,x LSN0? 347 leax ,x LSN0?, ie. tstx
318 bne L012D no, go calculate normally 348 bne L012D no, go calculate normally
319 puls y,x yes, restore path dsc ptr & LSN 349 puls y,x yes, restore path dsc ptr & LSN
320 lda <PD.TYP,y get type from path dsc. 350 lda <PD.TYP,y get type from path dsc.
321 bita #TYP.NSF standard OS-9 format? 351 bita #TYP.NSF standard OS-9 format?
322 beq L00F0 yes, skip ahead 352 beq L00F0 yes, skip ahead
345 bita #FMT.DNS Disk in drive double density? 375 bita #FMT.DNS Disk in drive double density?
346 beq L0115 No, all drives can read single, skip ahead 376 beq L0115 No, all drives can read single, skip ahead
347 bitb #DNS.MFM Can our path dsc. handle double density? 377 bitb #DNS.MFM Can our path dsc. handle double density?
348 beq erbtyp No, illegal 378 beq erbtyp No, illegal
349 L0115 bita #FMT.TDNS Is new disk 96/135 tpi? 379 L0115 bita #FMT.TDNS Is new disk 96/135 tpi?
350 beq L011D No, so skip ahead 380 beq L011D No, all drives handle 48 tpi, so skip ahead
351 bitb #DNS.DTD Can path dsc. handle 96/135 tpi? 381 bitb #DNS.DTD Can path dsc. handle 96/135 tpi?
352 beq erbtyp No, illegal 382 beq erbtyp No, illegal
353 L011D bita #FMT.SIDE Is new disk double sided? 383 L011D bita #FMT.SIDE Is new disk double sided?
354 beq L0128 No, all drives handle single sided, we're done 384 beq L0128 No, all drives handle single sided, we're done
355 lda <PD.SID,y Get # sides path dsc. can handle 385 lda <PD.SID,y Get # sides path dsc. can handle
356 suba #2 sides higher or equal to 2? 386 suba #2 sides higher or equal to 2?
357 blo erbtyp Yes, exit with illegal type error 387 blo erbtyp Yes, exit with illegal type error
358 L0128 clrb No error 388 L0128 clrb No error
359 * puls y,x ??? 2 USELESS LINES?
360 * pshs y,x
361 * LSN's other than 0 come straight here 389 * LSN's other than 0 come straight here
362 L012D ldy 2,s Get path dsc. ptr back?? 390 L012D ldy 2,s Get path dsc. ptr back??
363 ldx PD.BUF,y Get path dsc. buffer ptr 391 ldx PD.BUF,y Get path dsc. buffer ptr
364 lda <PD.TYP,y Get path dsc. disk type 392 * lda <PD.TYP,y Get path dsc. disk type, RG
365 ldy >sectbuf,u Get ptr to sector buffer 393 ldy >sectbuf,u Get ptr to sector buffer
366 IFNE H6309 394 IFNE H6309
367 ldw #256 OS9 sector size (even if physical was 512) 395 ldw #256 OS9 sector size (even if physical was 512)
368 ENDC 396 ENDC
369 anda #%00000100 Mask out all but 512 byte sector flag 397 * anda #%00000100 Mask out all but 512 byte sector flag, RG
398 * Next replaces the two lines removed, RG
399 tst flag512,u Is it a 512 byte sector?
370 beq L014B If normal sector, just copy it 400 beq L014B If normal sector, just copy it
371 ldd >loglsn,u Get OS9's LSN (twice of the 'real' 512 sector) 401 ldd >loglsn,u Get OS9's LSN (twice of the 'real' 512 sector)
372 andb #$01 Mask out all but odd/even sector indicator 402 andb #$01 Mask out all but odd/even sector indicator
373 beq L014B Even, use 1st half of 512 byte sector 403 beq L014B Even, use 1st half of 512 byte sector
374 IFNE H6309 404 IFNE H6309
392 422
393 erbtyp comb 423 erbtyp comb
394 ldb #E$BTyp Error - wrong type error 424 ldb #E$BTyp Error - wrong type error
395 puls pc,y,x 425 puls pc,y,x
396 426
427 **********************
428
397 * Read error - retry handler 429 * Read error - retry handler
398 L0159 bcc L0162 Normal retry, try reading again 430 L0159 bcc L0162 Normal retry, try reading again
399 pshs x,d Preserve regs 431 pshs x,d Preserve regs
400 lbsr sktrk0 Seek to track 0 (attempt to recalibrate) 432 lbsr sktrk0 Seek to track 0 (attempt to recalibrate)
401 puls x,d Restore regs & try reading again 433 puls x,d Restore regs & try reading again
402 434
435 * ENTER reg B,X=working lsn on disk
436 * Y=path descriptor
437 * U=driver data
438 * A=retry sequence mix of read & seek track 0
439 * EXIT X,Y,U preserved; D,CC changed
440 * B=error if any
441 * CC=error flag
403 L0162 pshs x,d Preserve regs 442 L0162 pshs x,d Preserve regs
404 bsr L016F Go read sector 443 bsr L016F Go read sector
405 puls x,d Restore regs (A=retry flags) 444 puls x,d Restore regs (A=retry flags)
406 bcc L01D7 No error, return 445 lbcc L01D7 No error, return
407 lsra Shift retry flags 446 lsra Shift retry flags
408 bne L0159 Still more retries allowed, go do them 447 bne L0159 Still more retries allowed, go do them
409 * otherwise, final try before we give up 448 * otherwise, final try before we give up
410 L016F lbsr L02AC Do double-step/precomp etc. if needed, seek 449 L016F lbsr L02AC Do double-step/precomp etc. if needed, seek
411 bcs L01D7 Error somewhere, exit with it 450 lbcs L01D7 Error somewhere, exit with it
412 L0176 ldx >sectbuf,u Get physical sector buffer ptr 451 L0176 ldx >sectbuf,u Get physical sector buffer ptr
413 * pshs y,cc Preserve timeout timer & CC
414 ldb #$80 Read sector command 452 ldb #$80 Read sector command
415 bsr L01A1 Send to controller & time delay to let it settle 453 IFNE SCII
454 * If SCII not hacked for 512 byte no-halt, must use halt for 512b sectors RG
455 IFEQ SCIIHACK
456 clra SCII normal mode, normal NMI
457 tst flag512,u SCII must use halt mode for 512 byte sectors
458 bne L0176B
459 ENDC
460 lda #7 SCII read, buffered mode, masked NMI
461 bsr L01A1B send commands and wait
462 lbcs L03AF get the errors
463 IFNE H6309
464 pshs y
465 ldw #128 set counter
466 ldy #RW.DAT source of data
467 IFNE SCIIHACK
468 tst flag512,u
469 beq sc2rlp
470 ldw #256 bump up counter to 512 byte sector
471 ENDC
472 * Don't use tfm if no halt important else need orcc #$50 for tfm
473 * If an interrupt occurs during a tfm transfer, the SCII counter
474 * will update but the tfm will repeat a byte and lose track.
475 * If orcc #$50 used, then key presses may be lost even with no-halt
476 * mode.
477 sc2rlp ldd ,y read two bytes from SCII
478 std ,x++ transfer two bytes to system buffer
479 decw update counter
480 bne sc2rlp
481 ELSE
482 ldy #128
483 IFNE SCIIHACK
484 tst flag512,u
485 beq sc2rlp
486 ldy #256
487 ENDC
488 sc2rlp ldd >RW.DAT
489 std ,x++
490 leay -1,y
491 bne sc2rlp
492 ENDC
493 clrb no errors
494 puls y,pc
495 ENDC
496
497 L0176B bsr L01A1 Send to controller & time delay to let it settle
416 *** Next few lines are commented out for blobstop patches 498 *** Next few lines are commented out for blobstop patches
417 *L0180 bita >DPort+WD_Stat check status register 499 *L0180 bita >DPort+WD_Stat check status register
418 * bne L0197 eat it & start reading sector 500 * bne L0197 eat it & start reading sector
419 * leay -1,y bump timeout timer down 501 * leay -1,y bump timeout timer down
420 * bne L0180 keep trying until it reaches 0 or sector read 502 * bne L0180 keep trying until it reaches 0 or sector read
436 * stb >DPort+CtrlReg drive info 518 * stb >DPort+CtrlReg drive info
437 nop -- blobstop fix 519 nop -- blobstop fix
438 bra L0197 Keep reading until sector done 520 bra L0197 Keep reading until sector done
439 521
440 L01A1 orcc #IntMasks Shut off IRQ & FIRQ 522 L01A1 orcc #IntMasks Shut off IRQ & FIRQ
441 stb >DPort+WD_Cmd Send command 523 * No-halt mode must enter here, skipping IRQ shutoff.
442 * ldy #$FFFF 524 L01A1B stb >DPort+WD_Cmd Send command
443 ldb #C_DBLDNS+C_MOTOR Double density & motor on 525 IFNE SCII
444 * ldb #%00101000 Double density & motor on 526 sta >RW.Ctrl tell SCII what to do
527 ENDC
528 L01A1C ldb #C_DBLDNS+C_MOTOR Double density & motor on
445 orb >CtlImg,u Merge with current drive settings 529 orb >CtlImg,u Merge with current drive settings
446 stb >DPort+CtrlReg Send to control register 530 stb >DPort+CtrlReg Send to control register
447 ldb #C_HALT+C_DBLDNS+C_MOTOR Enable halt, double density & motor on 531 IFNE SCII
448 * ldb #%10101000 Enable halt, double density & motor on 532 tst flagform,u Format uses halt mode
533 bne s512
534 IFEQ SCIIHACK
535 tst flag512,u SCII uses halt with 512 byte sectors
536 beq s256
537 ELSE
538 bra s256
539 ENDC
540 ENDC
541 s512 ldb #C_HALT+C_DBLDNS+C_MOTOR Enable halt, double density & motor on
449 orb >CtlImg,u Merge that with current drive settings 542 orb >CtlImg,u Merge that with current drive settings
450 lbra FDCDelay Time delay to wait for command to settle 543 lbra FDCDelay Time delay to wait for command to settle
451 * lda #$02 544 IFNE SCII
452 *L01BE rts 545 s256 ldb #4 normal mode, NMI masked
546 lda #255 time out slices
547 pshs a,x
548 SC2tmr1 ldx #1
549 lbsr SC2Slp sleep or timer
550 dec ,s count
551 beq tmout
552 tst >RW.Ctrl check status
553 bmi SC2tmr1 loop on not ready
554 stb RW.Ctrl clear SCII but don't generate NMI
555 clrb
556 puls a,x,pc
557 tmout stb RW.Ctrl clear SCII buffer counter
558 lda #$D0 force interrupt
559 sta DPort+WD_Cmd
560 comb set carry
561 puls a,x,pc
562 ENDC
563
564 * The distinction between system and non-system is from some
565 * Kevin Darling code. I'm not sure if it is necessary. RG
566 SC2Slp
567 IFGT Level-1
568 pshs d
569 ldd <D.Proc process pointer
570 cmpd <D.SysPrc is it the system?
571 puls d
572 beq syslup
573 ENDC
574 os9 F$Sleep if not system then sleep
575 rts
576 syslup ldx #$A000
577 syslup2 nop
578 nop
579 nop
580 leax -1,x
581 bne syslup2
582 rts
453 583
454 * Write 584 * Write
455 *
456 * Entry: 585 * Entry:
457 * B = MSB of LSN 586 * B = MSB of LSN
458 * X = LSB of LSN 587 * X = LSB of LSN
459 * Y = address of path descriptor 588 * Y = address of path descriptor
460 * U = address of device memory area 589 * U = address of device memory area
462 * Exit: 591 * Exit:
463 * CC = carry set on error 592 * CC = carry set on error
464 * B = error code 593 * B = error code
465 * 594 *
466 Write lbsr Chk512 go adjust LSN for 512 byte sector if needed 595 Write lbsr Chk512 go adjust LSN for 512 byte sector if needed
467 lda #%1001001 retry flags for I/O errors (see Disto SCII source) 596 * Next line was lda #%1001001 which was an error RG
597 lda #%10010001 retry flags for I/O errors (see Disto SCII source)
468 L01C4 pshs x,d preserve LSN, retries 598 L01C4 pshs x,d preserve LSN, retries
469 bsr L01E8 go write the sector 599 bsr L01E8 go write the sector
470 puls x,d restore LSN, retries 600 puls x,d restore LSN, retries
471 bcs L01D8 error writing, go to write retry handler 601 bcs L01D8 error writing, go to write retry handler
472 tst <PD.VFY,y no error, do we want physical verify? 602 tst <PD.VFY,y no error, do we want physical verify?
473 bne L01D6 no, exit without error 603 bne L01D6 no, exit without error
474 lbsr verify go re-read & verify 32 out of 256 bytes 604 lbsr verify go re-read & verify 64 out of 256 bytes
475 bcs L01D8 error on verify, go to write retry handler 605 bcs L01D8 error on verify, go to write retry handler
476 L01D6 clrb no error & return 606 L01D6 clrb no error & return
477 L01D7 rts 607 L01D7 rts
478 608
479 * Write error retry handler 609 * Write error retry handler
487 617
488 * 512 byte sector write here 618 * 512 byte sector write here
489 L01E8 lbsr L02AC Go do double-step/write precomp if needed 619 L01E8 lbsr L02AC Go do double-step/write precomp if needed
490 bcs L01D7 Error, exit with it 620 bcs L01D7 Error, exit with it
491 pshs y,d Preserve path dsc. ptr & LSN 621 pshs y,d Preserve path dsc. ptr & LSN
492 lda <PD.TYP,y Get device type 622 * Since I have modified chk512 the next two lines are replaced. RG
493 anda #%00000100 512 byte sector? 623 * lda <PD.TYP,y Get device type
494 beq L020D No, skip ahead 624 * anda #%00000100 512 byte sector?
495 lda #$91 ??? appears to be useless 625 tst flag512,u go if 256 byte sectors
626 beq L020D Not 512 then skip ahead
496 lbsr L0176 Go read the sector in 627 lbsr L0176 Go read the sector in
497 ldd >loglsn,u Get OS9 LSN 628 ldd >loglsn,u Get OS9 LSN
498 andb #$01 Even or odd? 629 andb #$01 Even or odd?
499 beq L020D Even, skip ahead 630 beq L020D Even, skip ahead
500 ldx >sectbuf,u Get physical sector buffer ptr 631 ldx >sectbuf,u Get physical sector buffer ptr
514 decb 645 decb
515 bne L0211Lp 646 bne L0211Lp
516 ENDC 647 ENDC
517 puls y,d Get path dsc. ptr & LSN back 648 puls y,d Get path dsc. ptr & LSN back
518 ldx >sectbuf,u Get physical sector buffer ptr again 649 ldx >sectbuf,u Get physical sector buffer ptr again
650 * See read routine for explanation of SCII code. RG
651 IFNE SCII
652 IFEQ SCIIHACK
653 clra SCII write, normal mode & NMI
654 tst flag512,u
655 bne wr512
656 ENDC
657 lda #4 SCII normal mode, masked NMI
658 sta RW.Ctrl tell SCII
659 pshs y
660 ldy #RW.Dat Send data to SCII RAM buffer
661 IFNE H6309
662 ldw #128
663 tst flag512,u
664 beq wrbuf
665 ldw #256
666 wrbuf ldd ,x++
667 std ,y
668 decw
669 bne wrbuf
670 ELSE
671 ldy #128
672 tst flag512,u
673 beq wrbuf
674 ldy #256
675 wrbuf ldd ,x++
676 std >RW.DAT
677 leay -1,y
678 bne wrbuf
679 ENDC
680 puls y
519 ldb #$A0 Write sector command 681 ldb #$A0 Write sector command
682 lda #6 SCII masked NMI, buffered mode, write
683 lbra L01A1B send command to controller
684 ENDC
685 wr512 ldb #$A0
520 686
521 * Format track comes here with B=$F0 (write track) 687 * Format track comes here with B=$F0 (write track)
688 * as does write sector with B=$A0
522 *WrTrk pshs y,cc Preserve path dsc. ptr & CC 689 *WrTrk pshs y,cc Preserve path dsc. ptr & CC
523 WrTrk lbsr L01A1 Send command to controller (including delay) 690 WrTrk lbsr L01A1 Send command to controller (including delay)
524 *** Commented out for blobstop fixes 691 *** Commented out for blobstop fixes
525 *L0229 bita >DPort+WD_Stat Controller done yet? 692 *L0229 bita >DPort+WD_Stat Controller done yet?
526 * bne L0240 Yes, go write sector out 693 * bne L0240 Yes, go write sector out
530 * ora #C_MOTOR Drive motor on (but drive select off) 697 * ora #C_MOTOR Drive motor on (but drive select off)
531 * sta >DPort+CtrlReg Send to controller 698 * sta >DPort+CtrlReg Send to controller
532 * puls y,cc Restore regs 699 * puls y,cc Restore regs
533 * lbra L03AF Check for errors from status register 700 * lbra L03AF Check for errors from status register
534 701
702 *** added blobstop
535 IFGT Level-1 703 IFGT Level-1
536 *** added blobstop
537 lda FBlock+1,u get the block number for format 704 lda FBlock+1,u get the block number for format
538 beq L0230 if not format, don't do anything 705 beq L0230 if not format, don't do anything
539 sta >$FFA1 otherwise map the block in 706 sta >$FFA1 otherwise map the block in
540 ENDC 707 ENDC
541 L0230 stb >DPort+CtrlReg send data to control register 708 L0230 stb >DPort+CtrlReg send data to control register
709 * These lines added to match read routine. Should be better timing. RG
710 nop
711 nop
542 bra L0240 wait a bit for HALT to enable 712 bra L0240 wait a bit for HALT to enable
543 713
544 * Write sector routine (Entry: B= drive/side select) (NMI will break out) 714 * Write sector routine (Entry: B= drive/side select) (NMI will break out)
545 L0240 nop --- wait a bit more 715 * Part of timing change mentioned above. RG
546 lda ,x+ Get byte from write buffer 716 *L0240 nop --- wait a bit more
717 L0240 lda ,x+ Get byte from write buffer
547 sta >DPort+WD_Data Save to FDC's data register 718 sta >DPort+WD_Data Save to FDC's data register
548 * EAT 2 CYCLES: TC9 ONLY (TRY 1 CYCLE AND SEE HOW IT WORKS) 719 * EAT 2 CYCLES: TC9 ONLY (TRY 1 CYCLE AND SEE HOW IT WORKS)
549 IFEQ TC9-1 720 IFEQ TC9-1
550 nop 721 nop
551 nop 722 nop
723 ELSE
724 * See above. RG
725 nop
552 ENDC 726 ENDC
553 * stb >DPort+CtrlReg Set up to read next byte 727 * stb >DPort+CtrlReg Set up to read next byte
554 bra L0240 Go read it 728 bra L0240 Go read it
555 729
556 * NMI routine 730 * NMI routine
557 NMISvc leas R$Size,s Eat register stack 731 NMISvc leas R$Size,s Eat register stack
558 * puls y,cc Get path dsc. ptr & CC
559 IFGT Level-1 732 IFGT Level-1
560 ldx <D.SysDAT get pointer to system DAT image 733 ldx <D.SysDAT get pointer to system DAT image
561 lda 3,x get block number 1 734 lda 3,x get block number 1
562 sta >$FFA1 map it back into memory 735 sta >$FFA1 map it back into memory
563 ENDC 736 ENDC
564 andcc #^IntMasks turn IRQ's on again 737 andcc #^IntMasks turn IRQ's on again
565 ldb >DPort+WD_Stat Get status register 738 ldb >DPort+WD_Stat Get status register
739 IFNE SCII
740 clr RW.Ctrl Clear SCII command register
741 ENDC
566 bitb #%00000100 Did we lose data in the transfer? 742 bitb #%00000100 Did we lose data in the transfer?
567 * lbne L03E0 Yes, exit with Read Error
568 lbeq L03B2 Otherwise, check for drive errors 743 lbeq L03B2 Otherwise, check for drive errors
569 comb -- blobstop error code 744 comb -- blobstop error code
570 ldb #E$DevBsy -- device busy 745 ldb #E$DevBsy -- device busy
571 rts -- and exit 746 rts -- and exit
572 747
573 verify pshs x,d 748 verify pshs x,d
574 ldx PD.BUF,y Get write buffer ptr 749 * Removed unneeded code. Data never sent to PD.BUF anyway so there is
575 pshs x Preserve it 750 * no need to redirect the PD.BUF pointer. RG
576 ldx >sectbuf,u Get sector buffer ptr 751 * ldx PD.BUF,y Get write buffer ptr
577 stx PD.BUF,y Save as write buffer ptr 752 * pshs x Preserve it
578 ldx 4,s 753 * ldx >sectbuf,u Get sector buffer ptr
754 * stx PD.BUF,y Save as write buffer ptr
755 * ldx 4,s
579 lbsr L016F Go read sector we just wrote 756 lbsr L016F Go read sector we just wrote
580 puls x Get original write buffer ptr 757 * puls x Get original write buffer ptr
581 stx PD.BUF,y Restore path dsc. version 758 * stx PD.BUF,y Restore path dsc. version
582 bcs L02A3 If error reading, exit with it 759 bcs L02A3 If error reading, exit with it
760 ldx PD.BUF,y Get system buffer ptr
583 pshs u,y Preserve device mem, path dsc. ptrs 761 pshs u,y Preserve device mem, path dsc. ptrs
584 ldb <PD.TYP,y Get type from path dsc. 762 * See change in chk512 routine. RG
763 * ldb <PD.TYP,y Get type from path dsc.
585 ldy >sectbuf,u Get sector buffer ptr 764 ldy >sectbuf,u Get sector buffer ptr
586 andb #%00000100 512 byte sector? 765 * andb #%00000100 512 byte sector?
766 tst flag512,u 512 byte sector?
587 beq L028D No, skip ahead 767 beq L028D No, skip ahead
588 ldd >loglsn,u Get OS9's sector # 768 ldd >loglsn,u Get OS9's sector #
589 andb #$01 Odd/even sector? 769 andb #$01 Odd/even sector?
590 beq L028D Even; compare first half 770 beq L028D Even; compare first half
591 leay >$0100,y Odd, compare second half 771 leay >$0100,y Odd, compare second half
592 L028D tfr x,u Move PD.BUF ptr to U (since cmpx is faster) 772 L028D tfr x,u Move PD.BUF ptr to U (since cmpx is faster)
593 lda #32 # of 'spotty' checks to do 773 clra check all 256 bytes
594 L028F ldx ,u Get 2 bytes from original write buffer 774 L028F ldx ,u++ Get 2 bytes from original write buffer
595 cmpx ,y Same as corresponding bytes in re-read sector? 775 cmpx ,y++ Same as corresponding bytes in re-read sector?
596 bne L029F No, error & return 776 bne vfybad No, error & return
597 leau 8,u Skip next 6 bytes 777 inca
598 leay 8,y 778 bpl L028F No, continue
599 deca Done our 'spotty' check? 779 bra L02A1 carry is clear by virtue of last cmpx
600 bne L028F No, continue 780 vfybad comb set carry
601 fcb $8C skip the next 2 bytes
602
603 L029F orcc #Carry
604 L02A1 puls u,y 781 L02A1 puls u,y
605 L02A3 puls pc,x,d 782 L02A3 puls pc,x,d
606 783
607 L02A5 pshs a Save Caller's track # 784 L02A5 pshs a Save Caller's track #
608 ldb <V.TRAK,x Get track # drive is currently on 785 ldb <V.TRAK,x Get track # drive is currently on
613 pshs a Save track # 790 pshs a Save track #
614 lda >u00AD,u Get side 1/2 flag 791 lda >u00AD,u Get side 1/2 flag
615 beq L02C4 Side 1, skip ahead 792 beq L02C4 Side 1, skip ahead
616 lda >CtlImg,u Get control register settings 793 lda >CtlImg,u Get control register settings
617 ora #C_SIDSEL Set side 2 (drive 3) select 794 ora #C_SIDSEL Set side 2 (drive 3) select
618 * ora #%01000000 Set side 2 (drive 3) select
619 sta >CtlImg,u Save it back 795 sta >CtlImg,u Save it back
620 L02C4 lda <PD.TYP,y Get drive type settings 796 L02C4 lda <PD.TYP,y Get drive type settings
621 bita #%00000010 ??? (Base 0/1 for sector #?) 797 bita #%00000010 ??? (Base 0/1 for sector #?)
622 bne L02CC Skip ahead 798 bne L02CC Skip ahead
623 incb Bump sector # up by 1 799 incb Bump sector # up by 1
625 ldx >u00A7,u Get last drive table accessed 801 ldx >u00A7,u Get last drive table accessed
626 ldb <V.TRAK,x Get current track # on device 802 ldb <V.TRAK,x Get current track # on device
627 lda <DD.FMT,x Get drive format specs 803 lda <DD.FMT,x Get drive format specs
628 lsra Shift track & bit densities to match PD 804 lsra Shift track & bit densities to match PD
629 eora <PD.DNS,y Check for differences with path densities 805 eora <PD.DNS,y Check for differences with path densities
630 anda #%00000010 Keep only 48/96 tpi differences 806 anda #%00000010 Keep only 48 vs. 96/135 tpi differences
631 pshs a Save differences 807 pshs a Save differences
632 lda 1,s Get track # back 808 lda 1,s Get track # back
633 tst ,s+ Are tpi's different? 809 tst ,s+ Are tpi's different?
634 beq L02E9 No, continue normally 810 beq L02E9 No, continue normally
635 lsla Yes, multiply track # by 2 ('double-step') 811 lsla Yes, multiply track # by 2 ('double-step')
647 beq L02F9 48 tpi, skip ahead 823 beq L02F9 48 tpi, skip ahead
648 lsl ,s Multiply pre-comp value by 2 ('double-step') 824 lsl ,s Multiply pre-comp value by 2 ('double-step')
649 L02F9 cmpa ,s+ Is track # high enough to warrant precomp? 825 L02F9 cmpa ,s+ Is track # high enough to warrant precomp?
650 bls L0307 No, continue normally 826 bls L0307 No, continue normally
651 ldb >CtlImg,u 827 ldb >CtlImg,u
652 orb #C_WRPCMP Turn on Write precomp 828 orb #C.WRPCMP Turn on Write precomp
653 * orb #%00010000 Turn on Write precomp
654 stb >CtlImg,u 829 stb >CtlImg,u
655 ENDC 830 ENDC
656 831
657 L0307 ldb >u00AA,u ??? Get flag (same drive flag?) 832 L0307 tst >u00AA,u ??? Get flag (same drive flag?)
658 bne L0314 no, skip ahead 833 bne L0314 no, skip ahead
659 ldb ,s get track # 834 ldb ,s get track #
660 cmpb <V.TRAK,x same as current track on this drive? 835 cmpb <V.TRAK,x same as current track on this drive?
661 beq L0321 yes, skip ahead 836 beq L0321 yes, skip ahead
662 L0314 sta >DPort+WD_Data save track # to data register 837 L0314 sta >DPort+WD_Data save track # to data register
675 * B=Sector # 850 * B=Sector #
676 * <u00AD=00 = Head 1 , $FF = Head 2 851 * <u00AD=00 = Head 1 , $FF = Head 2
677 L032B tstb Sector # > 65535? 852 L032B tstb Sector # > 65535?
678 bne L033F Yes, illegal for floppy 853 bne L033F Yes, illegal for floppy
679 tfr x,d Move sector # to D 854 tfr x,d Move sector # to D
680 leax ,x LSN 0? 855 leax ,x LSN 0? ie. "tstx"
681 beq L0371 Yes, exit this routine 856 beq L0371 Yes, exit this routine
682 ldx >u00A7,u Get previous drive table ptr 857 ldx >u00A7,u Get previous drive table ptr
683 cmpd DD.TOT+1,x Within range of drive spec? 858 cmpd DD.TOT+1,x Within range of drive spec?
684 blo L0343 Yes, go calculate track/sector #'s 859 blo L0343 Yes, go calculate track/sector #'s
685 L033F comb Exit with Bad sector # error 860 L033F comb Exit with Bad sector # error
686 ldb #E$Sect 861 ldb #E$Sect
687 rts 862 rts
688 863
689 * Calculate track/sector #'s? 864 * Calculate track/sector #'s?
865 * These two sections could be combined into one with a final
866 * test of DD.FMT. Then u00AD can be set and regA can be lsra
867 * as needed. RG
690 L0343 stb >u00AE,u Save LSB of LSN 868 L0343 stb >u00AE,u Save LSB of LSN
691 clr ,-s Clear track # on stack 869 clr ,-s Clear track # on stack
692 ldb <DD.FMT,x Get drive format 870 ldb <DD.FMT,x Get drive format
693 lsrb Shift out # sides into carry 871 lsrb Shift out # sides into carry
694 ldb >u00AE,u Get LSB of LSN again 872 ldb >u00AE,u Get LSB of LSN again
695 bcc L0367 Single sided drive, skip ahead 873 bcc L0367 Single sided drive, skip ahead
696 bra L035D Double sided drive, skip ahead 874 bra L035D Double sided drive, skip ahead
697 * Double sided drive handling here 875 * Double sided drive handling here
698 L0355 com >u00AD,u ???? Odd/even sector track flag? 876 L0355 com >u00AD,u Odd/even sector track flag
699 bne L035D Odd, so don't bump track # up 877 bne L035D Odd, so don't bump track # up
700 inc ,s Bump up track # 878 inc ,s Bump up track #
701 879
702 L035D subb DD.TKS,x Subtract # sectors/track 880 * Changed this to more effient code. RG
703 sbca #$00 881 *L035D subb DD.TKS,x Subtract # sectors/track
882 * sbca #$00
883 L035D subd DD.SPT,x
704 bcc L0355 Still more sectors left, continue 884 bcc L0355 Still more sectors left, continue
705 bra L036D Wrapped, skip ahead 885 bra L036D Wrapped, skip ahead
706 * Single sided drive handling here 886 * Single sided drive handling here
707 L0365 inc ,s Bump track # up 887 L0365 inc ,s Bump track # up
708 888
709 L0367 subb DD.TKS,x Subtract # sectors/track 889 * See above. RG
710 sbca #$00 890 *L0367 subb DD.TKS,x Subtract # sectors/track
891 * sbca #$00
892 L0367 subd DD.SPT,x
711 bcc L0365 Still more, go bump the track up 893 bcc L0365 Still more, go bump the track up
712 L036D addb $03,x Bump sector # back up from negative value 894 * Next possible because upper limit is 256 sectors/track. RG
895 L036D addb DD.TKS,x Bump sector # back up from negative value
713 puls a Get the track # 896 puls a Get the track #
714 L0371 rts A=track #, B=Sector #, <u00AD=Odd 897 L0371 rts A=track #, B=Sector #, <u00AD=Odd
715 898
716 * Drive control register bit mask table 899 * Drive control register bit mask table
900 * May want an option here for double sided SDDD disks ex. RG
901 * fcb $1 drive0
902 * fcb $2 drive1
903 * fcb $41 drive2
904 * fcb $42 drive3
905 * fcb $4 drive4
906 * fcb $44 drive5
907
717 L0372 fcb $01 Drive 0 908 L0372 fcb $01 Drive 0
718 fcb $02 Drive 1 909 fcb $02 Drive 1
719 fcb $04 Drive 2 910 fcb $04 Drive 2
720 fcb $40 Drive 3 / Side select 911 fcb $40 Drive 3 / Side select
721 912
722 L0376 clr >u00AA,u ??? 913 * Changes regD; X,Y,U preserved
723 914 L0376 clr >u00AA,u clear drive change flag
724 chkdrv lda <PD.DRV,y Get drive # requested 915 chkdrv lda <PD.DRV,y Get drive # requested
725 cmpa #4 Drive 0-3? 916 cmpa #4 Drive 0-3?
726 blo L0385 Yes, continue normally 917 blo L0385 Yes, continue normally
727 NoHW comb Illegal drive # error 918 NoHW comb Illegal drive # error
728 ldb #E$Unit 919 ldb #E$Unit
738 mul Calculate offset to drive table we want 929 mul Calculate offset to drive table we want
739 leax d,x Point to it 930 leax d,x Point to it
740 cmpx >u00A7,u Same as Last drive table accessed? 931 cmpx >u00A7,u Same as Last drive table accessed?
741 beq L03A6 Yes, skip ahead 932 beq L03A6 Yes, skip ahead
742 stx >u00A7,u Save new drive table ptr 933 stx >u00A7,u Save new drive table ptr
743 com >u00AA,u ??? Set flag 934 com >u00AA,u Set drive change flag
744 L03A6 clr >u00AD,u Set side (head) flag to side 1 935 L03A6 clr >u00AD,u Set side (head) flag to side 1
745 lbsr L04B3 Go set up VIRQ to wait for drive motor 936 lbsr L04B3 Go set up VIRQ to wait for drive motor
746 puls pc,x,d Restore sector #,drive #,B & return 937 puls pc,x,d Restore sector #,drive #,B & return
747 938
748 L03AF ldb >DPort+WD_Stat Get status register from FDC 939 L03AF ldb >DPort+WD_Stat Get status register from FDC
749 L03B2 bitb #%11111000 Any of the error bits set? 940 L03B2 bitb #%11111000 any of the error bits set?
750 beq L03CA No, exit without error 941 beq L03CA No, exit without error
751 aslb Drive not ready? 942 aslb Drive not ready?
752 bcs L03CC Yes, use that error code 943 bcs L03CC Yes, use that error code
753 aslb Write protect error? 944 aslb Write protect error?
754 bcs L03D0 Yes, use that error code 945 bcs L03D0 Yes, use that error code
784 L03E6 ldb >DPort+WD_Stat Check FDC status register 975 L03E6 ldb >DPort+WD_Stat Check FDC status register
785 bitb #$01 Is controller still busy? 976 bitb #$01 Is controller still busy?
786 beq L0403 No, exit 977 beq L0403 No, exit
787 ldd >VIRQCnt,pc Get initial count value for drive motor speed 978 ldd >VIRQCnt,pc Get initial count value for drive motor speed
788 std >VIRQPak,u Save it 979 std >VIRQPak,u Save it
980 * Again, I'm trying to match Kevin Darling code. It may not be needed. RG
981 pshs x
982 ldx #1 Sleep remainder of slice
983 lbsr SC2Slp
984 puls x
789 bra L03E6 Wait for controller to finish previous command 985 bra L03E6 Wait for controller to finish previous command
790 986
791 * Send command to FDC 987 * Send command to FDC
792 L03F7 lda #C_MOTOR 988 L03F7 lda #C_MOTOR
793 * lda #%00001000 Mask in Drive motor on bit 989 * lda #%00001000 Mask in Drive motor on bit
839 IFGT Level-1 1035 IFGT Level-1
840 1036
841 *--- new code 1037 *--- new code
842 ldb #1 1 block to allocate 1038 ldb #1 1 block to allocate
843 os9 F$AllRAM allocate some RAM 1039 os9 F$AllRAM allocate some RAM
844 bcs L0489 error out if at all 1040 lbcs L0489 error out if at all
845 leax >FBlock,u point to 'my' DAT image 1041 leax >FBlock,u point to 'my' DAT image
846 std ,x save a copy of the block 1042 std ,x save a copy of the block
847 os9 F$ResTsk reserve a task number for the copy 1043 os9 F$ResTsk reserve a task number for the copy
848 bcs FError error out 1044 bcs FError error out
849 stb 2,x save temporary task number in FTask,u 1045 stb 2,x save temporary task number in FTask,u
878 lbsr L0376 Go check drive #/wait for it to spin up 1074 lbsr L0376 Go check drive #/wait for it to spin up
879 ldx PD.RGS,y Get caller's register stack ptr 1075 ldx PD.RGS,y Get caller's register stack ptr
880 ldb R$Y+1,x Get caller's side/density 1076 ldb R$Y+1,x Get caller's side/density
881 bitb #$01 Check side 1077 bitb #$01 Check side
882 beq L0465 Side 1, skip ahead 1078 beq L0465 Side 1, skip ahead
883 com >u00AD,u 1079 * I think this next line is not needed. RG
1080 com >u00AD,u * Why? This is normally used with
1081 * calculate track. RG
884 ldb >CtlImg,u Get current control register settings 1082 ldb >CtlImg,u Get current control register settings
885 * orb #%01000000 Mask in side 2 1083 * orb #%01000000 Mask in side 2
886 orb #C_SIDSEL Mask in side 2 1084 orb #C_SIDSEL Mask in side 2
887 stb >CtlImg,u Save updated control register 1085 stb >CtlImg,u Save updated control register
888 L0465 lda R$U+1,x Get caller's track # 1086 L0465 lda R$U+1,x Get caller's track #
889 ldx >u00A7,u Get current drive table ptr 1087 ldx >u00A7,u Get current drive table ptr
890 lbsr L02A5 1088 lbsr L02A5
891 bcs L0489 1089 bcs L0489
892 ldb #$F0 Write track command? 1090 ldb #$F0 Write track command
893 *--- 1091 *---
894 IFEQ Level-1 1092 IFEQ Level-1
895 ldx PD.RGS,y 1093 ldx PD.RGS,y
896 ldx R$X,x 1094 ldx R$X,x
897 ELSE 1095 ELSE
898 ldx #$2000 start writing from block 1 1096 ldx #$2000 start writing from block 1
899 ENDC 1097 ENDC
900 1098
1099 IFNE SCII
1100 lda #1 normal unbuffered write
1101 * Next line prevents WrTrk from switching to SCII buffered mode. RG
1102 sta flagform,u
1103 ENDC
901 lbsr WrTrk Go write the track 1104 lbsr WrTrk Go write the track
1105 IFNE SCII
1106 clr flagform,u permit no-halt mode RG
1107 ENDC
902 1108
903 IFGT Level-1 1109 IFGT Level-1
904 L0479 ldu 2,s 1110 L0479 ldu 2,s
905 pshs b,cc Preserve error 1111 pshs b,cc Preserve error
906 ldb >FTask,u point to task 1112 ldb >FTask,u point to task
922 1128
923 * seek the head to track 0 1129 * seek the head to track 0
924 sktrk0 lbsr chkdrv 1130 sktrk0 lbsr chkdrv
925 ldx >u00A7,u 1131 ldx >u00A7,u
926 clr <$15,x 1132 clr <$15,x
927 lda #$05 1133 lda #1 was 5 but that causes head banging
928 L0497 ldb <PD.STP,y 1134 L0497 ldb <PD.STP,y
929 andb #%00000011 Just keep usable settings (6-30 ms) 1135 andb #%00000011 Just keep usable settings (6-30 ms)
930 eorb #%01001011 Set proper bits for controller 1136 eorb #%01001011 Set proper bits for controller
931 pshs a 1137 pshs a
932 lbsr L03E4 1138 lbsr L03E4
952 ENDC 1158 ENDC
953 bmi L04DE Not installed yet, try installing it 1159 bmi L04DE Not installed yet, try installing it
954 bne L04E0 Drive already up to speed, exit without error 1160 bne L04E0 Drive already up to speed, exit without error
955 1161
956 * Drive motor speed timing loop (could be F$Sleep call now) (was over .5 sec) 1162 * Drive motor speed timing loop (could be F$Sleep call now) (was over .5 sec)
957 ldx #32 wait for 32 ticks 1163 * 32 was not sufficient for one of my drives. RG
958 os9 F$Sleep 1164 ldx #50 wait for 32 ticks; increased it RG
1165 lbsr SC2Slp
959 1166
960 L04DE bsr InsVIRQ Install VIRQ to wait for drive motors 1167 L04DE bsr InsVIRQ Install VIRQ to wait for drive motors
961 L04E0 clrb No error & return 1168 L04E0 clrb No error & return
962 puls pc,y,x,d 1169 puls pc,y,x,d
963 1170
988 lda <D.DMAReq 1195 lda <D.DMAReq
989 beq L0509 1196 beq L0509
990 bsr InsVIRQ 1197 bsr InsVIRQ
991 bra IRQOut 1198 bra IRQOut
992 L0509 sta >DPort+CtrlReg 1199 L0509 sta >DPort+CtrlReg
993 IFNE H6309 1200 * I changed this to a clear. Don't see the point of an AND. RG
994 aim #$FE,>u00B5,u 1201 * IFNE H6309
995 ELSE 1202 * aim #$FE,>u00B5,u
996 lda u00B5,u 1203 * ELSE
997 anda #$FE 1204 * lda u00B5,u
998 sta u00B5,u 1205 * anda #$FE
999 ENDC 1206 * sta u00B5,u
1207 * ENDC
1000 * fdb u00B5 --- so changes in data size won't affect anything 1208 * fdb u00B5 --- so changes in data size won't affect anything
1209 clr u00B5,u
1001 IFEQ Level-1 1210 IFEQ Level-1
1002 clr >D.DskTmr 1211 clr >D.DskTmr
1003 ELSE 1212 ELSE
1004 clr <D.MotOn 1213 clr <D.MotOn
1005 ENDC 1214 ENDC