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comparison level1/modules/scbbt.asm @ 1942:b41df77588b0

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printer is now scbbp sio is now scbbt All references changed in various files
author boisy
date Sat, 26 Nov 2005 22:51:50 +0000
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1941:f408295c1f0a 1942:b41df77588b0
1 ********************************************************************
2 * scbbt - CoCo Bit-Banger Terminal Driver
3 *
4 * $Id$
5 *
6 * Edt/Rev YYYY/MM/DD Modified by
7 * Comment
8 * ------------------------------------------------------------------
9 * 9 ????/??/?? ???
10 * Original Tandy L2 distribution version.
11 *
12 * 10 ????/??/?? ???
13 * Added baud delay table for NitrOS-9.
14 *
15 * 11 2003/12/15 Boisy G. Pitre
16 * Merged Level 1 and Level 2 sources for now.
17
18 nam scbbt
19 ttl CoCo Bit-Banger Terminal Driver
20
21 * Disassembled 98/08/23 20:58:36 by Disasm v1.6 (C) 1988 by RML
22
23 ifp1
24 use defsfile
25 endc
26
27 tylg set Drivr+Objct
28 atrv set ReEnt+rev
29 rev set $00
30 edition set 9
31
32 mod eom,name,tylg,atrv,start,size
33
34 fcb UPDAT.
35
36 name fcs /scbbt/
37 fcb edition
38
39 IFGT Level-1
40
41 u0000 rmb 29
42 u001D rmb 1
43 u001E rmb 1
44 u001F rmb 1
45 u0020 rmb 2
46 u0022 rmb 2
47 u0024 rmb 1
48 u0025 rmb 1
49 size equ .
50
51 * Baud Rate Delay Table
52 DelayTbl
53 IFEQ H6309
54 * 6809 delay values (1.89MHz)
55 fdb $090C 110 baud
56 fdb $034C 300 baud
57 fdb $01A2 600 baud
58 fdb $00CE 1200 baud
59 fdb $0062 2400 baud
60 fdb $002E 4800 baud
61 fdb $0012 9600 baud
62 fdb $0003 32000 baud
63 ELSE
64 * 6309 native mode delay values (1.89MHz)
65 fdb $090C 110 baud (Unchanged, unknown)
66 fdb $03D0 300 baud
67 fdb $01A2 600 baud (Unchanged, unknown)
68 fdb $00F0 1200 baud
69 fdb $0073 2400 baud
70 fdb $0036 4800 baud
71 fdb $0017 9600 baud
72 fdb $0003 32000 baud (Unchanged, unknown)
73 ENDC
74
75 start lbra Init
76 lbra Read
77 lbra Write
78 lbra GetStat
79 lbra SetStat
80 lbra Term
81
82 * Init
83 *
84 * Entry:
85 * Y = address of device descriptor
86 * U = address of device memory area
87 *
88 * Exit:
89 * CC = carry set on error
90 * B = error code
91 *
92 Init pshs cc
93 orcc #IntMasks
94 ldx #PIA1Base
95 clr $01,x
96 ldd <IT.COL,y get col/row bytes
97 std <u0024,u
98 lda #$FE
99 sta ,x
100 lda #$36
101 sta $01,x
102 lda ,x
103 ldd <IT.PAR,y get parity/baud
104 lbsr L0148
105 puls cc
106 clrb
107
108 * Term
109 *
110 * Entry:
111 * U = address of device memory area
112 *
113 * Exit:
114 * CC = carry set on error
115 * B = error code
116 *
117 Term rts
118
119 * Read
120 *
121 * Entry:
122 * Y = address of path descriptor
123 * U = address of device memory area
124 *
125 * Exit:
126 * A = character read
127 * CC = carry set on error
128 * B = error code
129 *
130 Read bsr L00AC
131 bcs L00C8
132 ldb #$08
133 pshs b,cc
134 tst <u001E,u
135 beq L0066
136 dec $01,s
137 L0066 bra L0077
138 L0068 lda <PD.BAU,y
139 anda #$0F
140 cmpa #$07
141 beq L0077
142 ldx #$0001
143 os9 F$Sleep
144 L0077 pshs y
145 ldy #$FFFF
146 L007D lda >PIA1Base+2
147 leay -$01,y
148 beq L008B
149 lsra
150 bcs L007D
151 puls y
152 bra L0090
153 L008B puls y
154 lsra
155 bcs L0068
156 L0090 orcc #IntMasks
157 clra
158 bsr L00D5
159 L0095 bsr L00CE
160 ldb >PIA1Base+2
161 lsrb
162 rora
163 dec $01,s
164 bne L0095
165 bsr L00D5
166 tst <u001E,u
167 beq L00A8
168 lsra
169 L00A8 puls b,cc
170 clrb
171 rts
172 L00AC pshs a
173 lda <PD.BAU,y
174 anda #$0F
175 cmpa #$08
176 bcc L00C4
177 lsla
178 leax >DelayTbl,pcr
179 ldd a,x
180 std <u0020,u
181 clrb
182 puls pc,a
183 L00C4 ldb #E$BMode
184 puls a
185 L00C8 orcc #Carry
186 rts
187 L00CB stb >PIA1Base
188 L00CE pshs b,a
189 ldd <u0020,u
190 bra L00DC
191 L00D5 pshs b,a
192 ldd <u0020,u
193 lsra
194 rorb
195 L00DC subd #$0001
196 bne L00DC
197 puls pc,b,a
198
199 * Write
200 *
201 * Entry:
202 * A = character to write
203 * Y = address of path descriptor
204 * U = address of device memory area
205 *
206 * Exit:
207 * CC = carry set on error
208 * B = error code
209 *
210 Write bsr L00AC
211 bcs L00C8
212 ldb #$09
213 pshs b,cc
214 orcc #IntMasks
215 tst <u001E,u
216 beq L00F4
217 dec $01,s
218 L00F4 andcc #^Carry
219 L00F6 ldb #$02
220 bcs L00FB
221 clrb
222 L00FB bsr L00CB
223 lsra
224 dec $01,s
225 bne L00F6
226 ldb <u001D,u
227 beq L010B
228 andb #$FE
229 bsr L00CB
230 L010B ldb #$02
231 bsr L00CB
232 tst <u001F,u
233 beq L0118
234 ldb #$02
235 bsr L00CB
236 L0118 puls pc,b,cc
237
238 * GetStat
239 *
240 * Entry:
241 * A = function code
242 * Y = address of path descriptor
243 * U = address of device memory area
244 *
245 * Exit:
246 * CC = carry set on error
247 * B = error code
248 *
249 GetStat cmpa #SS.EOF
250 bne L0120
251 L011E clrb
252 rts
253 L0120 ldx PD.RGS,y
254 cmpa #SS.ScSiz
255 beq L0131
256 cmpa #SS.ComSt
257 bne L017E
258 ldd <u0022,u
259 std R$Y,x
260 bra L011E
261 L0131 ldx PD.RGS,y
262 clra
263 ldb <u0024,u
264 std R$X,x
265 ldb <u0025,u
266 std R$Y,x
267 bra L011E
268
269 * SetStat
270 *
271 * Entry:
272 * A = function code
273 * Y = address of path descriptor
274 * U = address of device memory area
275 *
276 * Exit:
277 * CC = carry set on error
278 * B = error code
279 *
280 SetStat cmpa #SS.ComSt
281 bne L017E
282 ldx PD.RGS,y
283 ldd R$Y,x
284 L0148 std <u0022,u
285 clra
286 clrb
287 std <u001D,u
288 sta <u001F,u
289 ldd <u0022,u
290 tstb
291 bpl L015C
292 inc <u001F,u
293 L015C bitb #$40
294 bne L017A
295 bitb #$20
296 beq L0167
297 inc <u001E,u
298 L0167 bita #$20
299 beq L0179
300 bita #$80
301 beq L017A
302 inc <u001D,u
303 bita #$40
304 bne L0179
305 inc <u001D,u
306 L0179 rts
307 L017A comb
308 ldb #E$BMode
309 rts
310 L017E comb
311 ldb #E$UnkSvc
312 rts
313
314 ELSE
315
316 rmb V.SCF
317 u001D rmb 1
318 u001E rmb 1
319 u001F rmb 1
320 BaudCnt rmb 2 baud rate counter
321 u0022 rmb 2
322 u0024 rmb 1
323 u0025 rmb 1
324 size equ .
325
326 BaudTbl fdb $0482 110 baud
327 fdb $01A2 300 baud
328 fdb $00CD 600 baud
329 fdb $0063 1200 baud
330 fdb $002D 2400 baud
331 fdb $0013 4800 baud
332 fdb $0005 9600 baud
333
334 start lbra Init
335 lbra Read
336 lbra Write
337 lbra GetStat
338 lbra SetStat
339 lbra Term
340
341 * Init
342 *
343 * Entry:
344 * Y = address of device descriptor
345 * U = address of device memory area
346 *
347 * Exit:
348 * CC = carry set on error
349 * B = error code
350 *
351 Init pshs cc
352 orcc #IntMasks
353 ldx #PIA1Base
354 clr $01,x
355 ldd <IT.COL,y get col/row bytes
356 std <u0024,u
357 lda #$FE
358 sta ,x
359 lda #$36
360 sta $01,x
361 lda ,x
362 ldd <IT.PAR,y get parity/baud
363 lbsr L014D
364 puls cc
365 clrb
366
367 * Term
368 *
369 * Entry:
370 * U = address of device memory area
371 *
372 * Exit:
373 * CC = carry set on error
374 * B = error code
375 *
376 Term rts
377
378 * Read
379 *
380 * Entry:
381 * Y = address of path descriptor
382 * U = address of device memory area
383 *
384 * Exit:
385 * A = character read
386 * CC = carry set on error
387 * B = error code
388 *
389 Read bsr L00B1
390 bcs L00CD
391 ldb #$08
392 pshs b,cc
393 tst <u001E,u
394 beq L0066
395 dec $01,s
396 L0066 bra L006E
397 L0068 ldx #$0001
398 os9 F$Sleep
399 L006E lda >PIA1Base+2
400 lsra
401 pshs x,a
402 lda >$FF69
403 bpl L0091
404 lda >PIA1Base+3
405 bita #$01
406 beq L0091
407 bita #$80
408 beq L0091
409 orcc #Entire
410 leax <L0091,pcr
411 pshs x
412 pshs u,y,x,dp,b,a,cc
413 jmp [D.SvcIRQ]
414 L0091 puls x,a
415 bcs L0068
416 orcc #IntMasks
417 clra
418 bsr L00DA
419 L009A bsr L00D3
420 ldb >PIA1Base+2
421 lsrb
422 rora
423 dec $01,s
424 bne L009A
425 bsr L00DA
426 tst <u001E,u
427 beq L00AD
428 lsra
429 L00AD puls b,cc
430 clrb
431 rts
432 L00B1 pshs a
433 lda <PD.BAU,y
434 anda #$0F mask out baud rate
435 cmpa #B19200
436 bcc L00C9
437 lsla
438 leax >BaudTbl,pcr
439 ldd a,x
440 std <BaudCnt,u
441 clrb
442 puls pc,a
443 L00C9 ldb #E$BMode
444 puls a
445 L00CD orcc #Carry
446 rts
447 L00D0 stb >PIA1Base
448 L00D3 pshs b,a
449 ldd <BaudCnt,u
450 bra L00E1
451 L00DA pshs b,a
452 ldd <BaudCnt,u
453 lsra
454 rorb
455 L00E1 subd #$0001
456 bne L00E1
457 puls pc,b,a
458
459 * Write
460 *
461 * Entry:
462 * A = character to write
463 * Y = address of path descriptor
464 * U = address of device memory area
465 *
466 * Exit:
467 * CC = carry set on error
468 * B = error code
469 *
470 Write bsr L00B1
471 bcs L00CD
472 ldb #$09
473 pshs b,cc
474 orcc #IntMasks
475 tst <u001E,u
476 beq L00F9
477 dec $01,s
478 L00F9 andcc #^Carry
479 L00FB ldb #$02
480 bcs L0100
481 clrb
482 L0100 bsr L00D0
483 lsra
484 dec $01,s
485 bne L00FB
486 ldb <u001D,u
487 beq L0110
488 andb #$FE
489 bsr L00D0
490 L0110 ldb #$02
491 bsr L00D0
492 tst <u001F,u
493 beq L011D
494 ldb #$02
495 bsr L00D0
496 L011D puls pc,b,cc
497
498 * GetStat
499 *
500 * Entry:
501 * A = function code
502 * Y = address of path descriptor
503 * U = address of device memory area
504 *
505 * Exit:
506 * CC = carry set on error
507 * B = error code
508 *
509 GetStat cmpa #SS.EOF
510 bne L0125
511 L0123 clrb
512 rts
513 L0125 ldx PD.RGS,y
514 cmpa #SS.ScSiz
515 beq L0136
516 cmpa #SS.ComSt
517 bne L0183
518 ldd <u0022,u
519 std R$Y,x
520 bra L0123
521 L0136 ldx PD.RGS,y
522 clra
523 ldb <u0024,u
524 std R$X,x
525 ldb <u0025,u
526 std R$Y,x
527 bra L0123
528
529 * SetStat
530 *
531 * Entry:
532 * A = function code
533 * Y = address of path descriptor
534 * U = address of device memory area
535 *
536 * Exit:
537 * CC = carry set on error
538 * B = error code
539 *
540 SetStat cmpa #SS.ComSt
541 bne L0183
542 ldx PD.RGS,y
543 ldd R$Y,x
544 L014D std <u0022,u
545 clra
546 clrb
547 std <u001D,u
548 sta <u001F,u
549 ldd <u0022,u
550 tstb
551 bpl L0161
552 inc <u001F,u
553 L0161 bitb #$40
554 bne L017F
555 bitb #$20
556 beq L016C
557 inc <u001E,u
558 L016C bita #$20
559 beq L017E
560 bita #$80
561 beq L017F
562 inc <u001D,u
563 bita #$40
564 bne L017E
565 inc <u001D,u
566 L017E rts
567 L017F comb
568 ldb <E$BMode
569 rts
570 L0183 comb
571 ldb #E$UnkSvc
572 rts
573
574 ENDC
575
576 emod
577 eom equ *
578 end
579