Mercurial > hg > Members > kono > nitros9-code
comparison level1/modules/rb1773.asm @ 1578:d58915e348d1
Updated with bit definitions of control register...
author | boisy |
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date | Thu, 20 May 2004 18:31:20 +0000 |
parents | e9c2b4be14f6 |
children | 1a19aed5dc34 |
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1577:872af387c477 | 1578:d58915e348d1 |
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35 atrv set ReEnt+rev | 35 atrv set ReEnt+rev |
36 rev set $01 | 36 rev set $01 |
37 edition set 11 | 37 edition set 11 |
38 | 38 |
39 * Configuration Settings | 39 * Configuration Settings |
40 N.Drives equ 4 number of drives to support | 40 N.Drives equ 4 number of drives to support |
41 TC9 equ 0 Set to 1 for TC9 special slowdowns | 41 TC9 equ 0 Set to 1 for TC9 special slowdowns |
42 PRECOMP equ 0 Set to 1 to turn on write precompensation | 42 PRECOMP equ 0 Set to 1 to turn on write precompensation |
43 | 43 |
44 * WD-17X3 Definitions | 44 * WD-17X3 Definitions |
45 CtrlReg equ $00 Control register for Tandy controllers; not part of WD | |
45 WD_Cmd equ $08 | 46 WD_Cmd equ $08 |
46 WD_Stat equ WD_Cmd | 47 WD_Stat equ WD_Cmd |
47 WD_Trak equ $09 | 48 WD_Trak equ $09 |
48 WD_Sect equ $0A | 49 WD_Sect equ $0A |
49 WD_Data equ $0B | 50 WD_Data equ $0B |
51 | |
52 * Control Register Definitions | |
53 C_HALT equ %10000000 Halt line to CPU is active when set | |
54 C_SIDSEL equ %01000000 Side select (0 = front side, 1 = back side) | |
55 C_DBLDNS equ %00100000 Density (0 = single, 1 = double) | |
56 C_WPRCMP equ %00010000 Write precompensation (0 = off, 1 = on) | |
57 C_MOTOR equ %00001000 Drive motor (0 = off, 1 = on) | |
58 C_DRV2 equ %00000100 Drive 2 selected when set | |
59 C_DRV1 equ %00000010 Drive 1 selected when set | |
60 C_DRV0 equ %00000001 Drive 0 selected when set | |
50 | 61 |
51 mod eom,name,tylg,atrv,start,size | 62 mod eom,name,tylg,atrv,start,size |
52 | 63 |
53 u0000 rmb DRVBEG+(DRVMEM*N.Drives) | 64 u0000 rmb DRVBEG+(DRVMEM*N.Drives) |
54 u00A7 rmb 2 Last drive table accessed (ptr) | 65 u00A7 rmb 2 Last drive table accessed (ptr) |
184 pshs u Save device mem ptr | 195 pshs u Save device mem ptr |
185 ldu >sectbuf,u Get pointer to sector buffer | 196 ldu >sectbuf,u Get pointer to sector buffer |
186 ldd #512 Return sector buffer memory | 197 ldd #512 Return sector buffer memory |
187 os9 F$SRtMem | 198 os9 F$SRtMem |
188 puls u Restore device mem ptr | 199 puls u Restore device mem ptr |
189 clr >DPort shut off drive motors | 200 clr >DPort+CtrlReg shut off drive motors |
190 IFEQ Level-1 | 201 IFEQ Level-1 |
191 clr >D.DskTmr Clear out drive motor timeout flag | 202 clr >D.DskTmr Clear out drive motor timeout flag |
192 ELSE | 203 ELSE |
193 clr <D.MotOn Clear out drive motor timeout flag | 204 clr <D.MotOn Clear out drive motor timeout flag |
194 ENDC | 205 ENDC |
354 *L0180 bita >DPort+WD_Stat check status register | 365 *L0180 bita >DPort+WD_Stat check status register |
355 * bne L0197 eat it & start reading sector | 366 * bne L0197 eat it & start reading sector |
356 * leay -1,y bump timeout timer down | 367 * leay -1,y bump timeout timer down |
357 * bne L0180 keep trying until it reaches 0 or sector read | 368 * bne L0180 keep trying until it reaches 0 or sector read |
358 * lda >u00A9,u get current drive settings | 369 * lda >u00A9,u get current drive settings |
359 * ora #%00001000 turn drive motor on | 370 * ora #C_MOTOR turn drive motor on |
360 * sta >DPort send to controller | 371 * sta >DPort+CtrlReg send to controller |
361 * puls y,cc restore regs | 372 * puls y,cc restore regs |
362 * lbra L03E0 exit with Read Error | 373 * lbra L03E0 exit with Read Error |
363 *** Blobstop fixes | 374 *** Blobstop fixes |
364 stb >DPort send command to FDC | 375 stb >DPort+CtrlReg send B to control register |
365 nop allow HALT to take effect | 376 nop allow HALT to take effect |
366 nop | 377 nop |
367 bra L0197 and a bit more time | 378 bra L0197 and a bit more time |
368 * Read loop - exited with NMI | 379 * Read loop - exited with NMI |
369 * Entry: X=ptr to sector buffer | 380 * Entry: X=ptr to sector buffer |
370 * B=Control register settings | 381 * B=Control register settings |
371 L0197 lda >DPort+WD_Data get byte from controller | 382 L0197 lda >DPort+WD_Data get byte from controller |
372 sta ,x+ store into sector buffer | 383 sta ,x+ store into sector buffer |
373 * stb >DPort drive info | 384 * stb >DPort+CtrlReg drive info |
374 nop -- blobstop fix | 385 nop -- blobstop fix |
375 bra L0197 Keep reading until sector done | 386 bra L0197 Keep reading until sector done |
376 | 387 |
377 L01A1 orcc #IntMasks Shut off IRQ & FIRQ | 388 L01A1 orcc #IntMasks Shut off IRQ & FIRQ |
378 stb >DPort+WD_Cmd Send command | 389 stb >DPort+WD_Cmd Send command |
379 * ldy #$FFFF | 390 * ldy #$FFFF |
380 ldb #%00101000 Double density & motor on | 391 ldb #C_DBLDNS+C_MOTOR Double density & motor on |
392 * ldb #%00101000 Double density & motor on | |
381 orb >u00A9,u Merge with current drive settings | 393 orb >u00A9,u Merge with current drive settings |
382 stb >DPort Send to control register | 394 stb >DPort+CtrlReg Send to control register |
383 ldb #%10101000 Enable halt, double density & motor on | 395 ldb #C_HALT+C_DBLDNS+C_MOTOR Enable halt, double density & motor on |
396 * ldb #%10101000 Enable halt, double density & motor on | |
384 orb >u00A9,u Merge that with current drive settings | 397 orb >u00A9,u Merge that with current drive settings |
385 lbra L0406 Time delay to wait for command to settle | 398 lbra L0406 Time delay to wait for command to settle |
386 * lda #$02 | 399 * lda #$02 |
387 *L01BE rts | 400 *L01BE rts |
388 | 401 |
460 *L0229 bita >DPort+WD_Stat Controller done yet? | 473 *L0229 bita >DPort+WD_Stat Controller done yet? |
461 * bne L0240 Yes, go write sector out | 474 * bne L0240 Yes, go write sector out |
462 * leay -$01,y No, bump wait counter | 475 * leay -$01,y No, bump wait counter |
463 * bne L0229 Still more tries, continue | 476 * bne L0229 Still more tries, continue |
464 * lda >u00A9,u Get current drive control register settings | 477 * lda >u00A9,u Get current drive control register settings |
465 * ora #%00001000 Drive motor on (but drive select off) | 478 * ora #C_MOTOR Drive motor on (but drive select off) |
466 * sta >DPort Send to controller | 479 * sta >DPort+CtrlReg Send to controller |
467 * puls y,cc Restore regs | 480 * puls y,cc Restore regs |
468 * lbra L03AF Check for errors from status register | 481 * lbra L03AF Check for errors from status register |
469 | 482 |
470 IFGT Level-1 | 483 IFGT Level-1 |
471 *** added blobstop | 484 *** added blobstop |
472 lda FBlock+1,u get the block number for format | 485 lda FBlock+1,u get the block number for format |
473 beq L0230 if not format, don't do anything | 486 beq L0230 if not format, don't do anything |
474 sta >$FFA1 otherwise map the block in | 487 sta >$FFA1 otherwise map the block in |
475 ENDC | 488 ENDC |
476 | 489 |
477 L0230 stb >DPort send command to FDC | 490 L0230 stb >DPort+CtrlReg send command to FDC |
478 bra L0240 wait a bit for HALT to enable | 491 bra L0240 wait a bit for HALT to enable |
479 * Write sector routine (Entry: B= drive/side select) (NMI will break out) | 492 * Write sector routine (Entry: B= drive/side select) (NMI will break out) |
480 L0240 nop --- wait a bit more | 493 L0240 nop --- wait a bit more |
481 lda ,x+ Get byte from write buffer | 494 lda ,x+ Get byte from write buffer |
482 sta >DPort+WD_Data Save to FDC's data register | 495 sta >DPort+WD_Data Save to FDC's data register |
483 * EAT 2 CYCLES: TC9 ONLY (TRY 1 CYCLE AND SEE HOW IT WORKS) | 496 * EAT 2 CYCLES: TC9 ONLY (TRY 1 CYCLE AND SEE HOW IT WORKS) |
484 IFEQ TC9-1 | 497 IFEQ TC9-1 |
485 nop | 498 nop |
486 nop | 499 nop |
487 ENDC | 500 ENDC |
488 * stb >DPort Set up to read next byte | 501 * stb >DPort+CtrlReg Set up to read next byte |
489 bra L0240 Go read it | 502 bra L0240 Go read it |
490 | 503 |
491 * NMI routine | 504 * NMI routine |
492 NMISvc leas R$Size,s Eat register stack | 505 NMISvc leas R$Size,s Eat register stack |
493 * puls y,cc Get path dsc. ptr & CC | 506 * puls y,cc Get path dsc. ptr & CC |
549 bsr L032B Get track/sector # (A=Trk, B=Sector) | 562 bsr L032B Get track/sector # (A=Trk, B=Sector) |
550 pshs a Save track # | 563 pshs a Save track # |
551 lda >u00AD,u Get side 1/2 flag | 564 lda >u00AD,u Get side 1/2 flag |
552 beq L02C4 Side 1, skip ahead | 565 beq L02C4 Side 1, skip ahead |
553 lda >u00A9,u Get control register settings | 566 lda >u00A9,u Get control register settings |
554 ora #%01000000 Set side 2 (drive 3) select | 567 ora #C_SIDSEL Set side 2 (drive 3) select |
568 * ora #%01000000 Set side 2 (drive 3) select | |
555 sta >u00A9,u Save it back | 569 sta >u00A9,u Save it back |
556 L02C4 lda <PD.TYP,y Get drive type settings | 570 L02C4 lda <PD.TYP,y Get drive type settings |
557 bita #%00000010 ??? (Base 0/1 for sector #?) | 571 bita #%00000010 ??? (Base 0/1 for sector #?) |
558 bne L02CC Skip ahead | 572 bne L02CC Skip ahead |
559 incb Bump sector # up by 1 | 573 incb Bump sector # up by 1 |
583 beq L02F9 48 tpi, skip ahead | 597 beq L02F9 48 tpi, skip ahead |
584 lsl ,s Multiply pre-comp value by 2 ('double-step') | 598 lsl ,s Multiply pre-comp value by 2 ('double-step') |
585 L02F9 cmpa ,s+ Is track # high enough to warrant precomp? | 599 L02F9 cmpa ,s+ Is track # high enough to warrant precomp? |
586 bls L0307 No, continue normally | 600 bls L0307 No, continue normally |
587 ldb >u00A9,u | 601 ldb >u00A9,u |
588 orb #%00010000 Turn on Write precomp | 602 orb #C_WRPCMP Turn on Write precomp |
603 * orb #%00010000 Turn on Write precomp | |
589 stb >u00A9,u | 604 stb >u00A9,u |
590 ENDC | 605 ENDC |
591 | 606 |
592 L0307 ldb >u00AA,u ??? Get flag (same drive flag?) | 607 L0307 ldb >u00AA,u ??? Get flag (same drive flag?) |
593 bne L0314 no, skip ahead | 608 bne L0314 no, skip ahead |
722 ldd >VIRQCnt,pc Get initial count value for drive motor speed | 737 ldd >VIRQCnt,pc Get initial count value for drive motor speed |
723 std >u00B1,u Save it | 738 std >u00B1,u Save it |
724 bra L03E6 Wait for controller to finish previous command | 739 bra L03E6 Wait for controller to finish previous command |
725 | 740 |
726 * Send command to FDC | 741 * Send command to FDC |
727 L03F7 lda #%00001000 Mask in Drive motor on bit | 742 L03F7 lda #C_MOTOR |
743 * lda #%00001000 Mask in Drive motor on bit | |
728 ora >u00A9,u Merge in drive/side selects | 744 ora >u00A9,u Merge in drive/side selects |
729 sta >DPort Turn the drive motor on & select drive | 745 sta >DPort+CtrlReg Turn the drive motor on & select drive |
730 stb >DPort+WD_Cmd Save command & return | 746 stb >DPort+WD_Cmd Save command & return |
731 L0403 rts | 747 L0403 rts |
732 | 748 |
733 L0404 bsr L03F7 Go send command to controller | 749 L0404 bsr L03F7 Go send command to controller |
734 | 750 |
814 ldb R$Y+1,x Get caller's side/density | 830 ldb R$Y+1,x Get caller's side/density |
815 bitb #$01 Check side | 831 bitb #$01 Check side |
816 beq L0465 Side 1, skip ahead | 832 beq L0465 Side 1, skip ahead |
817 com >u00AD,u | 833 com >u00AD,u |
818 ldb >u00A9,u Get current control register settings | 834 ldb >u00A9,u Get current control register settings |
819 orb #%01000000 Mask in side 2 | 835 * orb #%01000000 Mask in side 2 |
836 orb #C_SIDSEL Mask in side 2 | |
820 stb >u00A9,u Save updated control register | 837 stb >u00A9,u Save updated control register |
821 L0465 lda R$U+1,x Get caller's track # | 838 L0465 lda R$U+1,x Get caller's track # |
822 ldx >u00A7,u Get current drive table ptr | 839 ldx >u00A7,u Get current drive table ptr |
823 lbsr L02A5 | 840 lbsr L02A5 |
824 bcs L0489 | 841 bcs L0489 |
882 | 899 |
883 L04B3 pshs y,x,d Preserve regs | 900 L04B3 pshs y,x,d Preserve regs |
884 ldd >VIRQCnt,pc Get VIRQ initial count value | 901 ldd >VIRQCnt,pc Get VIRQ initial count value |
885 std >u00B1,u Save it | 902 std >u00B1,u Save it |
886 lda >u00A9,u ?Get drive? | 903 lda >u00A9,u ?Get drive? |
887 ora #%00001000 Turn drive motor on for that drive | 904 ora #C_MOTOR Turn drive motor on for that drive |
888 sta >DPort Send drive motor on command to FDC | 905 * ora #%00001000 Turn drive motor on for that drive |
906 sta >DPort+CtrlReg Send drive motor on command to FDC | |
889 IFEQ Level-1 | 907 IFEQ Level-1 |
890 lda >D.DskTmr Get VIRQ flag | 908 lda >D.DskTmr Get VIRQ flag |
891 ELSE | 909 ELSE |
892 lda <D.MotOn Get VIRQ flag | 910 lda <D.MotOn Get VIRQ flag |
893 ENDC | 911 ENDC |
928 IRQSvc pshs a | 946 IRQSvc pshs a |
929 lda <D.DMAReq | 947 lda <D.DMAReq |
930 beq L0509 | 948 beq L0509 |
931 bsr InsVIRQ | 949 bsr InsVIRQ |
932 bra IRQOut | 950 bra IRQOut |
933 L0509 sta >DPort | 951 L0509 sta >DPort+CtrlReg |
934 IFNE H6309 | 952 IFNE H6309 |
935 aim #$FE,>u00B5,u | 953 aim #$FE,>u00B5,u |
936 ELSE | 954 ELSE |
937 lda u00B5,u | 955 lda u00B5,u |
938 anda #$FE | 956 anda #$FE |