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comparison level1/modules/vtio.asm @ 3233:f467615c0e95

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Made a few changes to level 1 VTIO for space and speed.
author David Ladd <drencor-xeen@users.sourceforge.net>
date Sat, 10 Feb 2018 23:08:57 -0600
parents 604865c524be
children d1c60028af6e
comparison
equal deleted inserted replaced
3232:bfc9f200f1c7 3233:f467615c0e95
33 * 33 *
34 * 2 2018/02/07 David Ladd 34 * 2 2018/02/07 David Ladd
35 * L. Curtis Boyle 35 * L. Curtis Boyle
36 * Updated GoGrfo to load GrfDrv if GrfDrv was not found in memory 36 * Updated GoGrfo to load GrfDrv if GrfDrv was not found in memory
37 * using a new load routine called LoadSub 37 * using a new load routine called LoadSub
38 *
39 * 3 2018/02/10 David Ladd
40 * L. Curtis Boyle
41 * Optimized a few routines for speed based on long branches to
42 * short branches.
38 43
39 nam VTIO 44 nam VTIO
40 ttl OS-9 Level One V2 CoCo I/O driver 45 ttl OS-9 Level One V2 CoCo I/O driver
41 46
42 ifp1 47 ifp1
83 * ldy #V.5136 88 * ldy #V.5136
84 * ldy #V.51End 89 * ldy #V.51End
85 * puls y 90 * puls y
86 91
87 stu >D.KbdSta store devmem ptr 92 stu >D.KbdSta store devmem ptr
88 clra clear A
89 leax <V.SCF,u point to memory after V.SCF 93 leax <V.SCF,u point to memory after V.SCF
90 ; ldb #$5D get counter 94 ldd #V.51End-V.SCF
91 ldb #V.51End-V.SCF
92 L002E sta ,x+ clear mem 95 L002E sta ,x+ clear mem
93 decb decrement counter 96 decb decrement counter
94 bne L002E continue if more 97 bne L002E continue if more
95 98
96 leax FlashCursor,pcr * Point to dummy cursor flash 99 leax FlashCursor,pcr * Point to dummy cursor flash
155 abx X now points to curr char 158 abx X now points to curr char
156 lda ,x get char 159 lda ,x get char
157 bsr L009D check for tail wrap 160 bsr L009D check for tail wrap
158 stb V.IBufT,u store updated tail 161 stb V.IBufT,u store updated tail
159 andcc #^(IRQMask+Carry) unmask IRQ 162 andcc #^(IRQMask+Carry) unmask IRQ
163 FlashCursor
160 rts 164 rts
161 165
162 Put2Bed lda V.BUSY,u get calling process ID 166 Put2Bed lda V.BUSY,u get calling process ID
163 sta V.WAKE,u store in V.WAKE 167 sta V.WAKE,u store in V.WAKE
164 andcc #^IRQMask clear interrupts 168 andcc #^IRQMask clear interrupts
218 sta <V.2Key1,u 222 sta <V.2Key1,u
219 std <V.2Key2,u 223 std <V.2Key2,u
220 224
221 CheckFlash 225 CheckFlash
222 dec V.FlashCount,u Get flash counter 226 dec V.FlashCount,u Get flash counter
223 beq FlashTime count zero, flash cursor 227 bne AltIRQEnd Otherwise just call clock module
224 bra AltIRQEnd Otherwise just call clock module
225 228
226 FlashTime 229 FlashTime
227 jsr [V.Flash,u] Call flash routine 230 jsr [V.Flash,u] Call flash routine
228 lda #CFlash50hz Re-init count 231 lda #CFlash50hz Re-init count
229 sta V.FlashCount,u 232 sta V.FlashCount,u
248 bne L010E 251 bne L010E
249 ldb <V.ClkCnt,u 252 ldb <V.ClkCnt,u
250 beq L010A 253 beq L010A
251 decb 254 decb
252 L0105 stb <V.ClkCnt,u 255 L0105 stb <V.ClkCnt,u
253 * bra AltIRQEnd
254 bra CheckFlash 256 bra CheckFlash
255 L010A ldb #$05 257 L010A ldb #$05
256 bra L011A 258 bra L011A
257 L010E sta <V.6F,u 259 L010E sta <V.6F,u
258 ldb #$05 260 ldb #$05
548 lslb 550 lslb
549 lslb 551 lslb
550 lslb 552 lslb
551 pshs b 553 pshs b
552 ora ,s+ ; recombine rows 554 ora ,s+ ; recombine rows
553 puls b 555 ldb ,s
554 andb #%00111100 ; Shift middle 4 rows down 2 places 556 andb #%00111100 ; Shift middle 4 rows down 2 places
555 lsrb 557 lsrb
556 lsrb 558 lsrb
557 pshs b 559 stb ,s
558 ora ,s+ ; recombine rows 560 ora ,s+ ; recombine rows
559 puls b 561 puls b,pc
560 rts
561 562
562 endc 563 endc
563 564
564 * Key Table 565 * Key Table
565 * 1st column = key (no modifier) 566 * 1st column = key (no modifier)
691 L0401 ldb #$07 692 L0401 ldb #$07
692 ldx #$FFC6 693 ldx #$FFC6
693 lsra 694 lsra
694 L0407 lsra 695 L0407 lsra
695 bcs L0410 696 bcs L0410
696 sta ,x+ 697 sta ,x++
697 leax $01,x
698 bra L0414 698 bra L0414
699 L0410 leax $01,x 699 L0410 leax $01,x
700 sta ,x+ 700 sta ,x+
701 L0414 decb 701 L0414 decb
702 bne L0407 702 bne L0407
792 std R$Y,x 792 std R$Y,x
793 clrb 793 clrb
794 puls pc,y,cc 794 puls pc,y,cc
795 795
796 L04B3 sta >PIA0Base+1 796 L04B3 sta >PIA0Base+1
797 lda #$7F 797 ldd #$7F40
798 ldb #$40 798 L04C7 pshs b
799 bra L04C7 799 sta >PIA1Base
800 tst >PIA0Base
801 bpl L04D5
802 adda ,s+
800 L04BC lsrb 803 L04BC lsrb
801 cmpb #$01 804 cmpb #$01
802 bhi L04C7 805 bhi L04C7
803 lsra 806 lsra
804 lsra 807 lsra
805 tfr a,b 808 tfr a,b
806 clra 809 clra
807 rts 810 rts
808 L04C7 pshs b
809 sta >PIA1Base
810 tst >PIA0Base
811 bpl L04D5
812 adda ,s+
813 bra L04BC
814 L04D5 suba ,s+ 811 L04D5 suba ,s+
815 bra L04BC 812 bra L04BC
816 813
817 * Return display status 814 * Return display status
818 * Entry: A = path 815 * Entry: A = path
859 subb $02,s sutract from Y on stack 856 subb $02,s sutract from Y on stack
860 lda #32 byte sper line 857 lda #32 byte sper line
861 mul 858 mul
862 addb ,s+ add offset on stack 859 addb ,s+ add offset on stack
863 adca #$00 860 adca #$00
864 ldy <V.SBAdd,u get base address 861 ldx <V.SBAdd,u get base address
865 leay d,y move D bytes into address 862 leax d,x move D bytes into address
866 lda ,s pick up original X coor 863 lda ,s pick up original X coor
867 sty ,s put offset addr on stack 864 stx ,s put offset addr on stack
868 anda <V.PixBt,u 865 anda <V.PixBt,u
869 ldx <V.MTabl,u 866 ldx <V.MTabl,u
870 lda a,x 867 lda a,x
871 puls pc,y,x X = offset address, Y = base 868 puls pc,y,x X = offset address, Y = base
872 869
1013 beq L0608 branch if not 1010 beq L0608 branch if not
1014 L0606 clrb else clear carry 1011 L0606 clrb else clear carry
1015 rts and return 1012 rts and return
1016 1013
1017 L0608 pshs y,x,a 1014 L0608 pshs y,x,a
1018 lbsr LinkSub 1015 bsr LinkSub
1019 bcc L061F branch if link was successful 1016 bcc L061F branch if link was successful
1020 ldx $01,s get pointer to name on stack 1017 ldx $01,s get pointer to name on stack
1021 pshs u 1018 bsr LoadSub
1022 os9 F$Load try to load subroutine I/O module
1023 puls u
1024 bcc L061F 1019 bcc L061F
1025 puls y,x,a 1020 puls y,x,a
1026 lbra NoIOMod 1021 lbra NoIOMod
1027 L061F leax <V.GrfDrvE,u get base pointer to CO-entries 1022 L061F leax <V.GrfDrvE,u get base pointer to CO-entries
1028 lda ,s 1023 lda ,s
1029 bsr GetModOffset ; Get offset in table 1024 bsr GetModOffset ; Get offset in table
1030 sty a,x ; Save address 1025 sty a,x ; Save address
1031 1026
1032 puls y,x,a 1027 puls y,x,a
1033 ldb #$00 CO-module init offset 1028 clrb #$00 CO-module init offset
1034 lbra CallCO call it 1029 lbra CallCO call it
1035 1030
1036 ; 1031 ;
1037 ; Get module offset from V.GrfDrvE into A reg. 1032 ; Get module offset from V.GrfDrvE into A reg.
1038 ; I had to do this because the previous system would only work 1033 ; I had to do this because the previous system would only work
1099 bne L0681 branch if not zero 1094 bne L0681 branch if not zero
1100 pshs y,a else preserve regs 1095 pshs y,a else preserve regs
1101 leax >GrfDrv,pcr get pointer to name string 1096 leax >GrfDrv,pcr get pointer to name string
1102 bsr LinkSub link to GrfDrv 1097 bsr LinkSub link to GrfDrv
1103 bcc L067B branch if ok 1098 bcc L067B branch if ok
1099 leax >GrfDrv,pcr get pointer to name string
1104 bsr LoadSub 1100 bsr LoadSub
1105 bcc L067B 1101 bcc L067B
1106 puls pc,y,a else exit with error 1102 puls pc,y,a else exit with error
1107 L067B sty <V.GrfDrvE,u save module entry pointer 1103 L067B sty <V.GrfDrvE,u save module entry pointer
1108 L067F puls y,a restore regs 1104 L067F puls y,a restore regs
1297 bne L0805 1293 bne L0805
1298 rts 1294 rts
1299 1295
1300 * Dummy flash cursor routine, can be replaced by COxx module. 1296 * Dummy flash cursor routine, can be replaced by COxx module.
1301 1297
1302 FlashCursor
1303 rts
1304
1305 emod 1298 emod
1306 eom equ * 1299 eom equ *
1307 end 1300 end