# HG changeset patch # User boisy # Date 1062700305 0 # Node ID 7fdef42e19a0cd2c1c104a477b0e1085a05f7b8e # Parent d39be8bc97bc18d95324e9109396d7a848667f3c New clock/clock2 combo diff -r d39be8bc97bc -r 7fdef42e19a0 level1/modules/clock.asm --- a/level1/modules/clock.asm Thu Sep 04 18:31:20 2003 +0000 +++ b/level1/modules/clock.asm Thu Sep 04 18:31:45 2003 +0000 @@ -1,96 +1,60 @@ ******************************************************************** -* Clock - OS-9 Level One V2 Clock module +* Clock - OS-9 System Clock +* +* CoCo 3 notes: +* Includes support for several different RTC chips, GIME Toggle +* IRQ fix, numerous minor changes. * * $Id$ * -* NOTE: This clock is TOTALLY VALID for ALL DATES between 1900-2155 -* * Edt/Rev YYYY/MM/DD Modified by * Comment * ------------------------------------------------------------------ -* 5 1985/??/?? -* From Tandy OS-9 Level One VR 02.00.00 +* ????/??/?? +* NitrOS-9 2.00 distribution. * -* 6 1999/05/03 Boisy G. Pitre -* Modified to handle leap years properly for 1900 and 2100 A.D. +* 9r4 2003/01/01 Boisy G. Pitre +* Back-ported to OS-9 Level Two. * -* 2002/05/14 Boisy G. Pitre -* Added TC^3 SCSI/B&B RTC Clock Support. - - nam Clock - ttl OS-9 Level One V2 Clock module +* 9r5 2003/08/18 Boisy G. Pitre +* Separated clock into Clock and Clock2 for modularity. +* +* 9r6 2003/09/04 Boisy G. Pitre +* Combined Level One and Level Two sources - IFP1 - use defsfile - ENDC + nam Clock + ttl OS-9 System Clock -tylg set Systm+Objct -atrv set ReEnt+rev -rev set $00 -edition set 6 - - mod eom,name,tylg,atrv,ClkEnt,RTC.Base - -size equ . + IFP1 + use defsfile + ENDC -name fcs /Clock/ - fcb edition +Edtn equ 9 +rev equ 6 + -* If no RTC defines are set, then this is a software clock - IFEQ RTCBB+RTCTC3 -SOFT set 1 - ENDC +*------------------------------------------------------------ +* +* Start of module +* + mod len,name,Systm+Objct,ReEnt+rev,Init,0 - IFNE RTCBB -MPIFlag set 1 -SlotSlct set $22 -RTC.Base equ $FF5C - ENDC - IFNE RTCTC3 -RTC.Base equ $FF7C - ENDC - IFNE SOFT -RTC.Base equ size - ENDC +name fcs "Clock" + fcb Edtn + + IFEQ Level-1 - IFNE RTCBB+RTCTC3 -RTC.Zero equ -4 Send zero bit by writing this offset -RTC.One equ -3 Send one bit by writing this offset -RTC.Read equ 0 Read data from this offset - ENDC +*TkPerTS equ 2 ticks per time slice +TkPerTS equ TkPerSec/10 ticks per time slice -SysTbl fcb F$Time +NewSvc fcb F$Time fdb FTime-*-2 fcb F$VIRQ fdb FVIRQ-*-2 - - IFEQ SOFT - fcb F$STime fdb FSTime-*-2 - - ENDC - fcb $80 - IFNE SOFT -* table of days of the month -MonthChk fcb 00 - fcb 31 January - fcb 28 February - fcb 31 March - fcb 30 April - fcb 31 May - fcb 30 June - fcb 31 July - fcb 31 August - fcb 30 September - fcb 31 October - fcb 30 November - fcb 31 December - - ELSE - FSTime ldx R$X,u ldd ,x std MPI.Slct Select slot - pshs b - andb #$F0 - orb SlotSlct,pcr - stb >MPI.Slct - ENDC - - lbsr SendMsg Initialize clock - ldx #D.Sec - ldb #8 Tfr 8 bytes - -tfrloop jsr ,y Tfr 1 byte - bitb #$03 - beq skipstuf Skip over day-of-week, etc. - leax -1,x -skipstuf decb - bne tfrloop - - IFNE MPIFlag - puls b - stb >MPI.Slct restore MPAK slot - ENDC - - puls u,y,cc,pc - -ClkMsg fcb $C5,$3A,$A3,$5C,$C5,$3A,$A3,$5C -* Enable clock with message $C53AA35CC53AA35C -SendMsg lda RTC.Read,u Send Initialization message to clock - leax MonthChk,pcr - ldb $FFFE reset +LinkOk sty ClockIRQ,pcr stx SysTbl,pcr + leay >NewSvc,pcr os9 F$SSvc ldx #PIA0Base clra @@ -429,13 +228,8 @@ sta 3,x PIA0Base side B to I/O reg lda 2,x - IFEQ SOFT - - lbsr UpdTime Update time from RTC if one + puls pc,dp,cc - ENDC - - puls pc,dp,cc * F$Time system call code FTime ldx R$X,u @@ -448,6 +242,496 @@ clrb rts - emod -eom equ * - end + + + + ELSE + + + + +* OS-9 Level Two Clock + +TkPerTS equ 2 ticks per time slice +GI.Toggl equ %00000001 GIME CART* IRQ enable bit, for CC3 + +* TC9 needs to reset more interrupt sources +*GI.Toggl equ %00000111 GIME SERINT*, KEYINT*, CART* IRQ enable bits + + +* Table to set up Service Calls: +* +NewSvc fcb F$Time + fdb F.Time-*-2 + fcb F$VIRQ + fdb F.VIRQ-*-2 + fcb F$Alarm + fdb F.ALARM-*-2 + fcb F$STime + fdb F.STime-*-2 + fcb $80 end of service call installation table + +*--------------------------------------------------------- +* IRQ Handling starts here. +* +* Caveat: There may not be a stack at this point, so avoid using one. +* Stack is set up by the kernel between here and SvcVIRQ. +* +SvcIRQ lda >IRQEnR Get GIME IRQ Status and save it. + ora $0643 + stb >$0645 + std >$FFA1 + andcc #^IntMasks + ENDC + + ldd Vi.Cnt,x Decrement tick count + IFNE H6309 + decd --- subd #1 + ELSE + subd #$0001 + ENDC + bne notzero Is this one done? + lda Vi.Stat,x Should we reset? + bmi doreset + lbsr DelVIRQ No, delete this entry +doreset ora #$01 Mark this VIRQ as triggered. + sta Vi.Stat,x + lda #$80 Add VIRQ as interrupt source + sta ,s + ldd Vi.Rst,x Reset from Reset count. +notzero std Vi.Cnt,x +virqent ldx ,y++ + bne virqloop + + IFGT Level-2 + puls d + orcc #Carry + stb >$0643 + stb >$FFA1 + incb + stb >$0645 + stb >$FFA1 + andcc #^IntMasks + ELSE + puls a Get VIRQ status flag: high bit set if VIRQ + ENDC + + ora $0643 grab current map type + ldb >$0645 + pshs d save it + orcc #IntMasks IRQs off + lda >$0660 SCF local memory ---x + sta >$0643 into DAT image ---x + sta >$FFA1 and into RAM ---x + inca + sta >$0645 + sta >$FFA2 map in SCF, CC3IO, WindInt, etc. + ENDC + + jsr [>D.AltIRQ] go update mouse, gfx cursor, keyboard, etc. + + IFGT Level-2 + puls d restore original map type ---x + orcc #IntMasks + sta >$0643 into system DAT image ---x + stb >$0645 + std >$FFA1 and into RAM ---x + andcc #$AF + ENDC + + dec WGlobal+G.AlPID + ble VIRQend Quit if no Alarm set + ldd >WGlobal+G.AlPckt+3 Does Hour/Minute agree? + cmpd WGlobal+G.AlPckt+1 Does Month/Day agree? + cmpd WGlobal+G.AlPckt+0 Does Year agree? + cmpb WGlobal+G.AlPID + cmpd #1 + beq checkbel + os9 F$Send + bra endalarm +checkbel ldb WGlobal+G.AlPID + bra VIRQend +dobell ldx >WGlobal+G.BelVec + beq VIRQend + jsr ,x +VIRQend jmp [>D.Clock] Jump to kernel's timeslice routine + +*------------------------------------------------------------ +* Interrupt polling and GIME reset code +* + +* +* Call [D.Poll] until all interrupts have been handled +* +Dopoll + IFGT Level-2 + lda >$0643 Level 3: get map type + ldb >$0645 + pshs d save for later + ENDC +Dopoll.i + jsr [>D.Poll] Call poll routine + bcc DoPoll.i Until error (error -> no interrupt found) + + IFGT Level-2 + puls d + orcc #IntMasks + sta >$0643 + stb >$0645 + std >$FFA1 + andcc #^IntMasks + ENDC + +* +* Reset GIME to avoid missed IRQs +* +DoToggle lda #^GI.Toggl Mask off CART* bit + anda IRQEnR Disable CART + stb >IRQEnR Enable CART + clrb + rts + + +*------------------------------------------------------------ +* +* Handle F$VIRQ system call +* +F.VIRQ pshs cc + orcc #IntMasks Disable interrupts + ldy $0643 + ldb >$0645 + std 2,y + ELSE + leay -2,y point to first null VIRQ entry + ldx R$Y,u + stx ,y + ENDC + ldy R$D,u + sty ,x + bra virqexit + + IFGT Level-2 +v.chk leay 4,y +RemVIRQ ldx ,y + ELSE +RemVIRQ ldx ,y++ + ENDC + beq virqexit + cmpx R$Y,u + bne RemVIRQ + bsr DelVIRQ +virqexit puls cc + clrb + rts + +DelVIRQ pshs x,y +DelVLup + IFGT Level-2 + ldq ,y++ move entries up in table + leay 2,y + stq -8,y + bne DelVLup + puls x,y,pc + ELSE + ldx ,y++ move entries up in table + stx -4,y + bne DelVLup + puls x,y + leay -2,y + rts + ENDC + + IFGT Level-1 +*------------------------------------------------------------ +* +* Handle F$Alarm call +* +F.Alarm ldx #WGlobal+G.AlPckt + ldd R$D,u + bne DoAlarm + std G.AlPID-G.AlPckt,x Erase F$Alarm PID, Signal. + rts + +DoAlarm tsta If PID != 0, set alarm for this process + bne SetAlarm + cmpd #1 1 -> Set system-wide alarm + bne GetAlarm +SetAlarm std G.AlPID-G.AlPckt,x + ldy $FF98 set 50 Hz VSYNC + ENDC + ENDC + + sta 1,x enable DDRA + sta ,x set port A all inputs + sta 3,x enable DDRB + coma + sta 2,x set port B all outputs + ldd #$343C [A]=PIA0 CRA contents, [B]=PIA0 CRB contents + sta 1,x CA2 (MUX0) out low, port A, disable HBORD high-to-low IRQs + stb 3,x CB2 (MUX1) out low, port B, disable VBORD low-to-high IRQs + lda ,x clear possible pending PIA0 HBORD IRQ + lda 2,x clear possible pending PIA0 VBORD IRQ + +* Don't need to explicitly read RTC during initialization + ldd #59*256+TkPerTS last second and time slice in minute + std IRQEnR enable GIME VBORD IRQs + ENDC + +* Call Clock2 init routine + ldy $FFD9 2 MHz (Really should check $A0 first) + puls cc,b + + IFNE MPIFlag + stb >MPI.Slct Restore saved "currently" selected MPak slot + ENDC + + clrb + rts + +RTCPre orcc #IntMasks + + IFNE MPIFlag + ldb >MPI.Slct Save currently selected MPak slot on stack + stb 3,s + andb #$F0 + orb >SlotSlct,pcr Get slot to select + stb >MPI.Slct Select MPak slot for clock + ENDC + + ldy #D.Time + ldx M$Mem,pcr + clr 1,x + ldb #12 + clr >$FFD8 1 MHz + rts + +GetVal stb 2,x + decb + lda ,x read tens digit from clock + anda #$0f +GetVal1 pshs b save b + ldb #10 + mul multiply by 10 to get value + stb ,y save 10s value + puls b set up clock for ones digit + stb 2,x + decb + lda ,x read ones digit from clock + anda #$0f + adda ,y add ones + tens + sta ,y+ store clock value into time packet + rts + + ENDC + +* +* Disto 4-in-1 RTC time update +* + IFNE RTCDsto4 + IFNE MPIFlag + pshs cc Save old interrupt status and mask IRQs + orcc #IntMasks + ldb >MPI.Slct Save currently selected MPak slot on stack + pshs b + andb #$F0 + orb >SlotSlct,pcr Select MPak slot for clock + stb >MPI.Slct + ENDC + + ldx M$Mem,pcr + ldy #D.Time Start with seconds + + ldb #11 + bsr GetVal Get Year + bsr GetVal Get Month + bsr GetVal Get Day + lda #3 Mask tens digit of hour to remove AM/PM bit + bsr GetVal1 Get Hour + bsr GetVal Get Minute + bsr GetVal Get Second + + IFNE MPIFlag + puls b Restore saved "currently" selected MPak slot + stb >MPI.Slct + puls cc,pc Restore previous IRQ status + ELSE + rts No MPI, don't need to mess with slot, CC + ENDC + +GetVal lda #$0f Mask to apply to tens digit +GetVal1 stb 1,x + decb + anda ,x read ones digit from clock + pshs b save b + ldb #10 + mul multiply by 10 to get value + stb ,y Add to ones digit + puls b + stb 1,x + decb + lda ,x read tens digit from clock and mask it + anda #$0f + adda ,y + sta ,y+ + rts + + ENDC + + +* +* Update time from DriveWire +* + IFNE RTCDriveWire + + lbra DoDW + + use bbwrite.asm + +DoDW pshs y,x,cc + lda #'# Time packet + orcc #IntMasks Disable interrupts + lbsr SerWrite + bsr SerRead Read year byte + bcs UpdLeave + sta MPI.Slct Select slot + pshs b + andb #$F0 + orb SlotSlct,pcr + stb >MPI.Slct + ENDC + + lbsr SendMsg Initialize clock + ldx #D.Sec + ldb #8 Tfr 8 bytes + +tfrloop jsr ,y Tfr 1 byte + + bitb #$03 + beq skipstuf Skip over day-of-week, etc. + leax -1,x +skipstuf decb + bne tfrloop + + IFNE MPIFlag + puls b + stb >MPI.Slct restore MPAK slot + ENDC + + puls u,y,cc,pc + +ClkMsg fcb $C5,$3A,$A3,$5C,$C5,$3A,$A3,$5C +* Enable clock with message $C53AA35CC53AA35C +SendMsg lda RTC.Read,u Send Initialization message to clock + leax MPI.Slct Get MPI slot + ldb <$90 Get GIME shadow of $FF90 + pshs b,a + anda #$F0 + ora >SlotSlct,pcr Get new slot to select + anda #$03 *** TEST *** + sta >MPI.Slct And select it + andb #$FC + stb >$FF90 ROM mapping = 16k internal, 16k external + ldb >$FFA2 Read GIME for $4000-$5fff + pshs b + lda #$3E + sta >$FFA2 Put block $3E at $4000-$5fff + clr >$FFDE Map RAM/ROM, to map in external ROM + lbsr SendMsg Initialize clock + ldx #D.Sec Start with seconds + lda #$08 + sta ,-s Set up loop counter = 8 +L021E ldb #$08 +L0220 lda >RTC.Read+RTC.Base Read one bit + lsra + ror ,x Put bit into time + decb End of bit loop + bne L0220 + lda ,s Check loop counter + cmpa #$08 + beq L023D Fill "seconds" twice (ignore 1st value) + cmpa #$04 + bne L0239 + ldb ,x Save 4th value read at $34 (day of week?) + stb $0A,x + bra L023D And overwrite "day" with day +L0239 leax -$01,x Go to next time to read + bsr BCD2Dec Convert 1,x from BCD to decimal +L023D dec ,s + bne L021E End of loop for reading time + leas $01,s Done with loop counter + clr >$FFDF Map all RAM + puls b + stb >$FFA2 Put back original memory block + puls b,a + sta >MPI.Slct + stb >$FF90 Restore original ROM mapping + puls cc,pc Re-enable interrupts + +* Convert BCD to a normal number + +BCD2Dec lda $01,x + clrb +B2DLoop cmpa #$10 + bcs B2DDone + suba #$10 + addb #$0A + bra B2DLoop +B2DDone pshs a + addb ,s+ + stb $01,x + rts + +ClkMsg fcb $C5,$3A,$A3,$5C,$C5,$3A,$A3,$5C + +* Send above "string" to smartwatch, one bit at a time + +SendMsg leax RTC.Read+RTC.Base Tell clock we're going to start??? + lda #$08 + sta ,-s Store counter = 8 +L006B ldb #$08 Start of outer loop, 8 bytes to send + lda ,x+ Get byte to send +L006F lsra Start of inner loop, 8 bits to send + bcs L0077 + tst >RTC.Zero+RTC.Base Send a "zero" bit + bra L007A +L0077 tst >RTC.One+RTC.Base Send a "one" bit +L007A decb + bne L006F End of inner loop + dec ,s End of outer loop + bne L006B + puls pc,a + + ENDC + +* +* Update time from Harris RTC +* + IFNE RTCHarrs + pshs cc + orcc #IntMasks Disable interrupts + + ldu M$Mem,pcr Get base address + ldy #D.Time Pointer to time in system map + + lda #%00001100 Init command register (Normal,Int. Disabled, + sta $11,u Run,24-hour mode, 32kHz) + + lda ,u Read base address to set-up clock regs for read + lda 6,u Get year + sta ,y+ + lda 4,u Get month + sta ,y+ + lda 5,u Get day + sta ,y+ + lda 1,u Get hour + sta ,y+ + lda 2,u Get minute + sta ,y+ + lda 3,u Get second + sta ,y+ + + puls cc,pc Re-enable interrupts + ENDC +* +* +* Software time update +* +* + + IFNE RTCSoft + lda MPI.Slct Save currently selected MPak slot + pshs b + andb #$F0 + orb >SlotSlct,pcr Get slot to select + stb >MPI.Slct Select MPak slot for clock + ENDC + + ldy #D.Time+6 + ldx M$Mem,pcr + clrb + bsr SetVal Set Second + bsr SetVal Set Minute + bsr SetVal Set Hour + bsr SetVal Set Day + bsr SetVal Set Month + bsr SetVal Set Year + + IFNE MPIFlag + puls b Restore old MPAK slot + stb >MPI.Slct + ENDC + + puls cc + clrb No error + rts + +SetVal clr ,-s Create variable for tens digit + lda ,-y Get current value +DvLoop suba #10 Get Tens digit on stack, ones digit in A + bcs DvDone + inc ,s + bra DvLoop +DvDone adda #10 + stb 1,x Set Clock address + incb + sta ,x Store ones digit + stb 1,x + incb + puls a + sta ,x Store tens digit + rts + ENDC + +* +* Set B&B RTC from Time variables +* + IFNE RTCBB+RTCTc3 + pshs u,y,cc + leay SendBCD,pcr Send bytes of clock + lbra TfrTime + ENDC + +* +* Set Harris 1770 RTC from Time variables +* + IFNE RTCHarrs + pshs cc + orcc #IntMasks Disable interrupts + + ldu M$Mem,pcr Get base address + ldy #D.Time Pointer to time in system map + + lda #%00000100 Init command register (Normal,Int. Disabled, + sta $11,u STOP clock,24-hour mode, 32kHz) + + lda ,y+ Get year + sta 6,u + lda ,y+ Get month + sta 4,u + lda ,y+ Get day + sta 5,u + lda ,y+ Get hour + sta 1,u + lda ,y+ Get minute + sta 2,u + lda ,y Get second + sta 3,u + + lda #%00001100 Init command register (Normal,Int. Disabled, + sta $11,u START clock,24-hour mode, 32kHz) + + puls cc,pc Re-enable interrupts + ENDC + + +* +* RTC-specific initializations here +* +Init equ * + IFNE RTCDsto4 +* Disto 4-N-1 RTC specific initialization + ldx M$Mem,pcr + ldd #$010F Set mode for RTC chip + stb 1,x + sta ,x + ldd #$0504 + sta ,x + stb ,x + ENDC + + IFNE RTCElim + IFGT Level-1 +* Eliminator will install specific system calls + leay NewSvc,pcr insert syscalls + os9 F$SSvc + ENDC + ENDC + + rts + + emod +len equ * + end diff -r d39be8bc97bc -r 7fdef42e19a0 level1/modules/makefile --- a/level1/modules/makefile Thu Sep 04 18:31:20 2003 +0000 +++ b/level1/modules/makefile Thu Sep 04 18:31:45 2003 +0000 @@ -2,6 +2,15 @@ include ../../Makefile.rules +CLOCKELIM = -aRTCElim=1 -aRTCDsto2=0 -aRTCDsto4=0 -aRTCBB=0 -aRTCSmart=0 -aRTCHarrs=0 -aRTCTc3=0 -aRTCSoft=0 -aMPIFlag=0 +CLOCKDISTO2 = -aRTCElim=0 -aRTCDsto2=1 -aRTCDsto4=0 -aRTCBB=0 -aRTCSmart=0 -aRTCHarrs=0 -aRTCTc3=0 -aRTCSoft=0 -aMPIFlag=0 +CLOCKDISTO4 = -aRTCElim=0 -aRTCDsto2=0 -aRTCDsto4=1 -aRTCBB=0 -aRTCSmart=0 -aRTCHarrs=0 -aRTCTc3=0 -aRTCSoft=0 -aMPIFlag=0 +CLOCKBNB = -aRTCElim=0 -aRTCDsto2=0 -aRTCDsto4=0 -aRTCBB=1 -aRTCSmart=0 -aRTCHarrs=0 -aRTCTc3=0 -aRTCSoft=0 -aMPIFlag=0 +CLOCKSMART = -aRTCElim=0 -aRTCDsto2=0 -aRTCDsto4=0 -aRTCBB=0 -aRTCSmart=1 -aRTCHarrs=0 -aRTCTc3=0 -aRTCSoft=0 -aMPIFlag=1 +CLOCKHARRIS = -aRTCElim=0 -aRTCDsto2=0 -aRTCDsto4=0 -aRTCBB=0 -aRTCSmart=0 -aRTCHarrs=1 -aRTCTc3=0 -aRTCSoft=0 -aMPIFlag=0 +CLOCKTC3 = -aRTCElim=0 -aRTCDsto2=0 -aRTCDsto4=0 -aRTCBB=0 -aRTCSmart=0 -aRTCHarrs=0 -aRTCTc3=1 -aRTCSoft=0 -aMPIFlag=0 +CLOCKSOFT = -aRTCElim=0 -aRTCDsto2=0 -aRTCDsto4=0 -aRTCBB=0 -aRTCSmart=0 -aRTCHarrs=0 -aRTCTc3=0 -aRTCSoft=1 -aMPIFlag=0 + DEPENDS = ./Makefile TPB = $(3RDPARTY)/booters @@ -10,9 +19,9 @@ BOOTTRACK = rel $(BOOTERS) KERNEL = os9 os9p2 SYSMODS = ioman init sysgo_dd sysgo_h0 -CLOCKS = clock_elim clock_disto2 clock_disto4 clock_bnb \ - clock_smart clock_harris clock_tc3 clock_soft \ - clock_soft_50hz +CLOCKS = clock_60hz clock_50hz \ + clock2_elim clock2_disto2 clock2_disto4 clock2_bnb \ + clock2_smart clock2_harris clock2_tc3 clock2_soft RBF = rbf.mn \ ccdisk.dr cchdisk.dr \ @@ -51,6 +60,38 @@ boot_1773_30ms: boot_1773.asm $(AS) $< $(ASOUT)$@ $(AFLAGS) -aDNum=0 -aSTEP=3 +# Clocks +clock_60hz: clock.asm + $(AS) $(AFLAGS) $(ASOUT)$@ $< -aPwrLnFrq=60 + +clock_50hz: clock.asm + $(AS) $(AFLAGS) $(ASOUT)$@ $< -aPwrLnFrq=50 + +clock2_elim: clock2.asm + $(AS) $(AFLAGS) $(ASOUT)$@ $< $(CLOCKELIM) + +clock2_disto2: clock2.asm + $(AS) $(AFLAGS) $(ASOUT)$@ $< $(CLOCKDISTO2) + +clock2_disto4: clock2.asm + $(AS) $(AFLAGS) $(ASOUT)$@ $< $(CLOCKDISTO4) + +clock2_bnb: clock2.asm + $(AS) $(AFLAGS) $(ASOUT)$@ $< $(CLOCKBNB) + +clock2_smart: clock2.asm + $(AS) $(AFLAGS) $(ASOUT)$@ $< $(CLOCKSMART) + +clock2_harris: clock2.asm + $(AS) $(AFLAGS) $(ASOUT)$@ $< $(CLOCKHARRIS) + +clock2_tc3: clock2.asm + $(AS) $(AFLAGS) $(ASOUT)$@ $< $(CLOCKTC3) + +clock2_soft: clock2.asm + $(AS) $(AFLAGS) $(ASOUT)$@ $< $(CLOCKSOFT) + + # Floppy descriptors SSDD35 = -aCyls=35 -aSides=1 -aSectTrk=18 -aSectTrk0=18 \ -aInterlv=3 -aSAS=8 -aDensity=1