# HG changeset patch
# User Boisy Pitre <boisy.pitre@nuance.com>
# Date 1358903928 21600
# Node ID 8b2df903334ceadb5c5dfd654fa17e82ef214ed5
# Parent  863cf7feafa6276a047017810a661b98806a39ad
Merged in dwread/dwwrite Arduino changes

diff -r 863cf7feafa6 -r 8b2df903334c level1/modules/dwread.asm
--- a/level1/modules/dwread.asm	Fri Jan 18 21:52:41 2013 -0600
+++ b/level1/modules/dwread.asm	Tue Jan 22 19:18:48 2013 -0600
@@ -17,10 +17,60 @@
 *    U is preserved.  All accumulators are clobbered
 *
 
+          IFNE ARDUINO
+* Note: this is an optimistic routine. It presumes that the server will always be there, and
+* has NO timeout fallback. It is also very short and quick.
+DWRead    clra                          ; clear Carry (no framing error)
+          pshs   u,x,cc              ; preserve registers
+          leau   ,x
+          ldx    #$0000
+loop@     tst    $FF51                  ; check for CA1 bit (1=Arduino has byte ready)
+          bpl    loop@                  ; loop if not set
+          ldb    $FF50                  ; clear CA1 bit in status register
+          stb    ,u+                    ; save off acquired byte
+          abx                           ; update checksum
+          leay   ,-y
+          bne    loop@
 
+          leay      ,x                  ; return checksum in Y
+          puls      cc,x,u,pc        ; restore registers and return
+
+          ELSE
+
+          IFNE JMCPBCK
+* NOTE: There is no timeout currently on here...
+DWRead    clra                          ; clear Carry (no framing error)
+          deca                          ; clear Z flag, A = timeout msb ($ff)
+          tfr       cc,b
+          pshs      u,x,dp,b,a          ; preserve registers, push timeout msb
+          leau   ,x
+          ldx    #$0000
+          orcc   #IntMasks
+loop@     ldb    $FF4C
+          bitb   #$02
+          beq    loop@
+          ldb    $FF44
+          stb    ,u+
+          abx
+          leay   ,-y
+          bne    loop@
+
+          tfr    x,y
+          ldb    #0
+          lda    #3
+          leas      1,s                 ; remove timeout msb from stack
+          inca                          ; A = status to be returned in C and Z
+          ora       ,s                  ; place status information into the..
+          sta       ,s                  ; ..C and Z bits of the preserved CC
+          leay      ,x                  ; return checksum in Y
+          puls      cc,dp,x,u,pc        ; restore registers and return
+          ELSE
           IFNE BECKER
 * NOTE: There is no timeout currently on here...
-DWRead    pshs   cc,d,x,u
+DWRead    clra                          ; clear Carry (no framing error)
+          deca                          ; clear Z flag, A = timeout msb ($ff)
+          tfr       cc,b
+          pshs      u,x,dp,b,a          ; preserve registers, push timeout msb
           leau   ,x
           ldx    #$0000
           orcc   #IntMasks
@@ -30,16 +80,22 @@
           ldb    $FF42
           stb    ,u+
           abx
-          leay   -1,y
+          leay   ,-y
           bne    loop@
 
           tfr    x,y
-          puls   cc
-          andcc  #^Carry
-          orcc   #Zero
-          puls   d,x,u,pc
+          ldb    #0
+          lda    #3
+          leas      1,s                 ; remove timeout msb from stack
+          inca                          ; A = status to be returned in C and Z
+          ora       ,s                  ; place status information into the..
+          sta       ,s                  ; ..C and Z bits of the preserved CC
+          leay      ,x                  ; return checksum in Y
+          puls      cc,dp,x,u,pc        ; restore registers and return
+          ENDC
+          ENDC
 
-          ELSE
+          IFEQ BECKER+JMCPBCK+ARDUINO
           IFNE BAUD38400
 *******************************************************
 * 38400 bps using 6809 code and timimg
@@ -106,70 +162,7 @@
 
 
           ELSE
-          IFNE H6309
-*******************************************************
-* 57600 (115200) bps using 6309 native mode
-*******************************************************
-
-DWRead    clrb                          ; clear Carry (no framing error)
-          decb                          ; clear Z flag, B = $FF
-          pshs      u,x,dp,cc           ; preserve registers
-          orcc      #$50                ; mask interrupts
-*         ldmd      #1                  ; requires 6309 native mode
-          tfr       b,dp                ; set direct page to $FFxx
-          setdp     $ff
-          leay      -1,y                ; adjust request count
-          leau      ,x                  ; U = storage ptr
-          tfr       0,x                 ; initialize checksum
-          lda       #$01                ; A = serial in mask
-          bra       rx0030              ; go wait for start bit
-
-* Read a byte
-rxByte    sexw                          ; 4 cycle delay
-          ldw       #$006a              ; shift counter and timing flags
-          clra                          ; clear carry so next will branch
-rx0010    bcc       rx0020              ; branch if even bit number (15 cycles)
-          nop                           ; extra (16th) cycle
-rx0020    lda       <BBIN               ; read bit
-          lsra                          ; move bit into carry
-          rorb                          ; rotate bit into byte accumulator
-          lda       #0                  ; prep A for 8th data bit
-          lsrw                          ; bump shift count, timing bit to carry
-          bne       rx0010              ; loop until 7th data bit has been read
-          incw                          ; W = 1 for subtraction from Y
-          inca                          ; A = 1 for reading bit 7
-          anda      <BBIN               ; read bit 7
-          lsra                          ; move bit 7 into carry, A = 0
-          rorb                          ; byte is now complete
-          stb       ,u+                 ; store received byte to memory
-          abx                           ; update checksum
-          subr      w,y                 ; decrement request count
-          inca                          ; A = 1 for reading stop bit
-          anda      <BBIN               ; read stop bit
-          bls       rxExit              ; exit if completed or framing error
-
-* Wait for a start bit or timeout
-rx0030    clrw                          ; initialize timeout counter
-rx0040    bita      <BBIN               ; check for start bit
-          beq       rxByte              ; branch if start bit detected
-          addw      #1                  ; bump timeout counter
-          bita      <BBIN
-          beq       rxByte
-          bcc       rx0040              ; loop until timeout rolls over
-          lda       #$03                ; setup to return TIMEOUT status
-
-* Clean up, set status and return
-rxExit    beq       rx0050              ; branch if framing error
-          eora      #$02                ; toggle SUCCESS flag
-rx0050    inca                          ; A = status to be returned in C and Z
-          ora       ,s                  ; place status information into the..
-          sta       ,s                  ; ..C and Z bits of the preserved CC
-          leay      ,x                  ; return checksum in Y
-          puls      cc,dp,x,u,pc        ; restore registers and return
-          setdp     $00
-
-
-          ELSE
+          IFEQ H6309
 *******************************************************
 * 57600 (115200) bps using 6809 code and timimg
 *******************************************************
@@ -260,6 +253,70 @@
           puls      cc,dp,x,u,pc        ; restore registers and return
           setdp     $00
 
+
+          ELSE
+*******************************************************
+* 57600 (115200) bps using 6309 native mode
+*******************************************************
+
+DWRead    clrb                          ; clear Carry (no framing error)
+          decb                          ; clear Z flag, B = $FF
+          pshs      u,x,dp,cc           ; preserve registers
+          orcc      #$50                ; mask interrupts
+*         ldmd      #1                  ; requires 6309 native mode
+          tfr       b,dp                ; set direct page to $FFxx
+          setdp     $ff
+          leay      -1,y                ; adjust request count
+          leau      ,x                  ; U = storage ptr
+          tfr       0,x                 ; initialize checksum
+          lda       #$01                ; A = serial in mask
+          bra       rx0030              ; go wait for start bit
+
+* Read a byte
+rxByte    sexw                          ; 4 cycle delay
+          ldw       #$006a              ; shift counter and timing flags
+          clra                          ; clear carry so next will branch
+rx0010    bcc       rx0020              ; branch if even bit number (15 cycles)
+          nop                           ; extra (16th) cycle
+rx0020    lda       <BBIN               ; read bit
+          lsra                          ; move bit into carry
+          rorb                          ; rotate bit into byte accumulator
+          lda       #0                  ; prep A for 8th data bit
+          lsrw                          ; bump shift count, timing bit to carry
+          bne       rx0010              ; loop until 7th data bit has been read
+          incw                          ; W = 1 for subtraction from Y
+          inca                          ; A = 1 for reading bit 7
+          anda      <BBIN               ; read bit 7
+          lsra                          ; move bit 7 into carry, A = 0
+          rorb                          ; byte is now complete
+          stb       ,u+                 ; store received byte to memory
+          abx                           ; update checksum
+          subr      w,y                 ; decrement request count
+          inca                          ; A = 1 for reading stop bit
+          anda      <BBIN               ; read stop bit
+          bls       rxExit              ; exit if completed or framing error
+
+* Wait for a start bit or timeout
+rx0030    clrw                          ; initialize timeout counter
+rx0040    bita      <BBIN               ; check for start bit
+          beq       rxByte              ; branch if start bit detected
+          addw      #1                  ; bump timeout counter
+          bita      <BBIN
+          beq       rxByte
+          bcc       rx0040              ; loop until timeout rolls over
+          lda       #$03                ; setup to return TIMEOUT status
+
+* Clean up, set status and return
+rxExit    beq       rx0050              ; branch if framing error
+          eora      #$02                ; toggle SUCCESS flag
+rx0050    inca                          ; A = status to be returned in C and Z
+          ora       ,s                  ; place status information into the..
+          sta       ,s                  ; ..C and Z bits of the preserved CC
+          leay      ,x                  ; return checksum in Y
+          puls      cc,dp,x,u,pc        ; restore registers and return
+          setdp     $00
+
           ENDC
           ENDC
           ENDC
+          ENDC
diff -r 863cf7feafa6 -r 8b2df903334c level1/modules/dwwrite.asm
--- a/level1/modules/dwwrite.asm	Fri Jan 18 21:52:41 2013 -0600
+++ b/level1/modules/dwwrite.asm	Tue Jan 22 19:18:48 2013 -0600
@@ -16,6 +16,33 @@
 *
 
 
+          IFNE ARDUINO
+DWWrite   pshs      a                  ; preserve registers
+txByte
+          lda       ,x+                ; get byte from buffer
+          sta       $FF52              ; put it to PIA
+loop@     tst       $FF53              ; check status register
+          bpl       loop@              ; until CB1 is set by Arduino, continue looping
+          tst       $FF52              ; clear CB1 in status register
+          leay      -1,y                ; decrement byte counter
+          bne       txByte              ; loop if more to send
+
+          puls      a,pc                ; restore registers and return
+
+          ELSE
+
+          IFNE JMCPBCK
+DWWrite   pshs      d,cc              ; preserve registers
+          orcc      #$50                ; mask interrupts
+txByte
+          lda       ,x+
+          sta       $FF44
+          leay      -1,y                ; decrement byte counter
+          bne       txByte              ; loop if more to send
+
+          puls      cc,d,pc           ; restore registers and return
+
+          ELSE
           IFNE BECKER
 DWWrite   pshs      d,cc              ; preserve registers
           orcc      #$50                ; mask interrupts
@@ -32,82 +59,11 @@
           bne       txByte              ; loop if more to send
 
           puls      cc,d,pc           ; restore registers and return
-
-
-          ELSE
-          IFNE BAUD38400
-*******************************************************
-* 38400 bps using 6809 code and timimg
-*******************************************************
-
-DWWrite   pshs      u,d,cc              ; preserve registers
-          orcc      #$50                ; mask interrupts
-          ldu       #BBOUT              ; point U to bit banger out register
-          lda       3,u                 ; read PIA 1-B control register
-          anda      #$f7                ; clear sound enable bit
-          sta       3,u                 ; disable sound output
-          fcb       $8c                 ; skip next instruction
-
-txByte    stb       ,--u                ; send stop bit
-          leau      ,u+
-          lda       #8                  ; counter for start bit and 7 data bits
-          ldb       ,x+                 ; get a byte to transmit
-          lslb                          ; left rotate the byte two positions..
-          rolb                          ; ..placing a zero (start bit) in bit 1
-tx0010    stb       ,u++                ; send bit
-          tst       ,--u
-          rorb                          ; move next bit into position
-          deca                          ; decrement loop counter
-          bne       tx0010              ; loop until 7th data bit has been sent
-          leau      ,u
-          stb       ,u                  ; send bit 7
-          lda       ,u++
-          ldb       #$02                ; value for stop bit (MARK)
-          leay      -1,y                ; decrement byte counter
-          bne       txByte              ; loop if more to send
-
-          stb       ,--u                ; leave bit banger output at MARK
-          puls      cc,d,u,pc           ; restore registers and return
-          setdp     $00
+          ENDC
+          ENDC
 
-
-          ELSE
-          IFNE H6309
-*******************************************************
-* 57600 (115200) bps using 6309 native mode
-*******************************************************
-
-DWWrite   pshs      u,d,cc              ; preserve registers
-          orcc      #$50                ; mask interrupts
-*         ldmd      #1                  ; requires 6309 native mode
-          ldu       #BBOUT+1            ; point U to bit banger out register +1
-          aim       #$f7,2,u            ; disable sound output
-          lda       #8                  ; counter for start bit and 7 data bits
-          fcb       $8c                 ; skip next instruction
-
-txByte    stb       -1,u                ; send stop bit
-tx0010    ldb       ,x+                 ; get a byte to transmit
-          lslb                          ; left rotate the byte two positions..
-          rolb                          ; ..placing a zero (start bit) in bit 1
-          bra       tx0030
-
-tx0020    bita      #1                  ; even or odd bit number ?
-          beq       tx0040              ; branch if even (15 cycles)
-tx0030    nop                           ; extra (16th) cycle
-tx0040    stb       -1,u                ; send bit
-          rorb                          ; move next bit into position
-          deca                          ; decrement loop counter
-          bne       tx0020              ; loop until 7th data bit has been sent
-          leau      ,u+
-          stb       -1,u                ; send bit 7
-          ldd       #$0802              ; A = loop counter, B = MARK value
-          leay      -1,y                ; decrement byte counter
-          bne       txByte              ; loop if more to send
-
-          stb       -1,u                ; final stop bit
-          puls      cc,d,u,pc           ; restore registers and return
-
-          ELSE
+          IFEQ BECKER+JMCPBCK+ARDUINO
+          IFEQ BAUD38400+H6309
 *******************************************************
 * 57600 (115200) bps using 6809 code and timimg
 *******************************************************
@@ -145,9 +101,80 @@
           stb       <BBOUT              ; leave bit banger output at MARK
           puls      cc,d,dp,pc          ; restore registers and return
           setdp     $00
+		ELSE
+
+          IFNE BAUD38400
+*******************************************************
+* 38400 bps using 6809 code and timimg
+*******************************************************
+
+DWWrite   pshs      u,d,cc              ; preserve registers
+          orcc      #$50                ; mask interrupts
+          ldu       #BBOUT              ; point U to bit banger out register
+          lda       3,u                 ; read PIA 1-B control register
+          anda      #$f7                ; clear sound enable bit
+          sta       3,u                 ; disable sound output
+          fcb       $8c                 ; skip next instruction
+
+txByte    stb       ,--u                ; send stop bit
+          leau      ,u+
+          lda       #8                  ; counter for start bit and 7 data bits
+          ldb       ,x+                 ; get a byte to transmit
+          lslb                          ; left rotate the byte two positions..
+          rolb                          ; ..placing a zero (start bit) in bit 1
+tx0010    stb       ,u++                ; send bit
+          tst       ,--u
+          rorb                          ; move next bit into position
+          deca                          ; decrement loop counter
+          bne       tx0010              ; loop until 7th data bit has been sent
+          leau      ,u
+          stb       ,u                  ; send bit 7
+          lda       ,u++
+          ldb       #$02                ; value for stop bit (MARK)
+          leay      -1,y                ; decrement byte counter
+          bne       txByte              ; loop if more to send
+
+          stb       ,--u                ; leave bit banger output at MARK
+          puls      cc,d,u,pc           ; restore registers and return
+
+
+          ELSE
+*******************************************************
+* 57600 (115200) bps using 6309 native mode
+*******************************************************
+
+DWWrite   pshs      u,d,cc              ; preserve registers
+          orcc      #$50                ; mask interrupts
+*         ldmd      #1                  ; requires 6309 native mode
+          ldu       #BBOUT+1            ; point U to bit banger out register +1
+          aim       #$f7,2,u            ; disable sound output
+          lda       #8                  ; counter for start bit and 7 data bits
+          fcb       $8c                 ; skip next instruction
+
+txByte    stb       -1,u                ; send stop bit
+tx0010    ldb       ,x+                 ; get a byte to transmit
+          lslb                          ; left rotate the byte two positions..
+          rolb                          ; ..placing a zero (start bit) in bit 1
+          bra       tx0030
+
+tx0020    bita      #1                  ; even or odd bit number ?
+          beq       tx0040              ; branch if even (15 cycles)
+tx0030    nop                           ; extra (16th) cycle
+tx0040    stb       -1,u                ; send bit
+          rorb                          ; move next bit into position
+          deca                          ; decrement loop counter
+          bne       tx0020              ; loop until 7th data bit has been sent
+          leau      ,u+
+          stb       -1,u                ; send bit 7
+          ldd       #$0802              ; A = loop counter, B = MARK value
+          leay      -1,y                ; decrement byte counter
+          bne       txByte              ; loop if more to send
+
+          stb       -1,u                ; final stop bit
+          puls      cc,d,u,pc           ; restore registers and return
 
 
           ENDC
           ENDC
           ENDC
-
+          ENDC