# HG changeset patch
# User drencor-xeen
# Date 1357492342 21600
# Node ID d1976224b314a80fba69b661cabc04bb8f1682cd
# Parent  48afe2b5de06abc19ec4bad0c4fd045c7db0d456
Found duplicated code and IFNE H6309-1 statements in dwwrite.asm.  Verified it was duplicated code.  Must have been accidently copied at some point.  Removed second copy of this IFNE H6309-1.

Changed H6309-1 to H6309 and moved the real H6309 code into this routine and moved the standard 6809 57600bps code to the last "else" section. This was done to dwread.asm, dwwrite.asm, dw4write.asm, and dw4read.asm.

Test compiled and everything still seems to compile as it should.

diff -r 48afe2b5de06 -r d1976224b314 ChangeLog
--- a/ChangeLog	Sat Jan 05 22:56:05 2013 -0600
+++ b/ChangeLog	Sun Jan 06 11:12:22 2013 -0600
@@ -1,6 +1,24 @@
 NitrOS-9 V3.2.9:
 
 ----------------------------------------------------------
+2013/01/06 David Ladd
+M ChangeLog
+M level1/modules/dwread.asm
+M level1/modules/dwwrite.asm
+M level1/modules/dw4read.asm
+M level1/modules/dw4write.asm
+
+Robert Gault found a problem related to the H6309-1 not always
+functioning as expected.  Changed dwread.asm, dwwrite.asm, dw4read.asm
+dw4write.asm to reflect these needed changes and movement of code to
+correct locations.
+
+In examining the dwwrite.asm source file found two sections of H6309-1 and
+code that were the same.  This might have been root problem of the
+compiling problems.  Verified both sections of code were identical before
+removing second copy.
+
+----------------------------------------------------------
 2013/01/05 David Ladd
 M ChangeLog
 M level1/coco/makefile
diff -r 48afe2b5de06 -r d1976224b314 level1/modules/dw4read.asm
--- a/level1/modules/dw4read.asm	Sat Jan 05 22:56:05 2013 -0600
+++ b/level1/modules/dw4read.asm	Sun Jan 06 11:12:22 2013 -0600
@@ -1,4 +1,4 @@
-	IFEQ	H6309-1
+	IFNE	H6309
 
 *******************************************************
 *
diff -r 48afe2b5de06 -r d1976224b314 level1/modules/dw4write.asm
--- a/level1/modules/dw4write.asm	Sat Jan 05 22:56:05 2013 -0600
+++ b/level1/modules/dw4write.asm	Sun Jan 06 11:12:22 2013 -0600
@@ -1,4 +1,4 @@
-	IFEQ	H6309-1
+	IFNE	H6309
 
 *******************************************************
 *
diff -r 48afe2b5de06 -r d1976224b314 level1/modules/dwread.asm
--- a/level1/modules/dwread.asm	Sat Jan 05 22:56:05 2013 -0600
+++ b/level1/modules/dwread.asm	Sun Jan 06 11:12:22 2013 -0600
@@ -21,7 +21,7 @@
           IFNE BECKER
 * NOTE: There is no timeout currently on here...
 DWRead    pshs   cc,d,x,u
-          leau   ,x 
+          leau   ,x
           ldx    #$0000
           orcc   #IntMasks
 loop@     ldb    $FF41
@@ -106,7 +106,70 @@
 
 
           ELSE
-          IFNE H6309-1
+          IFNE H6309
+*******************************************************
+* 57600 (115200) bps using 6309 native mode
+*******************************************************
+
+DWRead    clrb                          ; clear Carry (no framing error)
+          decb                          ; clear Z flag, B = $FF
+          pshs      u,x,dp,cc           ; preserve registers
+          orcc      #$50                ; mask interrupts
+*         ldmd      #1                  ; requires 6309 native mode
+          tfr       b,dp                ; set direct page to $FFxx
+          setdp     $ff
+          leay      -1,y                ; adjust request count
+          leau      ,x                  ; U = storage ptr
+          tfr       0,x                 ; initialize checksum
+          lda       #$01                ; A = serial in mask
+          bra       rx0030              ; go wait for start bit
+
+* Read a byte
+rxByte    sexw                          ; 4 cycle delay
+          ldw       #$006a              ; shift counter and timing flags
+          clra                          ; clear carry so next will branch
+rx0010    bcc       rx0020              ; branch if even bit number (15 cycles)
+          nop                           ; extra (16th) cycle
+rx0020    lda       <BBIN               ; read bit
+          lsra                          ; move bit into carry
+          rorb                          ; rotate bit into byte accumulator
+          lda       #0                  ; prep A for 8th data bit
+          lsrw                          ; bump shift count, timing bit to carry
+          bne       rx0010              ; loop until 7th data bit has been read
+          incw                          ; W = 1 for subtraction from Y
+          inca                          ; A = 1 for reading bit 7
+          anda      <BBIN               ; read bit 7
+          lsra                          ; move bit 7 into carry, A = 0
+          rorb                          ; byte is now complete
+          stb       ,u+                 ; store received byte to memory
+          abx                           ; update checksum
+          subr      w,y                 ; decrement request count
+          inca                          ; A = 1 for reading stop bit
+          anda      <BBIN               ; read stop bit
+          bls       rxExit              ; exit if completed or framing error
+
+* Wait for a start bit or timeout
+rx0030    clrw                          ; initialize timeout counter
+rx0040    bita      <BBIN               ; check for start bit
+          beq       rxByte              ; branch if start bit detected
+          addw      #1                  ; bump timeout counter
+          bita      <BBIN
+          beq       rxByte
+          bcc       rx0040              ; loop until timeout rolls over
+          lda       #$03                ; setup to return TIMEOUT status
+
+* Clean up, set status and return
+rxExit    beq       rx0050              ; branch if framing error
+          eora      #$02                ; toggle SUCCESS flag
+rx0050    inca                          ; A = status to be returned in C and Z
+          ora       ,s                  ; place status information into the..
+          sta       ,s                  ; ..C and Z bits of the preserved CC
+          leay      ,x                  ; return checksum in Y
+          puls      cc,dp,x,u,pc        ; restore registers and return
+          setdp     $00
+
+
+          ELSE
 *******************************************************
 * 57600 (115200) bps using 6809 code and timimg
 *******************************************************
@@ -197,69 +260,6 @@
           puls      cc,dp,x,u,pc        ; restore registers and return
           setdp     $00
 
-
-          ELSE
-*******************************************************
-* 57600 (115200) bps using 6309 native mode
-*******************************************************
-
-DWRead    clrb                          ; clear Carry (no framing error)
-          decb                          ; clear Z flag, B = $FF
-          pshs      u,x,dp,cc           ; preserve registers
-          orcc      #$50                ; mask interrupts
-*         ldmd      #1                  ; requires 6309 native mode
-          tfr       b,dp                ; set direct page to $FFxx
-          setdp     $ff
-          leay      -1,y                ; adjust request count
-          leau      ,x                  ; U = storage ptr
-          tfr       0,x                 ; initialize checksum
-          lda       #$01                ; A = serial in mask
-          bra       rx0030              ; go wait for start bit
-
-* Read a byte
-rxByte    sexw                          ; 4 cycle delay
-          ldw       #$006a              ; shift counter and timing flags
-          clra                          ; clear carry so next will branch
-rx0010    bcc       rx0020              ; branch if even bit number (15 cycles)
-          nop                           ; extra (16th) cycle
-rx0020    lda       <BBIN               ; read bit
-          lsra                          ; move bit into carry
-          rorb                          ; rotate bit into byte accumulator
-          lda       #0                  ; prep A for 8th data bit
-          lsrw                          ; bump shift count, timing bit to carry
-          bne       rx0010              ; loop until 7th data bit has been read
-          incw                          ; W = 1 for subtraction from Y
-          inca                          ; A = 1 for reading bit 7
-          anda      <BBIN               ; read bit 7
-          lsra                          ; move bit 7 into carry, A = 0
-          rorb                          ; byte is now complete
-          stb       ,u+                 ; store received byte to memory
-          abx                           ; update checksum
-          subr      w,y                 ; decrement request count
-          inca                          ; A = 1 for reading stop bit
-          anda      <BBIN               ; read stop bit
-          bls       rxExit              ; exit if completed or framing error
-
-* Wait for a start bit or timeout
-rx0030    clrw                          ; initialize timeout counter
-rx0040    bita      <BBIN               ; check for start bit
-          beq       rxByte              ; branch if start bit detected
-          addw      #1                  ; bump timeout counter
-          bita      <BBIN
-          beq       rxByte
-          bcc       rx0040              ; loop until timeout rolls over
-          lda       #$03                ; setup to return TIMEOUT status
-
-* Clean up, set status and return
-rxExit    beq       rx0050              ; branch if framing error
-          eora      #$02                ; toggle SUCCESS flag
-rx0050    inca                          ; A = status to be returned in C and Z
-          ora       ,s                  ; place status information into the..
-          sta       ,s                  ; ..C and Z bits of the preserved CC
-          leay      ,x                  ; return checksum in Y
-          puls      cc,dp,x,u,pc        ; restore registers and return
-          setdp     $00
-
           ENDC
           ENDC
           ENDC
diff -r 48afe2b5de06 -r d1976224b314 level1/modules/dwwrite.asm
--- a/level1/modules/dwwrite.asm	Sat Jan 05 22:56:05 2013 -0600
+++ b/level1/modules/dwwrite.asm	Sun Jan 06 11:12:22 2013 -0600
@@ -25,8 +25,8 @@
 ;          sta       3,u                 ; disable sound output
 ;          fcb       $8c                 ; skip next instruction
 
-txByte    
-          lda       ,x+                
+txByte
+          lda       ,x+
           sta       $FF42
           leay      -1,y                ; decrement byte counter
           bne       txByte              ; loop if more to send
@@ -35,46 +35,6 @@
 
 
           ELSE
-          IFNE H6309-1
-*******************************************************
-* 57600 (115200) bps using 6809 code and timimg
-*******************************************************
-
-DWWrite   pshs      dp,d,cc             ; preserve registers
-          orcc      #$50                ; mask interrupts
-          ldd       #$04ff              ; A = loop counter, B = $ff
-          tfr       b,dp                ; set direct page to $FFxx
-          setdp     $ff
-          ldb       <$ff23              ; read PIA 1-B control register
-          andb      #$f7                ; clear sound enable bit
-          stb       <$ff23              ; disable sound output
-          fcb       $8c                 ; skip next instruction
-
-txByte    stb       <BBOUT              ; send stop bit
-          ldb       ,x+                 ; get a byte to transmit
-          nop
-          lslb                          ; left rotate the byte two positions..
-          rolb                          ; ..placing a zero (start bit) in bit 1
-tx0020    stb       <BBOUT              ; send bit (start bit, d1, d3, d5)
-          rorb                          ; move next bit into position
-          exg       a,a
-          nop
-          stb       <BBOUT              ; send bit (d0, d2, d4, d6)
-          rorb                          ; move next bit into position
-          leau      ,u
-          deca                          ; decrement loop counter
-          bne       tx0020              ; loop until 7th data bit has been sent
-
-          stb       <BBOUT              ; send bit 7
-          ldd       #$0402              ; A = loop counter, B = MARK value
-          leay      ,-y                 ; decrement byte counter
-          bne       txByte              ; loop if more to send
-
-          stb       <BBOUT              ; leave bit banger output at MARK
-          puls      cc,d,dp,pc          ; restore registers and return
-          setdp     $00
-
-          ELSE
           IFNE BAUD38400
 *******************************************************
 * 38400 bps using 6809 code and timimg
@@ -101,17 +61,53 @@
           bne       tx0010              ; loop until 7th data bit has been sent
           leau      ,u
           stb       ,u                  ; send bit 7
-          lda       ,u++                
+          lda       ,u++
           ldb       #$02                ; value for stop bit (MARK)
           leay      -1,y                ; decrement byte counter
           bne       txByte              ; loop if more to send
 
           stb       ,--u                ; leave bit banger output at MARK
           puls      cc,d,u,pc           ; restore registers and return
+          setdp     $00
 
 
           ELSE
-          IFNE H6309-1
+          IFNE H6309
+*******************************************************
+* 57600 (115200) bps using 6309 native mode
+*******************************************************
+
+DWWrite   pshs      u,d,cc              ; preserve registers
+          orcc      #$50                ; mask interrupts
+*         ldmd      #1                  ; requires 6309 native mode
+          ldu       #BBOUT+1            ; point U to bit banger out register +1
+          aim       #$f7,2,u            ; disable sound output
+          lda       #8                  ; counter for start bit and 7 data bits
+          fcb       $8c                 ; skip next instruction
+
+txByte    stb       -1,u                ; send stop bit
+tx0010    ldb       ,x+                 ; get a byte to transmit
+          lslb                          ; left rotate the byte two positions..
+          rolb                          ; ..placing a zero (start bit) in bit 1
+          bra       tx0030
+
+tx0020    bita      #1                  ; even or odd bit number ?
+          beq       tx0040              ; branch if even (15 cycles)
+tx0030    nop                           ; extra (16th) cycle
+tx0040    stb       -1,u                ; send bit
+          rorb                          ; move next bit into position
+          deca                          ; decrement loop counter
+          bne       tx0020              ; loop until 7th data bit has been sent
+          leau      ,u+
+          stb       -1,u                ; send bit 7
+          ldd       #$0802              ; A = loop counter, B = MARK value
+          leay      -1,y                ; decrement byte counter
+          bne       txByte              ; loop if more to send
+
+          stb       -1,u                ; final stop bit
+          puls      cc,d,u,pc           ; restore registers and return
+
+          ELSE
 *******************************************************
 * 57600 (115200) bps using 6809 code and timimg
 *******************************************************
@@ -151,43 +147,7 @@
           setdp     $00
 
 
-          ELSE
-*******************************************************
-* 57600 (115200) bps using 6309 native mode
-*******************************************************
-
-DWWrite   pshs      u,d,cc              ; preserve registers
-          orcc      #$50                ; mask interrupts
-*         ldmd      #1                  ; requires 6309 native mode
-          ldu       #BBOUT+1            ; point U to bit banger out register +1
-          aim       #$f7,2,u            ; disable sound output
-          lda       #8                  ; counter for start bit and 7 data bits
-          fcb       $8c                 ; skip next instruction
-
-txByte    stb       -1,u                ; send stop bit
-tx0010    ldb       ,x+                 ; get a byte to transmit
-          lslb                          ; left rotate the byte two positions..
-          rolb                          ; ..placing a zero (start bit) in bit 1
-          bra       tx0030
-
-tx0020    bita      #1                  ; even or odd bit number ?
-          beq       tx0040              ; branch if even (15 cycles)
-tx0030    nop                           ; extra (16th) cycle
-tx0040    stb       -1,u                ; send bit
-          rorb                          ; move next bit into position
-          deca                          ; decrement loop counter
-          bne       tx0020              ; loop until 7th data bit has been sent
-          leau      ,u+
-          stb       -1,u                ; send bit 7
-          ldd       #$0802              ; A = loop counter, B = MARK value
-          leay      -1,y                ; decrement byte counter
-          bne       txByte              ; loop if more to send
-
-          stb       -1,u                ; final stop bit
-          puls      cc,d,u,pc           ; restore registers and return
-
-
           ENDC
           ENDC
           ENDC
-          ENDC
+