Mercurial > hg > Members > kono > nitros9-code
changeset 3142:0413a77a3686
Build various CoCo3FPGA boot files
Allow booting from DriveWire, CoCo3FPGA SD card, and
from ROM.
Added "RBCOCOFPGA = $(MD)/rbsuper.dr $(MD)/llcoco3fpga.dr
$(MD)/sd1_coco3fpga.dd" to the "level2/coco3/bootfiles/makefile " to
faciliate the new Coco3FPGA bootfiles.
Added "BOOTFILE_COCO3FPGA", "BOOTFILE_COCO3FPGA_SD",
"BOOTFILE_COCO3FPGA_ROM", & "BOOTFILE_COCO3FPGA_ROM_DW" to the
"level2/coco3/bootfiles/makefile " - Bootfile descriptions as needed for
specific Coco3FPGA bootfiles.
Added "bootfile_coco3fpga", "bootfile_coco3fpga_sd",
"bootfile_coco3fpga_rom", and "bootfile_coco3fpga_rom_dw" to
"level2/coco3/bootfiles/makefile" - BOOTFILES section to add the files
to the modules for making coco3fpga bootfiles in NitrOS9.
Added "bootfile_coco3fpga", "bootfile_coco3fpga_sd",
"bootfile_coco3fpga_rom", "bootfile_coco3fpga_rom_dw" and their flags to
the "level2/coco3/bootfiles/makefile " - "#Bootfiles" directives section
for making Coco3FPGA bootfiles.
| author | Bill Pierce <merlinious999@gmail.com> |
|---|---|
| date | Sat, 04 Feb 2017 18:33:01 +0100 |
| parents | 717ced83b885 |
| children | c860ff48e09c |
| files | level2/coco3/bootfiles/makefile |
| diffstat | 1 files changed, 79 insertions(+), 1 deletions(-) [+] |
line wrap: on
line diff
--- a/level2/coco3/bootfiles/makefile Sat Feb 04 11:06:28 2017 +0100 +++ b/level2/coco3/bootfiles/makefile Sat Feb 04 18:33:01 2017 +0100 @@ -53,6 +53,9 @@ $(MD)/x1.dd $(MD)/x2.dd $(MD)/x3.dd RBDWBECKER = $(MD)/rbdw.dr $(MD)/dwio_becker.sb \ $(MD)/x1.dd $(MD)/x2.dd $(MD)/x3.dd +RBCOCO3FPGA = $(MD)/rbsuper.dr $(MD)/llcoco3fpga.dr \ + $(MD)/sd1_coco3fpga.dd + SCDWV_NET = $(MD)/n_scdwv.dd $(MD)/n1_scdwv.dd $(MD)/n2_scdwv.dd \ $(MD)/n3_scdwv.dd $(MD)/n4_scdwv.dd $(MD)/n5_scdwv.dd \ $(MD)/n6_scdwv.dd $(MD)/n7_scdwv.dd $(MD)/n8_scdwv.dd \ @@ -69,6 +72,66 @@ # NitrOS-9 disk bootfile to allow booting from DriveWire server # on a DE1 or Xilinx using Gary Becker's CoCo 3 FGPA +BOOTFILE_COCO3FPGA = $(MD)/krnp2 $(MD)/ioman $(MD)/init \ + $(MD)/rbf.mn \ + $(RBDWBECKER) \ + $(MD)/ddx0.dd \ + $(RBCOCO3FPGA) \ + $(MD)/sd0_coco3fpga.dd\ + $(MD)/scf.mn \ + $(VTIO_COWIN_80) \ + $(MD)/scdwv.dr \ + $(SCDWV_NET) \ + $(SCDWV_WIN) \ + $(SCDWP) \ + $(PIPE) \ + $(CLOCK60HZDW) + +BOOTFILE_COCO3FPGA_SD = $(MD)/krnp2 $(MD)/ioman $(MD)/init \ + $(MD)/rbf.mn \ + $(RBDWBECKER) \ + $(MD)/x0.dd \ + $(RBCOCO3FPGA) \ + $(MD)/ddsd0_coco3fpga.dd\ + $(MD)/scf.mn \ + $(VTIO_COWIN_80) \ + $(MD)/scdwv.dr \ + $(SCDWV_NET) \ + $(SCDWV_WIN) \ + $(SCDWP) \ + $(PIPE) \ + $(CLOCK60HZDW) + +BOOTFILE_COCO3FPGA_ROM = $(MD)/krnp2 $(MD)/ioman $(MD)/init \ + $(MD)/rbf.mn \ + $(RBDWBECKER) \ + $(MD)/x0.dd \ + $(RBCOCO3FPGA) \ + $(MD)/ddsd0_coco3fpga.dd\ + $(MD)/scf.mn \ + $(VTIO_COWIN_80) \ + $(MD)/scdwv.dr \ + $(SCDWV_NET) \ + $(SCDWV_WIN) \ + $(SCDWP) \ + $(PIPE) \ + $(CLOCK60HZ) + +BOOTFILE_COCO3FPGA_ROM_DW = $(MD)/krnp2 $(MD)/ioman $(MD)/init \ + $(MD)/rbf.mn \ + $(RBDWBECKER) \ + $(MD)/x0.dd \ + $(RBCOCO3FPGA) \ + $(MD)/ddsd0_coco3fpga.dd\ + $(MD)/scf.mn \ + $(VTIO_COWIN_80) \ + $(MD)/scdwv.dr \ + $(SCDWV_NET) \ + $(SCDWV_WIN) \ + $(SCDWP) \ + $(PIPE) \ + $(CLOCK60HZDW) + BOOTFILE_BECKER = $(MD)/krnp2 $(MD)/ioman $(MD)/init \ $(MD)/rbf.mn \ $(RBDWBECKER) \ @@ -224,7 +287,10 @@ BOOTFILES = bootfile_40d bootfile_40d_50hz bootfile_80d \ bootfile_80d_50hz bootfile_dw bootfile_dw_headless \ bootfile_becker bootfile_arduino bootfile_becker_headless \ - bootfile_arduino_headless bootfile_cocosdc bootfile_ide + bootfile_arduino_headless bootfile_cocosdc bootfile_ide \ + bootfile_coco3fpga bootfile_coco3fpga_sd \ + bootfile_coco3fpga_rom bootfile_coco3fpga_rom_dw + KERNELS = kernel_1773 kernel_1773_50hz kernel_dw kernel_becker \ kernel_arduino kernel_cocosdc kernel_ide kernel_dide @@ -233,6 +299,18 @@ all: $(ALLOBJS) # Bootfiles +bootfile_coco3fpga: $(BOOTFILE_COCO3FPGA) $(DEPENDS) + $(MERGE) $(BOOTFILE_COCO3FPGA)>$@ + +bootfile_coco3fpga_sd: $(BOOTFILE_COCO3FPGA_SD) $(DEPENDS) + $(MERGE) $(BOOTFILE_COCO3FPGA_SD)>$@ + +bootfile_coco3fpga_rom: $(BOOTFILE_COCO3FPGA_ROM) $(DEPENDS) + $(MERGE) $(BOOTFILE_COCO3FPGA_ROM)>$@ + +bootfile_coco3fpga_rom_dw: $(BOOTFILE_COCO3FPGA_ROM_DW) $(DEPENDS) + $(MERGE) $(BOOTFILE_COCO3FPGA_ROM_DW)>$@ + bootfile_becker: $(BOOTFILE_BECKER) $(DEPENDS) $(MERGE) $(BOOTFILE_BECKER)>$@