Mercurial > hg > Members > kono > nitros9-code
changeset 2772:0a3f4d8ea6d5
Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
Moved the native 6309 code in dwread.asm and dwwrite.asm into the H6309 labeled area and changed IFEQ H6309 to IFNE H6309. Also moved the 57600bps 6809 code to the default location. This change had been done in the old dwread.asm and dwwrite.asm files to make it easier to follow. Though these two files were overwritten from the HDBDOS project dwread.asm and dwwrite.asm files. So this conversion needed to be done again so it made the source easier to follow.
| author | drencor-xeen |
|---|---|
| date | Wed, 23 Jan 2013 12:36:55 -0600 |
| parents | 8b2df903334c |
| children | 07219d5d7887 |
| files | 3rdparty/utils/view/makefile ChangeLog level1/modules/dwread.asm level1/modules/dwwrite.asm |
| diffstat | 4 files changed, 524 insertions(+), 504 deletions(-) [+] |
line wrap: on
line diff
--- a/3rdparty/utils/view/makefile Tue Jan 22 19:18:48 2013 -0600 +++ b/3rdparty/utils/view/makefile Wed Jan 23 12:36:55 2013 -0600 @@ -5,8 +5,8 @@ TARGET = view #LFLAGS += -y -l=$(HOME)/Projects/c3/lib/rmalib/alib.l -LFLAGS += $(C3BASE)/lib/root.r -RMAFLAGS += -I$(C3BASE)/lib +LFLAGS += $(NITROS9DIR)/lib/root.r +RMAFLAGS += -I$(NITROS9DIR)/lib ROFS = debug.r view.r view_arith.r view_clp.r view_cm3.r view_convert.r \ view_gfx.r view_gfx2.r view_gif.r view_gifcol.r view_gifpix.r \
--- a/ChangeLog Tue Jan 22 19:18:48 2013 -0600 +++ b/ChangeLog Wed Jan 23 12:36:55 2013 -0600 @@ -1,6 +1,25 @@ NitrOS-9 V3.2.9: ---------------------------------------------------------- +2013/01/23 David Ladd +M 3rdparty/utils/view/makefile +M ChangeLog +M level1/modules/dwread.asm +M level1/modules/dwwrite.asm + +Corrected a ENDC that was in the incorrect location in +dwread.asm and dwwrite.asm also moved the 6309 native code +into the H6309 section and changed the IFEQ H6309 to IFNE H6309 +so the code would get correctly loaded. Moved the 57600 6809 +code to the default location as it was in the old dwread.asm +and dwwrite.asm before these files got overwritten by the +dwread.asm and dwwrite.asm from HDBDOS project. + +Also did some updates to the 3rdparty/utils/view/makefile +but this file is not done yet to try to fix all the problems +with it. + +---------------------------------------------------------- 2013/01/18 David Ladd M ChangeLog M level2/coco3/cmds/makefile
--- a/level1/modules/dwread.asm Tue Jan 22 19:18:48 2013 -0600 +++ b/level1/modules/dwread.asm Wed Jan 23 12:36:55 2013 -0600 @@ -1,322 +1,323 @@ -******************************************************* -* -* DWRead -* Receive a response from the DriveWire server. -* Times out if serial port goes idle for more than 1.4 (0.7) seconds. -* Serial data format: 1-8-N-1 -* 4/12/2009 by Darren Atkinson -* -* Entry: -* X = starting address where data is to be stored -* Y = number of bytes expected -* -* Exit: -* CC = carry set on framing error, Z set if all bytes received -* X = starting address of data received -* Y = checksum -* U is preserved. All accumulators are clobbered -* - - IFNE ARDUINO -* Note: this is an optimistic routine. It presumes that the server will always be there, and -* has NO timeout fallback. It is also very short and quick. -DWRead clra ; clear Carry (no framing error) - pshs u,x,cc ; preserve registers - leau ,x - ldx #$0000 -loop@ tst $FF51 ; check for CA1 bit (1=Arduino has byte ready) - bpl loop@ ; loop if not set - ldb $FF50 ; clear CA1 bit in status register - stb ,u+ ; save off acquired byte - abx ; update checksum - leay ,-y - bne loop@ - - leay ,x ; return checksum in Y - puls cc,x,u,pc ; restore registers and return - - ELSE - - IFNE JMCPBCK -* NOTE: There is no timeout currently on here... -DWRead clra ; clear Carry (no framing error) - deca ; clear Z flag, A = timeout msb ($ff) - tfr cc,b - pshs u,x,dp,b,a ; preserve registers, push timeout msb - leau ,x - ldx #$0000 - orcc #IntMasks -loop@ ldb $FF4C - bitb #$02 - beq loop@ - ldb $FF44 - stb ,u+ - abx - leay ,-y - bne loop@ - - tfr x,y - ldb #0 - lda #3 - leas 1,s ; remove timeout msb from stack - inca ; A = status to be returned in C and Z - ora ,s ; place status information into the.. - sta ,s ; ..C and Z bits of the preserved CC - leay ,x ; return checksum in Y - puls cc,dp,x,u,pc ; restore registers and return - ELSE - IFNE BECKER -* NOTE: There is no timeout currently on here... -DWRead clra ; clear Carry (no framing error) - deca ; clear Z flag, A = timeout msb ($ff) - tfr cc,b - pshs u,x,dp,b,a ; preserve registers, push timeout msb - leau ,x - ldx #$0000 - orcc #IntMasks -loop@ ldb $FF41 - bitb #$02 - beq loop@ - ldb $FF42 - stb ,u+ - abx - leay ,-y - bne loop@ - - tfr x,y - ldb #0 - lda #3 - leas 1,s ; remove timeout msb from stack - inca ; A = status to be returned in C and Z - ora ,s ; place status information into the.. - sta ,s ; ..C and Z bits of the preserved CC - leay ,x ; return checksum in Y - puls cc,dp,x,u,pc ; restore registers and return - ENDC - ENDC - - IFEQ BECKER+JMCPBCK+ARDUINO - IFNE BAUD38400 -******************************************************* -* 38400 bps using 6809 code and timimg -******************************************************* - -DWRead clra ; clear Carry (no framing error) - deca ; clear Z flag, A = timeout msb ($ff) - tfr cc,b - pshs u,x,dp,b,a ; preserve registers, push timeout msb - orcc #$50 ; mask interrupts - tfr a,dp ; set direct page to $FFxx - setdp $ff - leau ,x ; U = storage ptr - ldx #0 ; initialize checksum - adda #2 ; A = $01 (serial in mask), set Carry - -* Wait for a start bit or timeout -rx0010 bcc rxExit ; exit if timeout expired - ldb #$ff ; init timeout lsb -rx0020 bita <BBIN ; check for start bit - beq rxByte ; branch if start bit detected - subb #1 ; decrement timeout lsb - bita <BBIN - beq rxByte - bcc rx0020 ; loop until timeout lsb rolls under - bita <BBIN - beq rxByte - addb ,s ; B = timeout msb - 1 - bita <BBIN - beq rxByte - stb ,s ; store decremented timeout msb - bita <BBIN - bne rx0010 ; loop if still no start bit - -* Read a byte -rxByte leay ,-y ; decrement request count - ldd #$ff80 ; A = timeout msb, B = shift counter - sta ,s ; reset timeout msb for next byte -rx0030 exg a,a - nop - lda <BBIN ; read data bit - lsra ; shift into carry - rorb ; rotate into byte accumulator - lda #$01 ; prep stop bit mask - bcc rx0030 ; loop until all 8 bits read - - stb ,u+ ; store received byte to memory - abx ; update checksum - ldb #$ff ; set timeout lsb for next byte - anda <BBIN ; read stop bit - beq rxExit ; exit if framing error - leay ,y ; test request count - bne rx0020 ; loop if another byte wanted - lda #$03 ; setup to return SUCCESS - -* Clean up, set status and return -rxExit leas 1,s ; remove timeout msb from stack - inca ; A = status to be returned in C and Z - ora ,s ; place status information into the.. - sta ,s ; ..C and Z bits of the preserved CC - leay ,x ; return checksum in Y - puls cc,dp,x,u,pc ; restore registers and return - setdp $00 - - - ELSE - IFEQ H6309 -******************************************************* -* 57600 (115200) bps using 6809 code and timimg -******************************************************* - -DWRead clra ; clear Carry (no framing error) - deca ; clear Z flag, A = timeout msb ($ff) - tfr cc,b - pshs u,x,dp,b,a ; preserve registers, push timeout msb - orcc #$50 ; mask interrupts - tfr a,dp ; set direct page to $FFxx - setdp $ff - leau ,x ; U = storage ptr - ldx #0 ; initialize checksum - lda #$01 ; A = serial in mask - bra rx0030 ; go wait for start bit - -* Read a byte -rxByte leau 1,u ; bump storage ptr - leay ,-y ; decrement request count - lda <BBIN ; read bit 0 - lsra ; move bit 0 into Carry - ldd #$ff20 ; A = timeout msb, B = shift counter - sta ,s ; reset timeout msb for next byte - rorb ; rotate bit 0 into byte accumulator -rx0010 lda <BBIN ; read bit (d1, d3, d5) - lsra - rorb - bita 1,s ; 5 cycle delay - bcs rx0020 ; exit loop after reading bit 5 - lda <BBIN ; read bit (d2, d4) - lsra - rorb - leau ,u - bra rx0010 - -rx0020 lda <BBIN ; read bit 6 - lsra - rorb - leay ,y ; test request count - beq rx0050 ; branch if final byte of request - lda <BBIN ; read bit 7 - lsra - rorb ; byte is now complete - stb -1,u ; store received byte to memory - abx ; update checksum - lda <BBIN ; read stop bit - anda #$01 ; mask out other bits - beq rxExit ; exit if framing error - -* Wait for a start bit or timeout -rx0030 bita <BBIN ; check for start bit - beq rxByte ; branch if start bit detected - bita <BBIN ; again - beq rxByte - ldb #$ff ; init timeout lsb -rx0040 bita <BBIN - beq rxByte - subb #1 ; decrement timeout lsb - bita <BBIN - beq rxByte - bcc rx0040 ; loop until timeout lsb rolls under - bita <BBIN - beq rxByte - addb ,s ; B = timeout msb - 1 - bita <BBIN - beq rxByte - stb ,s ; store decremented timeout msb - bita <BBIN - beq rxByte - bcs rx0030 ; loop if timeout hasn't expired - bra rxExit ; exit due to timeout - -rx0050 lda <BBIN ; read bit 7 of final byte - lsra - rorb ; byte is now complete - stb -1,u ; store received byte to memory - abx ; calculate final checksum - lda <BBIN ; read stop bit - anda #$01 ; mask out other bits - ora #$02 ; return SUCCESS if no framing error - -* Clean up, set status and return -rxExit leas 1,s ; remove timeout msb from stack - inca ; A = status to be returned in C and Z - ora ,s ; place status information into the.. - sta ,s ; ..C and Z bits of the preserved CC - leay ,x ; return checksum in Y - puls cc,dp,x,u,pc ; restore registers and return - setdp $00 - - - ELSE -******************************************************* -* 57600 (115200) bps using 6309 native mode -******************************************************* - -DWRead clrb ; clear Carry (no framing error) - decb ; clear Z flag, B = $FF - pshs u,x,dp,cc ; preserve registers - orcc #$50 ; mask interrupts -* ldmd #1 ; requires 6309 native mode - tfr b,dp ; set direct page to $FFxx - setdp $ff - leay -1,y ; adjust request count - leau ,x ; U = storage ptr - tfr 0,x ; initialize checksum - lda #$01 ; A = serial in mask - bra rx0030 ; go wait for start bit - -* Read a byte -rxByte sexw ; 4 cycle delay - ldw #$006a ; shift counter and timing flags - clra ; clear carry so next will branch -rx0010 bcc rx0020 ; branch if even bit number (15 cycles) - nop ; extra (16th) cycle -rx0020 lda <BBIN ; read bit - lsra ; move bit into carry - rorb ; rotate bit into byte accumulator - lda #0 ; prep A for 8th data bit - lsrw ; bump shift count, timing bit to carry - bne rx0010 ; loop until 7th data bit has been read - incw ; W = 1 for subtraction from Y - inca ; A = 1 for reading bit 7 - anda <BBIN ; read bit 7 - lsra ; move bit 7 into carry, A = 0 - rorb ; byte is now complete - stb ,u+ ; store received byte to memory - abx ; update checksum - subr w,y ; decrement request count - inca ; A = 1 for reading stop bit - anda <BBIN ; read stop bit - bls rxExit ; exit if completed or framing error - -* Wait for a start bit or timeout -rx0030 clrw ; initialize timeout counter -rx0040 bita <BBIN ; check for start bit - beq rxByte ; branch if start bit detected - addw #1 ; bump timeout counter - bita <BBIN - beq rxByte - bcc rx0040 ; loop until timeout rolls over - lda #$03 ; setup to return TIMEOUT status - -* Clean up, set status and return -rxExit beq rx0050 ; branch if framing error - eora #$02 ; toggle SUCCESS flag -rx0050 inca ; A = status to be returned in C and Z - ora ,s ; place status information into the.. - sta ,s ; ..C and Z bits of the preserved CC - leay ,x ; return checksum in Y - puls cc,dp,x,u,pc ; restore registers and return - setdp $00 - - ENDC - ENDC - ENDC - ENDC +******************************************************* +* +* DWRead +* Receive a response from the DriveWire server. +* Times out if serial port goes idle for more than 1.4 (0.7) seconds. +* Serial data format: 1-8-N-1 +* 4/12/2009 by Darren Atkinson +* +* Entry: +* X = starting address where data is to be stored +* Y = number of bytes expected +* +* Exit: +* CC = carry set on framing error, Z set if all bytes received +* X = starting address of data received +* Y = checksum +* U is preserved. All accumulators are clobbered +* + + IFNE ARDUINO +* Note: this is an optimistic routine. It presumes that the server will always be there, and +* has NO timeout fallback. It is also very short and quick. +DWRead clra ; clear Carry (no framing error) + pshs u,x,cc ; preserve registers + leau ,x + ldx #$0000 +loop@ tst $FF51 ; check for CA1 bit (1=Arduino has byte ready) + bpl loop@ ; loop if not set + ldb $FF50 ; clear CA1 bit in status register + stb ,u+ ; save off acquired byte + abx ; update checksum + leay ,-y + bne loop@ + + leay ,x ; return checksum in Y + puls cc,x,u,pc ; restore registers and return + + ELSE + + IFNE JMCPBCK +* NOTE: There is no timeout currently on here... +DWRead clra ; clear Carry (no framing error) + deca ; clear Z flag, A = timeout msb ($ff) + tfr cc,b + pshs u,x,dp,b,a ; preserve registers, push timeout msb + leau ,x + ldx #$0000 + orcc #IntMasks +loop@ ldb $FF4C + bitb #$02 + beq loop@ + ldb $FF44 + stb ,u+ + abx + leay ,-y + bne loop@ + + tfr x,y + ldb #0 + lda #3 + leas 1,s ; remove timeout msb from stack + inca ; A = status to be returned in C and Z + ora ,s ; place status information into the.. + sta ,s ; ..C and Z bits of the preserved CC + leay ,x ; return checksum in Y + puls cc,dp,x,u,pc ; restore registers and return + ELSE + IFNE BECKER +* NOTE: There is no timeout currently on here... +DWRead clra ; clear Carry (no framing error) + deca ; clear Z flag, A = timeout msb ($ff) + tfr cc,b + pshs u,x,dp,b,a ; preserve registers, push timeout msb + leau ,x + ldx #$0000 + orcc #IntMasks +loop@ ldb $FF41 + bitb #$02 + beq loop@ + ldb $FF42 + stb ,u+ + abx + leay ,-y + bne loop@ + + tfr x,y + ldb #0 + lda #3 + leas 1,s ; remove timeout msb from stack + inca ; A = status to be returned in C and Z + ora ,s ; place status information into the.. + sta ,s ; ..C and Z bits of the preserved CC + leay ,x ; return checksum in Y + puls cc,dp,x,u,pc ; restore registers and return + ENDC + ENDC + ENDC + + IFEQ BECKER+JMCPBCK+ARDUINO + IFNE BAUD38400 +******************************************************* +* 38400 bps using 6809 code and timimg +******************************************************* + +DWRead clra ; clear Carry (no framing error) + deca ; clear Z flag, A = timeout msb ($ff) + tfr cc,b + pshs u,x,dp,b,a ; preserve registers, push timeout msb + orcc #$50 ; mask interrupts + tfr a,dp ; set direct page to $FFxx + setdp $ff + leau ,x ; U = storage ptr + ldx #0 ; initialize checksum + adda #2 ; A = $01 (serial in mask), set Carry + +* Wait for a start bit or timeout +rx0010 bcc rxExit ; exit if timeout expired + ldb #$ff ; init timeout lsb +rx0020 bita <BBIN ; check for start bit + beq rxByte ; branch if start bit detected + subb #1 ; decrement timeout lsb + bita <BBIN + beq rxByte + bcc rx0020 ; loop until timeout lsb rolls under + bita <BBIN + beq rxByte + addb ,s ; B = timeout msb - 1 + bita <BBIN + beq rxByte + stb ,s ; store decremented timeout msb + bita <BBIN + bne rx0010 ; loop if still no start bit + +* Read a byte +rxByte leay ,-y ; decrement request count + ldd #$ff80 ; A = timeout msb, B = shift counter + sta ,s ; reset timeout msb for next byte +rx0030 exg a,a + nop + lda <BBIN ; read data bit + lsra ; shift into carry + rorb ; rotate into byte accumulator + lda #$01 ; prep stop bit mask + bcc rx0030 ; loop until all 8 bits read + + stb ,u+ ; store received byte to memory + abx ; update checksum + ldb #$ff ; set timeout lsb for next byte + anda <BBIN ; read stop bit + beq rxExit ; exit if framing error + leay ,y ; test request count + bne rx0020 ; loop if another byte wanted + lda #$03 ; setup to return SUCCESS + +* Clean up, set status and return +rxExit leas 1,s ; remove timeout msb from stack + inca ; A = status to be returned in C and Z + ora ,s ; place status information into the.. + sta ,s ; ..C and Z bits of the preserved CC + leay ,x ; return checksum in Y + puls cc,dp,x,u,pc ; restore registers and return + setdp $00 + + + ELSE + IFNE H6309 +******************************************************* +* 57600 (115200) bps using 6309 native mode +******************************************************* + +DWRead clrb ; clear Carry (no framing error) + decb ; clear Z flag, B = $FF + pshs u,x,dp,cc ; preserve registers + orcc #$50 ; mask interrupts +* ldmd #1 ; requires 6309 native mode + tfr b,dp ; set direct page to $FFxx + setdp $ff + leay -1,y ; adjust request count + leau ,x ; U = storage ptr + tfr 0,x ; initialize checksum + lda #$01 ; A = serial in mask + bra rx0030 ; go wait for start bit + +* Read a byte +rxByte sexw ; 4 cycle delay + ldw #$006a ; shift counter and timing flags + clra ; clear carry so next will branch +rx0010 bcc rx0020 ; branch if even bit number (15 cycles) + nop ; extra (16th) cycle +rx0020 lda <BBIN ; read bit + lsra ; move bit into carry + rorb ; rotate bit into byte accumulator + lda #0 ; prep A for 8th data bit + lsrw ; bump shift count, timing bit to carry + bne rx0010 ; loop until 7th data bit has been read + incw ; W = 1 for subtraction from Y + inca ; A = 1 for reading bit 7 + anda <BBIN ; read bit 7 + lsra ; move bit 7 into carry, A = 0 + rorb ; byte is now complete + stb ,u+ ; store received byte to memory + abx ; update checksum + subr w,y ; decrement request count + inca ; A = 1 for reading stop bit + anda <BBIN ; read stop bit + bls rxExit ; exit if completed or framing error + +* Wait for a start bit or timeout +rx0030 clrw ; initialize timeout counter +rx0040 bita <BBIN ; check for start bit + beq rxByte ; branch if start bit detected + addw #1 ; bump timeout counter + bita <BBIN + beq rxByte + bcc rx0040 ; loop until timeout rolls over + lda #$03 ; setup to return TIMEOUT status + +* Clean up, set status and return +rxExit beq rx0050 ; branch if framing error + eora #$02 ; toggle SUCCESS flag +rx0050 inca ; A = status to be returned in C and Z + ora ,s ; place status information into the.. + sta ,s ; ..C and Z bits of the preserved CC + leay ,x ; return checksum in Y + puls cc,dp,x,u,pc ; restore registers and return + setdp $00 + + + ELSE +******************************************************* +* 57600 (115200) bps using 6809 code and timimg +******************************************************* + +DWRead clra ; clear Carry (no framing error) + deca ; clear Z flag, A = timeout msb ($ff) + tfr cc,b + pshs u,x,dp,b,a ; preserve registers, push timeout msb + orcc #$50 ; mask interrupts + tfr a,dp ; set direct page to $FFxx + setdp $ff + leau ,x ; U = storage ptr + ldx #0 ; initialize checksum + lda #$01 ; A = serial in mask + bra rx0030 ; go wait for start bit + +* Read a byte +rxByte leau 1,u ; bump storage ptr + leay ,-y ; decrement request count + lda <BBIN ; read bit 0 + lsra ; move bit 0 into Carry + ldd #$ff20 ; A = timeout msb, B = shift counter + sta ,s ; reset timeout msb for next byte + rorb ; rotate bit 0 into byte accumulator +rx0010 lda <BBIN ; read bit (d1, d3, d5) + lsra + rorb + bita 1,s ; 5 cycle delay + bcs rx0020 ; exit loop after reading bit 5 + lda <BBIN ; read bit (d2, d4) + lsra + rorb + leau ,u + bra rx0010 + +rx0020 lda <BBIN ; read bit 6 + lsra + rorb + leay ,y ; test request count + beq rx0050 ; branch if final byte of request + lda <BBIN ; read bit 7 + lsra + rorb ; byte is now complete + stb -1,u ; store received byte to memory + abx ; update checksum + lda <BBIN ; read stop bit + anda #$01 ; mask out other bits + beq rxExit ; exit if framing error + +* Wait for a start bit or timeout +rx0030 bita <BBIN ; check for start bit + beq rxByte ; branch if start bit detected + bita <BBIN ; again + beq rxByte + ldb #$ff ; init timeout lsb +rx0040 bita <BBIN + beq rxByte + subb #1 ; decrement timeout lsb + bita <BBIN + beq rxByte + bcc rx0040 ; loop until timeout lsb rolls under + bita <BBIN + beq rxByte + addb ,s ; B = timeout msb - 1 + bita <BBIN + beq rxByte + stb ,s ; store decremented timeout msb + bita <BBIN + beq rxByte + bcs rx0030 ; loop if timeout hasn't expired + bra rxExit ; exit due to timeout + +rx0050 lda <BBIN ; read bit 7 of final byte + lsra + rorb ; byte is now complete + stb -1,u ; store received byte to memory + abx ; calculate final checksum + lda <BBIN ; read stop bit + anda #$01 ; mask out other bits + ora #$02 ; return SUCCESS if no framing error + +* Clean up, set status and return +rxExit leas 1,s ; remove timeout msb from stack + inca ; A = status to be returned in C and Z + ora ,s ; place status information into the.. + sta ,s ; ..C and Z bits of the preserved CC + leay ,x ; return checksum in Y + puls cc,dp,x,u,pc ; restore registers and return + setdp $00 + + ENDC + ENDC + ENDC +
--- a/level1/modules/dwwrite.asm Tue Jan 22 19:18:48 2013 -0600 +++ b/level1/modules/dwwrite.asm Wed Jan 23 12:36:55 2013 -0600 @@ -1,180 +1,180 @@ -******************************************************* -* -* DWWrite -* Send a packet to the DriveWire server. -* Serial data format: 1-8-N-1 -* 4/12/2009 by Darren Atkinson -* -* Entry: -* X = starting address of data to send -* Y = number of bytes to send -* -* Exit: -* X = address of last byte sent + 1 -* Y = 0 -* All others preserved -* - - - IFNE ARDUINO -DWWrite pshs a ; preserve registers -txByte - lda ,x+ ; get byte from buffer - sta $FF52 ; put it to PIA -loop@ tst $FF53 ; check status register - bpl loop@ ; until CB1 is set by Arduino, continue looping - tst $FF52 ; clear CB1 in status register - leay -1,y ; decrement byte counter - bne txByte ; loop if more to send - - puls a,pc ; restore registers and return - - ELSE - - IFNE JMCPBCK -DWWrite pshs d,cc ; preserve registers - orcc #$50 ; mask interrupts -txByte - lda ,x+ - sta $FF44 - leay -1,y ; decrement byte counter - bne txByte ; loop if more to send - - puls cc,d,pc ; restore registers and return - - ELSE - IFNE BECKER -DWWrite pshs d,cc ; preserve registers - orcc #$50 ; mask interrupts -; ldu #BBOUT ; point U to bit banger out register -; lda 3,u ; read PIA 1-B control register -; anda #$f7 ; clear sound enable bit -; sta 3,u ; disable sound output -; fcb $8c ; skip next instruction - -txByte - lda ,x+ - sta $FF42 - leay -1,y ; decrement byte counter - bne txByte ; loop if more to send - - puls cc,d,pc ; restore registers and return - ENDC - ENDC - - IFEQ BECKER+JMCPBCK+ARDUINO - IFEQ BAUD38400+H6309 -******************************************************* -* 57600 (115200) bps using 6809 code and timimg -******************************************************* - -DWWrite pshs dp,d,cc ; preserve registers - orcc #$50 ; mask interrupts - ldd #$04ff ; A = loop counter, B = $ff - tfr b,dp ; set direct page to $FFxx - setdp $ff - ldb <$ff23 ; read PIA 1-B control register - andb #$f7 ; clear sound enable bit - stb <$ff23 ; disable sound output - fcb $8c ; skip next instruction - -txByte stb <BBOUT ; send stop bit - ldb ,x+ ; get a byte to transmit - nop - lslb ; left rotate the byte two positions.. - rolb ; ..placing a zero (start bit) in bit 1 -tx0020 stb <BBOUT ; send bit (start bit, d1, d3, d5) - rorb ; move next bit into position - exg a,a - nop - stb <BBOUT ; send bit (d0, d2, d4, d6) - rorb ; move next bit into position - leau ,u - deca ; decrement loop counter - bne tx0020 ; loop until 7th data bit has been sent - - stb <BBOUT ; send bit 7 - ldd #$0402 ; A = loop counter, B = MARK value - leay ,-y ; decrement byte counter - bne txByte ; loop if more to send - - stb <BBOUT ; leave bit banger output at MARK - puls cc,d,dp,pc ; restore registers and return - setdp $00 - ELSE - - IFNE BAUD38400 -******************************************************* -* 38400 bps using 6809 code and timimg -******************************************************* - -DWWrite pshs u,d,cc ; preserve registers - orcc #$50 ; mask interrupts - ldu #BBOUT ; point U to bit banger out register - lda 3,u ; read PIA 1-B control register - anda #$f7 ; clear sound enable bit - sta 3,u ; disable sound output - fcb $8c ; skip next instruction - -txByte stb ,--u ; send stop bit - leau ,u+ - lda #8 ; counter for start bit and 7 data bits - ldb ,x+ ; get a byte to transmit - lslb ; left rotate the byte two positions.. - rolb ; ..placing a zero (start bit) in bit 1 -tx0010 stb ,u++ ; send bit - tst ,--u - rorb ; move next bit into position - deca ; decrement loop counter - bne tx0010 ; loop until 7th data bit has been sent - leau ,u - stb ,u ; send bit 7 - lda ,u++ - ldb #$02 ; value for stop bit (MARK) - leay -1,y ; decrement byte counter - bne txByte ; loop if more to send - - stb ,--u ; leave bit banger output at MARK - puls cc,d,u,pc ; restore registers and return - - - ELSE -******************************************************* -* 57600 (115200) bps using 6309 native mode -******************************************************* - -DWWrite pshs u,d,cc ; preserve registers - orcc #$50 ; mask interrupts -* ldmd #1 ; requires 6309 native mode - ldu #BBOUT+1 ; point U to bit banger out register +1 - aim #$f7,2,u ; disable sound output - lda #8 ; counter for start bit and 7 data bits - fcb $8c ; skip next instruction - -txByte stb -1,u ; send stop bit -tx0010 ldb ,x+ ; get a byte to transmit - lslb ; left rotate the byte two positions.. - rolb ; ..placing a zero (start bit) in bit 1 - bra tx0030 - -tx0020 bita #1 ; even or odd bit number ? - beq tx0040 ; branch if even (15 cycles) -tx0030 nop ; extra (16th) cycle -tx0040 stb -1,u ; send bit - rorb ; move next bit into position - deca ; decrement loop counter - bne tx0020 ; loop until 7th data bit has been sent - leau ,u+ - stb -1,u ; send bit 7 - ldd #$0802 ; A = loop counter, B = MARK value - leay -1,y ; decrement byte counter - bne txByte ; loop if more to send - - stb -1,u ; final stop bit - puls cc,d,u,pc ; restore registers and return - - - ENDC - ENDC - ENDC - ENDC +******************************************************* +* +* DWWrite +* Send a packet to the DriveWire server. +* Serial data format: 1-8-N-1 +* 4/12/2009 by Darren Atkinson +* +* Entry: +* X = starting address of data to send +* Y = number of bytes to send +* +* Exit: +* X = address of last byte sent + 1 +* Y = 0 +* All others preserved +* + + + IFNE ARDUINO +DWWrite pshs a ; preserve registers +txByte + lda ,x+ ; get byte from buffer + sta $FF52 ; put it to PIA +loop@ tst $FF53 ; check status register + bpl loop@ ; until CB1 is set by Arduino, continue looping + tst $FF52 ; clear CB1 in status register + leay -1,y ; decrement byte counter + bne txByte ; loop if more to send + + puls a,pc ; restore registers and return + + ELSE + + IFNE JMCPBCK +DWWrite pshs d,cc ; preserve registers + orcc #$50 ; mask interrupts +txByte + lda ,x+ + sta $FF44 + leay -1,y ; decrement byte counter + bne txByte ; loop if more to send + + puls cc,d,pc ; restore registers and return + + ELSE + IFNE BECKER +DWWrite pshs d,cc ; preserve registers + orcc #$50 ; mask interrupts +; ldu #BBOUT ; point U to bit banger out register +; lda 3,u ; read PIA 1-B control register +; anda #$f7 ; clear sound enable bit +; sta 3,u ; disable sound output +; fcb $8c ; skip next instruction + +txByte + lda ,x+ + sta $FF42 + leay -1,y ; decrement byte counter + bne txByte ; loop if more to send + + puls cc,d,pc ; restore registers and return + ENDC + ENDC + ENDC + + IFEQ BECKER+JMCPBCK+ARDUINO + IFNE BAUD38400 +******************************************************* +* 38400 bps using 6809 code and timimg +******************************************************* + +DWWrite pshs u,d,cc ; preserve registers + orcc #$50 ; mask interrupts + ldu #BBOUT ; point U to bit banger out register + lda 3,u ; read PIA 1-B control register + anda #$f7 ; clear sound enable bit + sta 3,u ; disable sound output + fcb $8c ; skip next instruction + +txByte stb ,--u ; send stop bit + leau ,u+ + lda #8 ; counter for start bit and 7 data bits + ldb ,x+ ; get a byte to transmit + lslb ; left rotate the byte two positions.. + rolb ; ..placing a zero (start bit) in bit 1 +tx0010 stb ,u++ ; send bit + tst ,--u + rorb ; move next bit into position + deca ; decrement loop counter + bne tx0010 ; loop until 7th data bit has been sent + leau ,u + stb ,u ; send bit 7 + lda ,u++ + ldb #$02 ; value for stop bit (MARK) + leay -1,y ; decrement byte counter + bne txByte ; loop if more to send + + stb ,--u ; leave bit banger output at MARK + puls cc,d,u,pc ; restore registers and return + + ELSE + + IFNE H6309 +******************************************************* +* 57600 (115200) bps using 6309 native mode +******************************************************* + +DWWrite pshs u,d,cc ; preserve registers + orcc #$50 ; mask interrupts +* ldmd #1 ; requires 6309 native mode + ldu #BBOUT+1 ; point U to bit banger out register +1 + aim #$f7,2,u ; disable sound output + lda #8 ; counter for start bit and 7 data bits + fcb $8c ; skip next instruction + +txByte stb -1,u ; send stop bit +tx0010 ldb ,x+ ; get a byte to transmit + lslb ; left rotate the byte two positions.. + rolb ; ..placing a zero (start bit) in bit 1 + bra tx0030 + +tx0020 bita #1 ; even or odd bit number ? + beq tx0040 ; branch if even (15 cycles) +tx0030 nop ; extra (16th) cycle +tx0040 stb -1,u ; send bit + rorb ; move next bit into position + deca ; decrement loop counter + bne tx0020 ; loop until 7th data bit has been sent + leau ,u+ + stb -1,u ; send bit 7 + ldd #$0802 ; A = loop counter, B = MARK value + leay -1,y ; decrement byte counter + bne txByte ; loop if more to send + + stb -1,u ; final stop bit + puls cc,d,u,pc ; restore registers and return + + ELSE +******************************************************* +* 57600 (115200) bps using 6809 code and timimg +******************************************************* + +DWWrite pshs dp,d,cc ; preserve registers + orcc #$50 ; mask interrupts + ldd #$04ff ; A = loop counter, B = $ff + tfr b,dp ; set direct page to $FFxx + setdp $ff + ldb <$ff23 ; read PIA 1-B control register + andb #$f7 ; clear sound enable bit + stb <$ff23 ; disable sound output + fcb $8c ; skip next instruction + +txByte stb <BBOUT ; send stop bit + ldb ,x+ ; get a byte to transmit + nop + lslb ; left rotate the byte two positions.. + rolb ; ..placing a zero (start bit) in bit 1 +tx0020 stb <BBOUT ; send bit (start bit, d1, d3, d5) + rorb ; move next bit into position + exg a,a + nop + stb <BBOUT ; send bit (d0, d2, d4, d6) + rorb ; move next bit into position + leau ,u + deca ; decrement loop counter + bne tx0020 ; loop until 7th data bit has been sent + + stb <BBOUT ; send bit 7 + ldd #$0402 ; A = loop counter, B = MARK value + leay ,-y ; decrement byte counter + bne txByte ; loop if more to send + + stb <BBOUT ; leave bit banger output at MARK + puls cc,d,dp,pc ; restore registers and return + setdp $00 + + ENDC + ENDC + ENDC +