Mercurial > hg > Members > kono > nitros9-code
changeset 2725:c2112f93923a lwtools-port
o dwio for Atari now uses routines in ROM, so dwread/dwrite stripped of Atari
o Added NMI code (as a conditional) to clock
author | Boisy Pitre <boisy.pitre@nuance.com> |
---|---|
date | Tue, 31 Jul 2012 11:54:02 -0500 |
parents | 05b648103e78 |
children | 3a6484c23f54 |
files | defs/atari.d level1/atari/startup level1/modules/clock.asm level1/modules/dwio.asm level1/modules/dwread.asm level1/modules/dwwrite.asm |
diffstat | 6 files changed, 49 insertions(+), 159 deletions(-) [+] |
line wrap: on
line diff
--- a/defs/atari.d Mon Jul 30 19:35:05 2012 -0500 +++ b/defs/atari.d Tue Jul 31 11:54:02 2012 -0500 @@ -111,8 +111,8 @@ * POKEY requires shadow registers. We allocate them in the kernel's DP * (Yes, we are stealing an existing variable that is so old it should be * removed from os9defs) -D.IRQENShdw equ D.WDBtDr -D.SKCTLShdw equ D.SWPage +D.IRQENShdw equ $02 ; was D.WDBtDr +D.SKCTLShdw equ $03 ; was D.SWPage * The clock interrupt is driven by the unmaskable NMI. Therefore, * the rbdw3 driver uses the DWIOSEMA flag in the D.ATARIFLAGS field as
--- a/level1/atari/startup Mon Jul 30 19:35:05 2012 -0500 +++ b/level1/atari/startup Tue Jul 31 11:54:02 2012 -0500 @@ -1,7 +1,6 @@ * Echo welcome message echo * Welcome to NitrOS-9 Level 1 * echo * on the Atari XL/XE * -* Start system time from keyboard -setime </term +echo date -t
--- a/level1/modules/clock.asm Mon Jul 30 19:35:05 2012 -0500 +++ b/level1/modules/clock.asm Tue Jul 31 11:54:02 2012 -0500 @@ -49,6 +49,9 @@ rev set 8 edition set 9 + IFNE atari +USENMI EQU 0 + ENDC *------------------------------------------------------------ * @@ -132,7 +135,11 @@ stb <D.Slice set first time slice IFNE atari leax SvcIRQ,pcr set IRQ handler + IFNE USENMI + stx <D.NMI + ELSE stx <D.IRQ + ENDC ELSE leax SvcIRQ,pcr set IRQ handler stx <D.IRQ @@ -146,21 +153,27 @@ jsr ,y call init entry point of Clock2 * Initialize clock hardware - IFNE atari - lda #IRQST.TIMER1 - pshs cc - orcc #IntMasks - ora <D.IRQENShdw - sta <D.IRQENShdw - sta IRQEN - lda #%00101001 - sta AUDCTL - clr AUDC1 - lda #$FF - sta AUDF1 - sta STIMER - puls cc,pc - ELSE + IFNE atari + IFNE USENMI + lda #$40 + sta NMIEN enable VBlank NMI + rts + ELSE + lda #IRQST.TIMER1 + pshs cc + orcc #IntMasks + ora <D.IRQENShdw + sta <D.IRQENShdw + sta IRQEN + lda #%00101001 + sta AUDCTL + clr AUDC1 + lda #$FF + sta AUDF1 + sta STIMER + puls cc,pc + ENDC + ELSE ldx #PIA0Base point to PIA0 clra no error for return... pshs cc save IRQ enable status (and Carry clear) @@ -190,7 +203,10 @@ SvcIRQ clra tfr a,dp set direct page to zero - IFNE atari + IFNE atari + IFNE USENMI + sta NMIRES clear NMI interrupt + ELSE lda IRQST get hw byte bita #IRQST.TIMER1 beq L0032 branch if interrupt occurred @@ -206,6 +222,7 @@ stb IRQEN stb <D.IRQENShdw sta STIMER + ENDC ELSE tst PIA0Base+3 get hw byte bmi L0032 branch if sync flag on
--- a/level1/modules/dwio.asm Mon Jul 30 19:35:05 2012 -0500 +++ b/level1/modules/dwio.asm Tue Jul 31 11:54:02 2012 -0500 @@ -66,14 +66,26 @@ clrb clear Carry rts -Read +Read + IFNE atari + jmp [$FFE0] + ELSE use dwread.asm + ENDC Write + IFNE atari + jmp [$FFE2] + ELSE use dwwrite.asm + ENDC + IFNE atari +DWInit rts + ELSE use dwinit.asm + ENDC * Init *
--- a/level1/modules/dwread.asm Mon Jul 30 19:35:05 2012 -0500 +++ b/level1/modules/dwread.asm Tue Jul 31 11:54:02 2012 -0500 @@ -18,74 +18,6 @@ * - IFNE atari -* ATARI SIO Version -TIMEOUT equ $1000 -DWRead - clrb clear Carry & Zero CC flags - pshs cc,dp,a,x,y,u - tfr b,dp - setdp $00 - tfr x,u - ldx #$0000 - orcc #IntMasks -* lda D.IRQENShdw -* sta IRQEN -* ora #%00100000 -* enable the serial input interrupt - - ldb SERIN read what is in the buffer - lda #SKCTL.SERMODEIN|SKCTL.KEYBRDSCAN|SKCTL.KEYDEBOUNCE - sta SKCTL - sta SKRES -inloop@ - lda D.IRQENShdw - ora #IRQEN.SERINRDY - sta D.IRQENShdw - sta IRQEN -* timing loop to read a character from the serial chip - ldd #TIMEOUT -loop@ subd #$0001 - beq overrun_error@ - pshs b - ldb IRQST - bitb #IRQST.SERINRDY - puls b - bne loop@ - ldb SERIN - lda D.IRQENShdw - anda #^IRQEN.SERINRDY - sta D.IRQENShdw - sta IRQEN -* check for framing error - lda SKSTAT - bpl framing_error@ framing error - lsla - bcc overrun_error@ data input overrun - stb ,u+ - abx - leay -1,y - bne inloop@ -bye@ sta SKRES clear framing or data input overrun bits - stx 5,s - puls cc,dp,a,x,y,u,pc -framing_error@ - lda ,s - ora #Carry - sta ,s - bra outtahere@ -overrun_error@ - lda ,s - anda #^Zero - sta ,s -outtahere@ - lda D.IRQENShdw - anda #^IRQEN.SERINRDY - sta D.IRQENShdw - sta IRQEN - bra bye@ - - ELSE IFNE BECKER * NOTE: There is no timeout currently on here... @@ -332,4 +264,3 @@ ENDC ENDC ENDC - ENDC
--- a/level1/modules/dwwrite.asm Mon Jul 30 19:35:05 2012 -0500 +++ b/level1/modules/dwwrite.asm Tue Jul 31 11:54:02 2012 -0500 @@ -15,75 +15,7 @@ * All others preserved * - IFNE atari -* Atari SIO Version -* Based on the hipatch source for the Atari and translated -* into 6809 assembly language by Boisy G. Pitre. -* -SENDDELAY equ 20 -DWWrite - andcc #^Carry ; clear carry to assume no error - pshs cc,dp,d - clra - tfr a,dp - setdp $00 -; setup pokey -* lda #$28 -* sta AUDCTL -* lda #$A0 -* lda #$A8 -* sta AUDC4 -* delay before send - bsr somedelay - orcc #IntMasks ; mask interrupts -; set pokey to transmit data mode - lda #SKCTL.SERMODEOUT|SKCTL.KEYBRDSCAN|SKCTL.KEYDEBOUNCE - sta SKCTL - sta SKRES - lda D.IRQENSHDW - ora #IRQEN.SEROUTNEEDED - sta D.IRQENSHDW - sta IRQEN -* bsr somedelay - lda ,x+ - sta SEROUT - leay -1,y - beq ex@ -byteloop@ - lda ,x+ - ldb #IRQST.SEROUTNEEDED -* NOTE: Potential infinite loop here! -waitloop@ - bitb IRQST - bne waitloop@ - ldb D.IRQENSHDW - andb #^IRQEN.SEROUTNEEDED - stb IRQEN - ldb D.IRQENSHDW - stb IRQEN - sta SEROUT - leay -1,y - bne byteloop@ -ex@ - lda #IRQST.SEROUTDONE -wt bita IRQST ; wait until transmit complete - bne wt - puls cc - bsr somedelay - puls dp,d,pc - - -somedelay - pshs y - ldy #20 -delay@ - leay -1,y - bne delay@ - puls y,pc - - - ELSE IFNE BECKER DWWrite pshs d,cc ; preserve registers @@ -260,4 +192,3 @@ ENDC ENDC ENDC - ENDC