Mercurial > hg > Members > kono > nitros9-code
changeset 3130:e0614e08fa5e
l1 boot modules: Expand documentation and clean up code
Tidy up white-space and indentation.
Expand documentation to show C flag is important on return
from HWRead.
Expand documentation to show how/why/when filler is needed at
end of file.
Delete dead code in some places. No functional changes.
| author | Neal Crook <foofoobedoo@gmail.com> |
|---|---|
| date | Sun, 04 Dec 2016 21:01:42 +0000 |
| parents | ce9f4ff0a380 |
| children | e1aadba01e81 |
| files | level1/modules/boot_1773.asm level1/modules/boot_burke.asm level1/modules/boot_common.asm level1/modules/boot_d64.asm level1/modules/boot_dw.asm level1/modules/boot_ide.asm level1/modules/boot_rampak.asm level1/modules/boot_scsi.asm level1/modules/boot_sdc.asm level1/modules/boot_wd1002.asm |
| diffstat | 10 files changed, 801 insertions(+), 725 deletions(-) [+] |
line wrap: on
line diff
--- a/level1/modules/boot_1773.asm Wed Nov 30 22:10:56 2016 +0000 +++ b/level1/modules/boot_1773.asm Sun Dec 04 21:01:42 2016 +0000 @@ -1,12 +1,14 @@ ******************************************************************** * Boot - WD1773 Boot module +* Provides HWInit, HWTerm, HWRead which are called by code in +* "use"d boot_common.asm * * $Id$ * * Edt/Rev YYYY/MM/DD Modified by * Comment * ------------------------------------------------------------------ -* 4 1985/??/?? +* 4 1985/??/?? * Original Tandy distribution version. * * 6 1998/10/12 Boisy G. Pitre @@ -43,15 +45,15 @@ nam Boot ttl WD1773 Boot module - IFP1 + IFP1 use defsfile - ENDC + ENDC * FDC Control Register bits at $FF40 HALTENA equ %10000000 -SIDESEL equ %01000000 DRVSEL3 if no DS drives +SIDESEL equ %01000000 DRVSEL3 if no DS drives DDEN equ %00100000 -READY equ %00010000 READY for Tandy WD1773-based controllers +READY equ %00010000 READY for Tandy WD1773-based controllers MOTON equ %00001000 DRVSEL2 equ %00000100 DRVSEL1 equ %00000010 @@ -59,20 +61,20 @@ * Default Boot is from drive 0 BootDr set DRVSEL0 - IFEQ DNum-1 -BootDr set DRVSEL1 Alternate boot from drive 1 - ENDC - IFEQ DNum-2 -BootDr set DRVSEL2 Alternate boot from drive 2 - ENDC - IFEQ DNum-3 -BootDr set SIDESEL Alternate boot from drive 3 - ENDC + IFEQ DNum-1 +BootDr set DRVSEL1 Alternate boot from drive 1 + ENDC + IFEQ DNum-2 +BootDr set DRVSEL2 Alternate boot from drive 2 + ENDC + IFEQ DNum-3 +BootDr set SIDESEL Alternate boot from drive 3 + ENDC * WD17x3 DPort offsets CONTROL equ 0 -CMDREG equ 8+0 write-only -STATREG equ CMDREG read-only +CMDREG equ 8+0 write-only +STATREG equ CMDREG read-only TRACKREG equ 8+1 SECTREG equ 8+2 DATAREG equ 8+3 @@ -81,13 +83,13 @@ SECTSIZE equ 256 * Step Rates: -* $00 = 6ms -* $01 = 12ms -* $02 = 20ms -* $03 = 30ms - IFNDEF STEP +* $00 = 6ms +* $01 = 12ms +* $02 = 20ms +* $03 = 30ms + IFNDEF STEP STEP set $00 - ENDC + ENDC tylg set Systm+Objct atrv set ReEnt+rev @@ -97,18 +99,18 @@ mod eom,name,tylg,atrv,start,size * NOTE: these are U-stack offsets, not DP -seglist rmb 2 pointer to segment list -blockloc rmb 2 pointer to memory requested -blockimg rmb 2 duplicate of the above -bootsize rmb 2 size in bytes -LSN0Ptr rmb 2 In memory LSN0 pointer +seglist rmb 2 pointer to segment list +blockloc rmb 2 pointer to memory requested +blockimg rmb 2 duplicate of the above +bootsize rmb 2 size in bytes +LSN0Ptr rmb 2 In memory LSN0 pointer drvsel rmb 1 currtrak rmb 1 * Note, for optimization purposes, the following two variables * should be adjacent!! -ddtks rmb 1 no. of sectors per track +ddtks rmb 1 no. of sectors per track ddfmt rmb 1 -side rmb 1 side 2 flag +side rmb 1 side 2 flag size equ . name fcs /Boot/ @@ -123,33 +125,33 @@ * Exit: Carry Clear = OK, Set = Error * B = error (Carry Set) HWInit - lda #%11010000 ($D0) Force Interrupt (stops any command in progress) - sta CMDREG,y write command to command register - lbsr Delay2 delay 54~ - lda STATREG,y clear status register + lda #%11010000 ($D0) Force Interrupt (stops any command in progress) + sta CMDREG,y write command to command register + lbsr Delay2 delay 54~ + lda STATREG,y clear status register lda #$FF - sta currtrak,u set current track to 255 - leax >NMIRtn,pcr point to NMI routine - IFGT Level-1 - stx <D.NMI save address - ELSE - stx >D.XNMI+1 save address + sta currtrak,u set current track to 255 + leax >NMIRtn,pcr point to NMI routine + IFGT Level-1 + stx <D.NMI save address + ELSE + stx >D.XNMI+1 save address lda #$7E sta >D.XNMI - ENDC - lda #MOTON turn on drive motor + ENDC + lda #MOTON turn on drive motor ora WhichDrv,pcr sta CONTROL,y * MOTOR ON spin-up delay loop (~307 mSec) - IFGT Level-1 - IFNE H6309 + IFGT Level-1 + IFNE H6309 ldd #$F000 3 cycles - ELSE + ELSE ldd #50000 - ENDC - ELSE - ldd #25000 - ENDC + ENDC + ELSE + ldd #25000 + ENDC * IFNE H6309 * nop * ENDC @@ -172,27 +174,29 @@ use boot_common.asm - + -DoDDns lda #DDEN+MOTON double density enable and motor on - ora WhichDrv,pcr OR in selected drive - sta drvsel,u save drive selection byte - clr currtrak,u clear current track +DoDDns lda #DDEN+MOTON double density enable and motor on + ora WhichDrv,pcr OR in selected drive + sta drvsel,u save drive selection byte + clr currtrak,u clear current track lda #$05 - lbsr SetTrak Set the track to the head we want - ldb #0+STEP RESTORE cmd - lbra Talk2FDC send command and wait for it to complete + lbsr SetTrak Set the track to the head we want + ldb #0+STEP RESTORE cmd + lbra Talk2FDC send command and wait for it to complete * HWRead - Read a 256 byte sector from the device * Entry: Y = hardware address * B = bits 23-16 of LSN * X = bits 15-0 of LSN -* blockloc,u = ptr to 256 byte sector +* blockloc,u = ptr to 256 byte sector * Exit: X = ptr to data (i.e. ptr in blockloc,u) +* Carry Clear = OK, Set = Error +* HWRead lda #$91 - bsr L00DF else branch subroutine - bcs HWRRts branch if error - ldx blockloc,u get buffer pointer in X for caller + bsr L00DF else branch subroutine + bcs HWRRts branch if error + ldx blockloc,u get buffer pointer in X for caller clrb HWRRts rts @@ -200,32 +204,32 @@ pshs x,b,a bsr DoDDns puls x,b,a -L00DF pshs x,b,a save LSN, command +L00DF pshs x,b,a save LSN, command bsr ReadSect - puls x,b,a restore LSN, command - bcc HWRRts branch if OK + puls x,b,a restore LSN, command + bcc HWRRts branch if OK lsra bne L00D7 -ReadSect bsr Seek2Sect seek to the sector stored in X - bcs HWRRts if error, return to caller - ldx blockloc,u get address of buffer to fill - orcc #IntMasks mask interrupts - pshs x save X +ReadSect bsr Seek2Sect seek to the sector stored in X + bcs HWRRts if error, return to caller + ldx blockloc,u get address of buffer to fill + orcc #IntMasks mask interrupts + pshs x save X ldx #$FFFF - ldb #%10000000 ($80) READ SECTOR command - stb CMDREG,y write to command register - ldb drvsel,u (DDEN+MOTORON+BootDr) + ldb #%10000000 ($80) READ SECTOR command + stb CMDREG,y write to command register + ldb drvsel,u (DDEN+MOTORON+BootDr) * NOTE: The 1773 FDC multiplexes the write precomp enable and ready * signals on the ENP/RDY pin, so the READY bit must always be ON for * read and seek commands. (from the FD502 FDC Service Manual) - orb #DDEN+READY set DDEN+READY bits ($30) - tst side,u are we on side 2? + orb #DDEN+READY set DDEN+READY bits ($30) + tst side,u are we on side 2? beq L0107 - orb #SIDESEL set side 2 bit + orb #SIDESEL set side 2 bit L0107 stb CONTROL,y - lbsr Delay2 delay 54~ - orb #HALTENA HALT enable ($80) -* lda #%00000010 RESTORE cmd ($02) + lbsr Delay2 delay 54~ + orb #HALTENA HALT enable ($80) +* lda #%00000010 RESTORE cmd ($02) *L0111 bita >DPort+STATREG * bne L0123 * leay -$01,y @@ -239,9 +243,9 @@ nop * bra L0123 - ldx ,s get X saved earlier + ldx ,s get X saved earlier * Sector READ Loop -L0123 lda DATAREG,y read from WD DATA register +L0123 lda DATAREG,y read from WD DATA register sta ,x+ * stb >DPort+CONTROL nop @@ -251,74 +255,74 @@ * means that reading a single-density boot disk will not generate the * NMI signal needed to exit the read loop! Single-density disks must * use a polled I/O loop instead. -NMIRtn leas R$Size,s adjust stack +NMIRtn leas R$Size,s adjust stack puls x - ldb STATREG,y read WD STATUS register - bitb #$9C any errors? -* bitb #$04 LOST DATA bit set? - beq r@ branch if not -* beq ChkErr branch if not -L0138 comb else we will return error + ldb STATREG,y read WD STATUS register + bitb #$9C any errors? +* bitb #$04 LOST DATA bit set? + beq r@ branch if not +* beq ChkErr branch if not +L0138 comb else we will return error ldb #E$Read r@ rts Seek2Sect - lda #MOTON permit alternate drives - ora WhichDrv,pcr permit alternate drives - sta drvsel,u save byte to static mem - clr side,u start on side 1 - tfr x,d move LSN into D - cmpd #$0000 zero? - beq L016C branch if so - clr ,-s else clear space on stack + lda #MOTON permit alternate drives + ora WhichDrv,pcr permit alternate drives + sta drvsel,u save byte to static mem + clr side,u start on side 1 + tfr x,d move LSN into D + cmpd #$0000 zero? + beq L016C branch if so + clr ,-s else clear space on stack pshs a lda ddfmt,u - bita #FMT.SIDE double sided disk? + bita #FMT.SIDE double sided disk? puls a - beq SnglSid branch if not + beq SnglSid branch if not bra DblSid * Double-sided code -L0152 com side,u flag side 2 +L0152 com side,u flag side 2 bne DblSid inc ,s -DblSid subb ddtks,u +DblSid subb ddtks,u sbca #$00 bcc L0152 bra L0168 L0160 inc ,s -SnglSid subb ddtks,u subtract sectors per track from B +SnglSid subb ddtks,u subtract sectors per track from B sbca #$00 bcc L0160 -L0168 addb ddtks,u add sectors per track - puls a get current track indicator off of stack +L0168 addb ddtks,u add sectors per track + puls a get current track indicator off of stack L016C incb - stb SECTREG,y save in sector register -SetTrak ldb currtrak,u get current track in B - stb TRACKREG,y save in track register - cmpa currtrak,u same as A? - beq rtsok branch if so + stb SECTREG,y save in sector register +SetTrak ldb currtrak,u get current track in B + stb TRACKREG,y save in track register + cmpa currtrak,u same as A? + beq rtsok branch if so sta currtrak,u sta DATAREG,y - ldb #$10+STEP SEEK command - bsr Talk2FDC send command to controller + ldb #$10+STEP SEEK command + bsr Talk2FDC send command to controller pshs x * Seek Delay - ldx #$222E delay ~39 mSec (78mS L1) + ldx #$222E delay ~39 mSec (78mS L1) SeekDly leax -$01,x bne SeekDly puls x rtsok clrb rts -*ChkErr bitb #$98 evaluate WD status (READY, RNF, CRC err) +*ChkErr bitb #$98 evaluate WD status (READY, RNF, CRC err) * bne L0138 * clrb * rts -Talk2FDC bsr DoCMD issue FDC cmd, wait 54~ -FDCLoop ldb STATREG,y get status - bitb #$01 still BUSY? - bne FDCLoop loop until command completes +Talk2FDC bsr DoCMD issue FDC cmd, wait 54~ +FDCLoop ldb STATREG,y get status + bitb #$01 still BUSY? + bne FDCLoop loop until command completes rts * Issue command and wait 54 clocks @@ -328,18 +332,18 @@ * Delay branches * 54 clock delay including bsr (=30uS/L2,60us/L1) * H6309 code changed to reduce code size, RG - IFEQ H6309 -Delay2 + IFEQ H6309 +Delay2 lbsr Delay3 -Delay3 +Delay3 lbsr Delay4 -Delay4 - ELSE +Delay4 + ELSE Delay2 lda #5 3 cycles Delay3 exg a,a 5 cycles | 10*5 deca 2 cycles | bne Delay3 3 cycles | - ENDC + ENDC rts * Select And Send @@ -349,10 +353,18 @@ stb CMDREG,y rts - IFGT Level-1 -* Filler to get $1D0 + IFGT Level-1 +* L2 kernel file is composed of rel, boot, krn. The size of each of these +* is controlled with filler, so that (after relocation): +* rel starts at $ED00 and is $130 bytes in size +* boot starts at $EE30 and is $1D0 bytes in size +* krn starts at $F000 and ends at $FEFF (there is no 'emod' at the end +* of krn and so there are no module-end boilerplate bytes) +* +* Filler to get to a total size of $1D0. 3, 2, 1 represent bytes after +* the filler: the end boilerplate for the module, fdb and fcb respectively. Filler fill $39,$1D0-3-2-1-* - ENDC + ENDC Address fdb DPort WhichDrv fcb BootDr
--- a/level1/modules/boot_burke.asm Wed Nov 30 22:10:56 2016 +0000 +++ b/level1/modules/boot_burke.asm Sun Dec 04 21:01:42 2016 +0000 @@ -46,7 +46,7 @@ name fcs /Boot/ fcb edition -start ldb >MPI.Slct Set up Multipak properly for us +start ldb >MPI.Slct Set up Multipak properly for us lda #$10 mul ldb #$11 @@ -169,7 +169,7 @@ stb sector,u Preserve sector # leas $03,s Clear stack of 24 bit number - pshs cc Preserve odd sector flag (carry bit) + pshs cc Preserve odd sector flag (carry bit) bsr cmdstrt Set up controller for new command lda #$08 Read sector command @@ -327,7 +327,15 @@ rts Padding to get $1D0 Size IFGT Level-1 -* Pad to $1D0 bytes exactly +* L2 kernel file is composed of rel, boot, krn. The size of each of these +* is controlled with filler, so that (after relocation): +* rel starts at $ED00 and is $130 bytes in size +* boot starts at $EE30 and is $1D0 bytes in size +* krn starts at $F000 and ends at $FEFF (there is no 'emod' at the end +* of krn and so there are no module-end boilerplate bytes) +* +* Filler to get to a total size of $1D0. 3 represents bytes after +* the filler: the end boilerplate for the module. Pad fill $39,$1D0-3-* ENDC
--- a/level1/modules/boot_common.asm Wed Nov 30 22:10:56 2016 +0000 +++ b/level1/modules/boot_common.asm Sun Dec 04 21:01:42 2016 +0000 @@ -35,14 +35,14 @@ * 2005/10/16 Boisy G. Pitre * Further optimizations made * -* 2006/01/04 P.Harvey-Smith. +* 2006/01/04 P.Harvey-Smith. * Added pointer to loaded LSN0 to data passed to hardware dependent section. * -* 2007/08/23 Boisy G. Pitre +* 2007/08/23 Boisy G. Pitre * Added 'subd #$00FF' to counteract earlier 'addd #$00FF'. We need to undo * to give F$SRqMem the right amount of memory to allocate. * -* 2007/08/24 Boisy G. Pitre +* 2007/08/24 Boisy G. Pitre * We no longer use F$SRqMem to get the 256 byte buffer for LSN0, but * instead allocate the memory temporarily off the stack. This gives us * two system ram pages that were not available before, and also prevents @@ -53,52 +53,52 @@ * the module directory table is at $400-$4FF, we must do this; otherwise, we * would overwrite the bottom portion of the module directory table and corrupt * it (it's already setup by krn before boot is called!) - + start orcc #IntMasks ensure IRQs are off (necessary?) * allocate memory on stack for vars and sector buffer - IFEQ Level-1 -* Level 1: stack is only 256 bytes and its bottom runs against moddir ptrs... so cheat and use free page just above stack -* for 256 byte disk buffer - leas -size,s + IFEQ Level-1 +* Level 1: stack is only 256 bytes and its bottom runs against moddir ptrs.. +* so cheat and use free page just above stack as 256-byte disk buffer + leas -size,s tfr s,u get pointer to data area ldx #$500 - ELSE - leas -size-256,s + ELSE + leas -size-256,s tfr s,u get pointer to data area leax size,u point U to 256 byte sector buffer - ENDC + ENDC pshs u save pointer to data area stx blockloc,u - + * Initialize Hardware - ldy Address,pcr get hardware address + ldy Address,pcr get hardware address lbsr HWInit * Read LSN0 - IFNE LSN24BIT + IFNE LSN24BIT clrb MSB sector - ENDC + ENDC ldx #0 LSW sector lbsr HWRead read LSN 0 bcs error branch if error - - IFGT Level-1 + + IFGT Level-1 lda #'0 --- loaded in LSN0' jsr <D.BtBug --- - ENDC - - stx LSN0Ptr,u Save LSN0 pointer + ENDC + + stx LSN0Ptr,u Save LSN0 pointer * Pull relevant values from LSN0 - IFNE FLOPPY + IFNE FLOPPY lda DD.TKS,x number of tracks on this disk ldb DD.FMT,x disk format byte std ddtks,u TAKE NOTE! ASSUMES ADJACENT VARS! - ENDC + ENDC ldd DD.BSZ,x os9boot size in bytes beq FragBoot if zero, do frag boot std bootsize,u * Old style boot -- make a fake FD segment right from LSN0! - leax DD.BT,x + leax DD.BT,x addd #$00FF round up to next page * Important note: We are making an assumption that the upper 8 bits of the * FDSL.B field will always be zero. That is a safe assumption, since an @@ -106,24 +106,24 @@ * under NitrOS-9 cannot be this large, and therefore this assumption * is safe. sta FDSL.B+1,x save file size - IFNE LSN24BIT + IFNE LSN24BIT clr FDSL.S,x make next segment entry 0 - ENDC + ENDC clr FDSL.S+1,x clr FDSL.S+2,x subd #$00FF undo previous add #$00FF bra GrabBootMem - + Back2Krn lbsr HWTerm call HW termination routine ldx blockimg,u pointer to start of os9boot in memory clrb clear carry ldd bootsize,u error - IFEQ Level-1 - leas 2+size,s reset the stack same as PULS U - ELSE - leas 2+size+256,s reset the stack same as PULS U - ENDC + IFEQ Level-1 + leas 2+size,s reset the stack same as PULS U + ELSE + leas 2+size+256,s reset the stack same as PULS U + ENDC rts return to kernel @@ -136,13 +136,13 @@ ldd FD.SIZ+2,x get file size (we skip first two bytes) std bootsize,u leax FD.SEG,x point to segment table - -GrabBootMem - IFGT Level-1 - os9 F$BtMem - ELSE - os9 F$SRqMem - ENDC + +GrabBootMem + IFGT Level-1 + os9 F$BtMem + ELSE + os9 F$SRqMem + ENDC bcs error * Save off alloced mem from F$SRqMem into blockloc,u and restore * the statics pointer in U @@ -150,39 +150,39 @@ ldu ,s recover pointer to data stack std blockloc,u std blockimg,u - + * Get os9boot into memory BootLoop stx seglist,u update segment list - IFNE LSN24BIT + IFNE LSN24BIT ldb FDSL.A,x MSB sector location - ENDC + ENDC BL2 ldx FDSL.A+1,x LSW sector location - IFNE LSN24BIT - bne BL3 - tstb - ENDC - beq Back2Krn -BL3 lbsr HWRead + IFNE LSN24BIT + bne BL3 + tstb + ENDC + beq Back2Krn +BL3 lbsr HWRead inc blockloc,u point to next input sector in mem - - IFGT Level-1 + + IFGT Level-1 lda #'. show .' - jsr <D.BtBug - ENDC - + jsr <D.BtBug + ENDC + ldx seglist,u get pointer to segment list dec FDSL.B+1,x get segment size beq NextSeg if <=0, get next segment - + ldd FDSL.A+1,x update sector location by one - addd #1 + addd #1 std FDSL.A+1,x - IFNE LSN24BIT - ldb FDSL.A,x - adcb #0 - stb FDSL.A,x - ENDC - bra BL2 - + IFNE LSN24BIT + ldb FDSL.A,x + adcb #0 + stb FDSL.A,x + ENDC + bra BL2 + NextSeg leax FDSL.S,x advance to next segment entry - bra BootLoop + bra BootLoop
--- a/level1/modules/boot_d64.asm Wed Nov 30 22:10:56 2016 +0000 +++ b/level1/modules/boot_d64.asm Sun Dec 04 21:01:42 2016 +0000 @@ -1,480 +1,469 @@ -* +******************************************************************** * Boot_d64, bootfile for Dragon 32/64, Dragon Alpha/Professional. -* +* Provides HWInit, HWTerm, HWRead which are called by code in +* "use"d boot_common.asm +* * 2004-11-07, P.Harvey-Smith. -* First disasembly and porting +* First disasembly and porting * * 2004-11-09, P.Harvey-Smith. -* Dragon Alpha code, I am not sure of how to disable NMI -* on the Alpha, it is simulated in software using the NMIFlag. +* Dragon Alpha code, I am not sure of how to disable NMI +* on the Alpha, it is simulated in software using the NMIFlag. * * See DDisk.asm for a fuller discription of how Dragon Alpha * interface works. * * 2004-11-25, P.Harvey-Smith. -* Double sided Disk code added +* Double sided Disk code added * -* 2005-05-08, P.Harvey-Smith, -* Added code to force 5/8 line low on Alpha so correct clock selected. +* 2005-05-08, P.Harvey-Smith, +* Added code to force 5/8 line low on Alpha so correct clock selected. * * 2005-06-16, P.Harvey-Smith. -* Added NMI enable/disable code, as I know know how to enable/disable -* NMI on the Alpha, having disasembled the Alpha's OS9's ddisk. +* Added NMI enable/disable code, as I know know how to enable/disable +* NMI on the Alpha, having disasembled the Alpha's OS9's ddisk. * * 2005-10-22, P.Harvey-Smith. -* Removed unused user stack variable (u0000). +* Removed unused user stack variable (u0000). * * 2005-12-31, P.Harvey-Smith. -* Converted to using new boot system which can support fragmented -* boot files. +* Converted to using new boot system which can support fragmented +* boot files. * * 2006-01-08, P.Harvey-Smith. -* Fixed up steprate so that it is the same as that specified as the -* default when building NitrOS9, currently the distribution sets -* this to 12ms, as this seems to be the default for both the -* Dragon Data original 5.25" floppies, and for the Sony 3.5" -* drives in the Alpha. This allows NitrOS9 to boot correctly -* on Dragon Data 5.25" drives, and should also make booting on -* the Alpha much more relaiable. +* Fixed up step-rate so that it is the same as that specified as the +* default when building NitrOS9, currently the distribution sets +* this to 12ms, as this seems to be the default for both the +* Dragon Data original 5.25" floppies, and for the Sony 3.5" +* drives in the Alpha. This allows NitrOS9 to boot correctly +* on Dragon Data 5.25" drives, and should also make booting on +* the Alpha much more reliable. * - nam Boot - ttl os9 system module + nam Boot + ttl Dragon 32/64 Boot module * Disassembled 1900/00/00 00:05:56 by Disasm v1.5 (C) 1988 by RML - ifp1 - use defsfile - endc - - IFNE dalpha + IFP1 + use defsfile + ENDC -* Dragon Alpha has a third PIA at FF24, this is used for -* Drive select / motor control, and provides FIRQ from the -* disk controler. + IFNE dalpha +* Dragon Alpha has a third PIA at $FF24, this is used for +* Drive select/motor control, and provides FIRQ from the +* disk controller. -DPPIADA EQU DPPIA2DA -DPPIACRA EQU DPPIA2CRA -DPPIADB EQU DPPIA2DB -DPPIACRB EQU DPPIA2CRB +DPPIADA equ DPPIA2DA +DPPIACRA equ DPPIA2CRA +DPPIADB equ DPPIA2DB +DPPIACRB equ DPPIA2CRB -PIADA EQU DPPIADA+IO ; Side A Data/DDR -PIACRA EQU DPPIACRA+IO ; Side A Control. -PIADB EQU DPPIADB+IO ; Side A Data/DDR -PIACRB EQU DPPIACRB+IO ; Side A Control. +PIADA equ DPPIADA+IO Side A Data/DDR +PIACRA equ DPPIACRA+IO Side A Control. +PIADB equ DPPIADB+IO Side A Data/DDR +PIACRB equ DPPIACRB+IO Side A Control. -;WD2797 Floppy disk controler, used in Alpha Note registers in reverse order ! -DPCMDREG EQU DPCmdRegA ; command/status -DPTRKREG EQU DPTrkRegA ; Track register -DPSECREG EQU DPSecRegA ; Sector register -DPDATAREG EQU DPDataRegA ; Data register +* WD2797 Floppy disk controller, used in Alpha. Note registers in reverse order! +DPCMDREG equ DPCmdRegA command/status +DPTRKREG equ DPTrkRegA Track register +DPSECREG equ DPSecRegA Sector register +DPDATAREG equ DPDataRegA Data register -CMDREG EQU DPCMDREG+IO ; command/status -TRKREG EQU DPTRKREG+IO ; Track register -SECREG EQU DPSECREG+IO ; Sector register -DATAREG EQU DPDATAREG+IO ; Data register - -; Disk IO bitmasks +CMDREG equ DPCMDREG+IO command/status +TRKREG equ DPTRKREG+IO Track register +SECREG equ DPSECREG+IO Sector register +DATAREG equ DPDATAREG+IO Data register -NMIEn EQU NMIEnA -WPCEn EQU WPCEnA -SDensEn EQU SDensEnA -MotorOn EQU MotorOnA - -; Drive selects for non default boot drives. +* Disk IO bitmasks +NMIEn equ NMIEnA +WPCEn equ WPCEnA +SDensEn equ SDensEnA +MotorOn equ MotorOnA -DRVSEL0 EQU Drive0A -DRVSEL1 EQU Drive1A -DRVSEL2 EQU Drive2A -DRVSEL3 EQU Drive3A +* Drive selects for non default boot drives. +DRVSEL0 equ Drive0A +DRVSEL1 equ Drive1A +DRVSEL2 equ Drive2A +DRVSEL3 equ Drive3A - ELSE - -DPPIADA EQU DPPIA1DA -DPPIACRA EQU DPPIA1CRA -DPPIADB EQU DPPIA1DB -DPPIACRB EQU DPPIA1CRB + ELSE +DPPIADA equ DPPIA1DA +DPPIACRA equ DPPIA1CRA +DPPIADB equ DPPIA1DB +DPPIACRB equ DPPIA1CRB -PIADA EQU DPPIADA+IO ; Side A Data/DDR -PIACRA EQU DPPIACRA+IO ; Side A Control. -PIADB EQU DPPIADB+IO ; Side A Data/DDR -PIACRB EQU DPPIACRB+IO ; Side A Control. +PIADA equ DPPIADA+IO Side A Data/DDR +PIACRA equ DPPIACRA+IO Side A Control. +PIADB equ DPPIADB+IO Side A Data/DDR +PIACRB equ DPPIACRB+IO Side A Control. -;WD2797 Floppy disk controler, used in DragonDos. -DPCMDREG EQU DPCmdRegD ; command/status -DPTRKREG EQU DPTrkRegD ; Track register -DPSECREG EQU DPSecRegD ; Sector register -DPDATAREG EQU DPDataRegD ; Data register +* WD2797 Floppy disk controller, used in DragonDos. +DPCMDREG equ DPCmdRegD command/status +DPTRKREG equ DPTrkRegD Track register +DPSECREG equ DPSecRegD Sector register +DPDATAREG equ DPDataRegD Data register -CMDREG EQU DPCMDREG+IO ; command/status -TRKREG EQU DPTRKREG+IO ; Track register -SECREG EQU DPSECREG+IO ; Sector register -DATAREG EQU DPDATAREG+IO ; Data register +CMDREG equ DPCMDREG+IO command/status +TRKREG equ DPTRKREG+IO Track register +SECREG equ DPSECREG+IO Sector register +DATAREG equ DPDATAREG+IO Data register -; Disk IO bitmasks +* Disk IO bitmasks -NMIEn EQU NMIEnD -WPCEn EQU WPCEnD -SDensEn EQU SDensEnD -MotorOn EQU MotorOnD +NMIEn equ NMIEnD +WPCEn equ WPCEnD +SDensEn equ SDensEnD +MotorOn equ MotorOnD -; Drive selects for non default boot drives. +* Drive selects for non default boot drives. -DRVSEL0 EQU Drive0D -DRVSEL1 EQU Drive1D -DRVSEL2 EQU Drive2D -DRVSEL3 EQU Drive3D - - ENDC +DRVSEL0 equ Drive0D +DRVSEL1 equ Drive1D +DRVSEL2 equ Drive2D +DRVSEL3 equ Drive3D + ENDC * Default Boot is from drive 0 -BootDr set DRVSEL0 - IFEQ DNum-1 -BootDr set DRVSEL1 Alternate boot from drive 1 - ENDC - IFEQ DNum-2 -BootDr set DRVSEL2 Alternate boot from drive 2 - ENDC - IFEQ DNum-3 -BootDr set DRVSEL3 Alternate boot from drive 3 - ENDC +BootDr set DRVSEL0 + IFEQ DNum-1 +BootDr set DRVSEL1 Alternate boot from drive 1 + ENDC + IFEQ DNum-2 +BootDr set DRVSEL2 Alternate boot from drive 2 + ENDC + IFEQ DNum-3 +BootDr set DRVSEL3 Alternate boot from drive 3 + ENDC -StepRate EQU 3-STEP Convert OS9 steprate code to WD. +StepRate equ 3-STEP Convert OS9 steprate code to WD. -tylg set Systm+Objct -atrv set ReEnt+rev -rev set $01 +tylg set Systm+Objct +atrv set ReEnt+rev +rev set $01 - mod eom,name,tylg,atrv,start,size -;BuffPtr rmb 2 -;SideSel rmb 1 ; Side select mask -;CurrentTrack rmb 1 ; Current track number + mod eom,name,tylg,atrv,start,size * NOTE: these are U-stack offsets, not DP -seglist rmb 2 pointer to segment list -blockloc rmb 2 pointer to memory requested -blockimg rmb 2 duplicate of the above -bootsize rmb 2 size in bytes -LSN0Ptr rmb 2 In memory LSN0 pointer -drvsel rmb 1 -CurrentTrack rmb 1 ; Current track number +seglist rmb 2 pointer to segment list +blockloc rmb 2 pointer to memory requested +blockimg rmb 2 duplicate of the above +bootsize rmb 2 size in bytes +LSN0Ptr rmb 2 In memory LSN0 pointer +drvsel rmb 1 +CurrentTrack rmb 1 Current track number * Note, for optimization purposes, the following two variables * should be adjacent!! -ddtks rmb 1 no. of sectors per track -ddfmt rmb 1 -side rmb 1 side 2 flag +ddtks rmb 1 no. of sectors per track +ddfmt rmb 1 +side rmb 1 side 2 flag -size equ . +size equ . -name equ * - fcs /Boot/ - fcb $00 +name equ * + fcs /Boot/ + fcb $00 * Common booter-required defines -LSN24BIT equ 0 -FLOPPY equ 1 +LSN24BIT equ 0 +FLOPPY equ 1 + + +HWInit clra + ldx #CMDREG Force interrupt + lda #FrcInt + sta ,x + lbsr Delay Wait for command to complete + lda ,x + lda piadb Clear DRQ from WD. -;start equ * - -HWInit clra - ldx #CMDREG ; Force inturrupt - lda #FrcInt - sta ,x - lbsr Delay ; Wait for command to complete - lda ,x - lda piadb ; Clear DRQ from WD. + IFNE dalpha + lda #NMICA2Dis Set PIA2 CA2 as output & disable NMI + sta PIA2CRA + ENDC + + lda #$FF + sta CurrentTrack,u + leax >NMIService,pcr Setup NMI Handler. + stx >D.XNMI+1 + lda #$7E $7E=JMP + sta >D.XNMI + + lda #MotorOn Turn on motor + ora WhichDrv,pcr OR in selected drive + sta drvsel,u save drive selection byte - IFNE dalpha - lda #NMICA2Dis ; Set PIA2 CA2 as output & disable NMI - sta PIA2CRA - ENDC - - lda #$FF - sta CurrentTrack,u - leax >NMIService,pcr ; Setup NMI Handler. - stx >D.XNMI+1 - lda #$7E ; $7E=JMP - sta >D.XNMI - - lda #MotorOn ; Turn on motor - ora WhichDrv,pcr ; OR in selected drive - sta drvsel,u ; save drive selection byte - - IFNE dalpha - lbsr AlphaDskCtl - ELSE - sta >DSKCTL - ENDC - - ldd #$C350 ; Delay while motors spin up -MotorOnDelay - nop - nop - subd #$0001 - bne MotorOnDelay + IFNE dalpha + lbsr AlphaDskCtl + ELSE + sta >DSKCTL + ENDC + + ldd #$C350 Delay while motors spin up +MotorOnDelay + nop + nop + subd #$0001 + bne MotorOnDelay + +HWTerm clrb + rts -HWTerm clrb - rts - - use boot_common.asm + use boot_common.asm + +* +* Reset disk heads to track 0 +* -; -; Reset disk heads to track 0 -; - -ResetTrack0 - clr CurrentTrack,u ; Zero current track - lda #$05 -L00A9 ldb #StpICmnd+StepRate ; Step in - pshs a - lbsr CommandWaitReady - puls a - deca - bne L00A9 - ldb #RestCmnd+StepRate ; Restore to track 0 - lbra CommandWaitReady +ResetTrack0 + clr CurrentTrack,u Zero current track + lda #$05 +L00A9 ldb #StpICmnd+StepRate Step in + pshs a + lbsr CommandWaitReady + puls a + deca + bne L00A9 + ldb #RestCmnd+StepRate Restore to track 0 + lbra CommandWaitReady -; -; Read a sector off disk. -; * HWRead - Read a 256 byte sector from the device * Entry: Y = hardware address * B = bits 23-16 of LSN * X = bits 15-0 of LSN -* blockloc,u = ptr to 256 byte sector +* blockloc,u = ptr to 256 byte sector * Exit: X = ptr to data (i.e. ptr in blockloc,u) +* Carry Clear = OK, Set = Error + +ReadSec +HWRead + lda #$91 Retry count + bsr ReadDataWithRetry Yes read sector + bcs ReadDataExit And restore Y=LSN0 pointer + ldx blockloc,u + clrb +ReadDataExit + rts -ReadSec -HWRead - lda #$91 ; Retry count - bsr ReadDataWithRetry ; Yes read sector - bcs ReadDataExit ; And restore Y=LSN0 pointer - ldx blockloc,u - clrb -ReadDataExit - rts +ReadDataRetry + bcc ReadDataWithRetry Retry data read if error + pshs x,b,a + bsr ResetTrack0 Recalibrate drive + puls x,b,a + +ReadDataWithRetry + pshs x,b,a + bsr DoReadData Try reading data + puls x,b,a + bcc ReadDataExit No error, return to caller + lsra decrement retry count + bne ReadDataRetry retry read on error + +DoReadData + bsr SeekTrack Seek to correct track + bcs ReadDataExit Error : exit -ReadDataRetry - bcc ReadDataWithRetry ; Retry data read if error - pshs x,b,a - bsr ResetTrack0 ; Recal drive - puls x,b,a - -ReadDataWithRetry - pshs x,b,a - bsr DoReadData ; Try reading data - puls x,b,a - bcc ReadDataExit ; No error, return to caller - lsra ; decrement retry count - bne ReadDataRetry ; retry read on error - -DoReadData - bsr SeekTrack ; Seek to correct track - bcs ReadDataExit ; Error : exit - - ldx blockloc,u ; Set X=Data load address - pshs y,dp,cc - orcc #$50 ; Enable FIRQ=DRQ from WD - lda #$FF ; Make DP=$FF, so access to WD regs faster - tfr a,dp - - lda #$34 - sta <dppia0crb ; Disable out PIA0 IRQ - - lda #$37 - sta <dppiacrb ; Enable FIRQ - lda <dppiadb ; Clear any pending FIRQ - - lda drvsel,u - ora #NMIEn - - IFNE dalpha - lbsr AlphaDskCtl - ELSE - sta <dpdskctl - ENDIF + ldx blockloc,u Set X=Data load address + pshs y,dp,cc + orcc #$50 Enable FIRQ=DRQ from WD + lda #$FF Make DP=$FF, so access to WD regs faster + tfr a,dp + + lda #$34 + sta <dppia0crb Disable out PIA0 IRQ + + lda #$37 + sta <dppiacrb Enable FIRQ + lda <dppiadb Clear any pending FIRQ + + lda drvsel,u + ora #NMIEn - ldb #ReadCmnd ; Issue a read command - orb side,u ; mask in side select - stb <dpcmdreg + IFNE dalpha + lbsr AlphaDskCtl + ELSE + sta <dpdskctl + ENDIF + + ldb #ReadCmnd Issue a read command + orb side,u mask in side select + stb <dpcmdreg - IFNE dalpha - lda #NMICA2En ; Enable NMI - sta <DPPIA2CRA - ENDIF - -ReadDataWait - sync ; Read data from controler, save + IFNE dalpha + lda #NMICA2En Enable NMI + sta <DPPIA2CRA + ENDIF + +ReadDataWait + sync Read data from controller, save ReadDataNow - lda <dpdatareg ; in memory at X - ldb <dppiadb - sta ,x+ - bra ReadDataWait ; We break out with an NMI -; -; NMI service routine. -; + lda <dpdatareg in memory at X + ldb <dppiadb + sta ,x+ + bra ReadDataWait We break out with an NMI + +* +* NMI service routine. +* NMIService - - leas R$Size,s ; Drop saved Regs from stack - lda #MotorOn + + leas R$Size,s Drop saved Regs from stack + lda #MotorOn + + IFNE dalpha + lbsr AlphaDskCtl + lda #NMICA2Dis Disable NMI + sta <DPPIA2CRA + ELSE + sta <dpdskctl + ENDIF - IFNE dalpha - lbsr AlphaDskCtl - lda #NMICA2Dis ; Disable NMI - sta <DPPIA2CRA - ELSE - sta <dpdskctl - ENDIF + lda #$34 Disable FIRQ inturrupt + sta <dppiacrb + ldb <dpcmdreg + puls y,dp,cc + + bitb #$04 Check for error + lbeq L015A +L011A comb + ldb #$F4 + rts + +* +* Seek to a track, at this point Y still points to +* in memory copy of LSN0 (if not reading LSN0 !). +* - lda #$34 ; Disable FIRQ inturrupt - sta <dppiacrb - ldb <dpcmdreg - puls y,dp,cc - - bitb #$04 ; Check for error - lbeq L015A -L011A comb - ldb #$F4 - rts - -; -; Seek to a track, at this point Y still points to -; in memory copy of LSN0 (if not reading LSN0 !). -; - -SeekTrack - ldy LSN0Ptr,u ; Get LSN0 pointer - tfr x,d - cmpd #$0000 ; LSN0 ? - beq SeekCalcSkip - clr ,-s ; Zero track counter - bra L012E - -L012C inc ,s -L012E - subd DD.Spt,Y ; Take sectors per track from LSN - bcc L012C ; still +ve ? keep looping - addd DD.Spt,Y ; Compensate for over-loop - puls a ; retrieve track count. +SeekTrack + ldy LSN0Ptr,u Get LSN0 pointer + tfr x,d + cmpd #$0000 LSN0 ? + beq SeekCalcSkip + clr ,-s Zero track counter + bra L012E + +L012C inc ,s +L012E + subd DD.Spt,Y Take sectors per track from LSN + bcc L012C still +ve ? keep looping + addd DD.Spt,Y Compensate for over-loop + puls a retrieve track count. -; At this point the A contains the track number, -; and B contains the sector number on that track. +* At this point the A contains the track number, +* and B contains the sector number on that track. -SeekCalcSkip - pshs b ; Save sector number +SeekCalcSkip + pshs b Save sector number - LDB DD.Fmt,Y ; Is the media double sided ? - LSRB - BCC DiskSide0 ; skip if not + ldb DD.Fmt,Y Is the media double sided ? + lsrb + bcc DiskSide0 skip if not - LSRA ; Get bit 0 into CC, and divide track by 2 - BCC DiskSide0 ; Even track no so it's on side 0 - ldb #Sid2Sel ; Odd track so on side 1, flag it - bra SetSide - + lsra Get bit 0 into CC, and divide track by 2 + bcc DiskSide0 Even track no so it's on side 0 + ldb #Sid2Sel Odd track so on side 1, flag it + bra SetSide + DiskSide0 - clrb ; Single sided, make sure sidesel set correctly + clrb Single sided, make sure sidesel set correctly SetSide - stb side,U ; Set side - - puls b ; Get sector number - incb - stb SECREG - ldb CurrentTrack,u - stb TRKREG - cmpa CurrentTrack,u - beq L0158 - sta CurrentTrack,u - sta DATAREG - ldb #SeekCmnd+3 ; Seek command+ step rate code $13 - bsr CommandWaitReady - pshs x - - ldx #$222E ; Wait for head to settle. -SettleWait - leax -$01,x - bne SettleWait - - puls x -L0158 clrb - rts - -L015A bitb #$98 - bne L011A - clrb - rts - -CommandWaitReady - bsr MotorOnCmdBDelay ; Turn on motor and give command to WD -CommandWait - ldb >CMDREG ; Get command status - bitb #$01 ; finished ? - bne CommandWait ; nope : continue waiting. - rts - -MotorOnCmdB - lda drvsel,u ; Turn on motor - - IFNE dalpha - bsr AlphaDskCtl - ELSE - sta >DSKCTL - ENDIF + stb side,U Set side + + puls b Get sector number + incb + stb SECREG + ldb CurrentTrack,u + stb TRKREG + cmpa CurrentTrack,u + beq L0158 + sta CurrentTrack,u + sta DATAREG + ldb #SeekCmnd+3 Seek command+ step rate code $13 + bsr CommandWaitReady + pshs x + + ldx #$222E Wait for head to settle. +SettleWait + leax -$01,x + bne SettleWait + + puls x +L0158 clrb + rts + +L015A bitb #$98 + bne L011A + clrb + rts + +CommandWaitReady + bsr MotorOnCmdBDelay Turn on motor and give command to WD +CommandWait + ldb >CMDREG Get command status + bitb #$01 finished ? + bne CommandWait nope : continue waiting. + rts + +MotorOnCmdB + lda drvsel,u Turn on motor + + IFNE dalpha + bsr AlphaDskCtl + ELSE + sta >DSKCTL + ENDIF - stb >CMDREG ; Give command from B - rts - -MotorOnCmdBDelay - bsr MotorOnCmdB -Delay lbsr Delay2 -Delay2 lbsr Delay3 -Delay3 rts + stb >CMDREG Give command from B + rts - IFNE dalpha - +MotorOnCmdBDelay + bsr MotorOnCmdB +Delay lbsr Delay2 +Delay2 lbsr Delay3 +Delay3 rts -; -; Turn on drives/motor/nmi for The Dragon Alpha. -; + IFNE dalpha +* +* Turn on drives/motor/nmi for The Dragon Alpha. +* -AlphaDskCtl - PSHS X,A,B,CC +AlphaDskCtl + pshs X,A,B,CC - bita #MotorOn ; test motor on ? - bne MotorRunning + bita #MotorOn test motor on ? + bne MotorRunning - clra ; No, turn off other bits. + clra No, turn off other bits. MotorRunning - anda #Mask58 ; Mask out 5/8 bit to force the use of 5.25" clock - sta -1,s + anda #Mask58 Mask out 5/8 bit to force the use of 5.25" clock + sta -1,s + + orcc #$50 disable inturrupts + + ldx #PIA2DA + lda #AYIOREG AY-8912 IO register + sta 2,X Output to PIA + ldb #AYREGLatch Latch register to modify + stb ,x - orcc #$50 ; disable inturrupts - - ldx #PIA2DA - lda #AYIOREG ; AY-8912 IO register - sta 2,X ; Output to PIA - ldb #AYREGLatch ; Latch register to modify - stb ,x - - clr ,x ; Idle AY - - lda -1,s ; Fetch saved Drive Selects etc - sta 2,x ; output to PIA - ldb #AYWriteReg ; Write value to latched register - stb ,x - - clr ,x - - PULS x,A,B,CC - RTS + clr ,x Idle AY - ENDC + lda -1,s Fetch saved Drive Selects etc + sta 2,x output to PIA + ldb #AYWriteReg Write value to latched register + stb ,x + + clr ,x + + puls x,A,B,CC + rts + ENDC Address fdb DPort WhichDrv fcb BootDr - emod -eom equ * - end + emod +eom equ * + end
--- a/level1/modules/boot_dw.asm Wed Nov 30 22:10:56 2016 +0000 +++ b/level1/modules/boot_dw.asm Sun Dec 04 21:01:42 2016 +0000 @@ -1,5 +1,7 @@ ******************************************************************** * Boot - DriveWire 3 Boot Module +* Provides HWInit, HWTerm, HWRead which are called by code in +* "use"d boot_common.asm * * $Id$ * @@ -12,10 +14,10 @@ NAM Boot TTL DriveWire Boot Module - IFP1 + IFP1 USE defsfile USE drivewire.d - ENDC + ENDC tylg SET Systm+Objct atrv SET ReEnt+rev @@ -51,26 +53,27 @@ ************************************************************ * Hardware-Specific Booter Area * ************************************************************ -************************************************************ +************************************************************ * HWInit - Initialize the device * Entry: Y = hardware address * Exit: Carry Clear = OK, Set = Error * B = error (Carry Set) -HWInit +HWInit use dwinit.asm -HWTerm clrb - rts +HWTerm clrb + rts * HWRead - Read a 256 byte sector from the device * Entry: Y = hardware address * B = bits 23-16 of LSN * X = bits 15-0 of LSN -* blockloc,u = ptr to 256 byte sector +* blockloc,u = ptr to 256 byte sector * Exit: X = ptr to data (i.e. ptr in blockloc,u) -HWRead +* Carry Clear = OK, Set = Error +HWRead pshs cc,d,x * Send out op code and 3 byte LSN lda #OP_READEX load A with READ opcode @@ -85,27 +88,27 @@ bsr DWRead read bytes from server bcs ReadEr branch if framing error bne ReadEr2 - + * Send two byte checksum pshs y - leax ,s - ldy #2 - lbsr DWWrite - ldy #1 - bsr DWRead - leas 2,s - bcs ReadEx - bne ReadEr2 - ldb ,s - beq ReadEx - cmpb #E_CRC - bne ReadEr + leax ,s + ldy #2 + lbsr DWWrite + ldy #1 + bsr DWRead + leas 2,s + bcs ReadEx + bne ReadEr2 + ldb ,s + beq ReadEx + cmpb #E_CRC + bne ReadEr lda #OP_REREADEX bra Read2 ReadEx EQU * leas 5,s eat stack ldx blockloc,u - clrb + clrb rts ReadEr2 ldb #E$Read ReadEr @@ -116,12 +119,22 @@ USE dwread.asm USE dwwrite.asm - IFGT Level-1 -Pad FILL $39,$1D0-3-2-1-* - ENDC + IFGT Level-1 +* L2 kernel file is composed of rel, boot, krn. The size of each of these +* is controlled with filler, so that (after relocation): +* rel starts at $ED00 and is $130 bytes in size +* boot starts at $EE30 and is $1D0 bytes in size +* krn starts at $F000 and ends at $FEFF (there is no 'emod' at the end +* of krn and so there are no module-end boilerplate bytes) +* +* Filler to get to a total size of $1D0. 3, 2, 1 represent bytes after +* the filler: the end boilerplate for the module, fdb and fcb respectively. +Filler FILL $39,$1D0-3-2-1-* + ENDC Address FDB $0000 WhichDrv FCB $00 - EMOD + + EMOD eom EQU * - END + END
--- a/level1/modules/boot_ide.asm Wed Nov 30 22:10:56 2016 +0000 +++ b/level1/modules/boot_ide.asm Sun Dec 04 21:01:42 2016 +0000 @@ -1,5 +1,7 @@ ******************************************************************** * Boot - IDE Boot Module +* Provides HWInit, HWTerm, HWRead which are called by code in +* "use"d boot_common.asm * * $Id$ * @@ -31,21 +33,21 @@ * a OS9Boot file off of the real NitrOS-9 volume without need * of the OS9Boot file being stored in the HDBDOS virtual drive - NAM Boot - TTL IDE Boot Module + NAM Boot + TTL IDE Boot Module - IFP1 + IFP1 USE defsfile USE ide.d - ENDC + ENDC tylg SET Systm+Objct atrv SET ReEnt+rev rev SET $00 edition SET 9 -* Disassembled 94/06/25 11:37:47 by Alan DeKok -* ReDone by Paul T. Barton 99/08/17, for IDE +* Disassembled 94/06/25 11:37:47 by Alan DeKok +* ReDone by Paul T. Barton 99/08/17, for IDE MOD eom,name,tylg,atrv,start,size @@ -61,9 +63,9 @@ bootloc RMB 3 sector pointer; not byte pointer bootsize RMB 2 size in bytes LSN0Ptr RMB 2 LSN0 pointer (used by boot_common.asm) - IFDEF DEBLOCK + IFDEF DEBLOCK HalfSect RMB 1 - ENDC + ENDC size EQU . name FCS /Boot/ @@ -109,7 +111,7 @@ ldb #43 l@ tst DataReg,y lda Latch,y - decb + decb bne l@ * A holds byte with LBA bit anda #%00000010 LBA drive? @@ -119,37 +121,38 @@ stb mode,u nope@ ldb #256-50 o@ tst DataReg,y - decb + decb bne o@ -HWTerm clrb - rts +HWTerm clrb + rts * HWRead - Read a 256 byte sector from the device * Entry: Y = hardware address * B = bits 23-16 of LSN * X = bits 15-0 of LSN -* blockloc,u = ptr to 256 byte sector +* blockloc,u = ptr to 256 byte sector * Exit: X = ptr to data (i.e. ptr in blockloc,u) -HWRead +* Carry Clear = OK, Set = Error +HWRead pshs x,b b@ tst Status,y - bmi b@ if =1 then loop - IFDEF DEBLOCK + bmi b@ if =1 then loop + IFDEF DEBLOCK clra clear A so we can hold half sector flag lsr ,s ok shift the 3 bytes on stack that ror 1,s hold LSN to the right to create a ror 2,s divide by 2. Then put last bit in rola A for use as the half sector flag sta HalfSect,u then store the flag on the stack - ENDC + ENDC lda mode,u - sta DevHead,y 0L0d/0hhh device=CHS -r@ ldb Status,y is IDE ready for commands? - andb #BusyBit+DrdyBit ready ? + sta DevHead,y 0L0d/0hhh device=CHS +r@ ldb Status,y is IDE ready for commands? + andb #BusyBit+DrdyBit ready ? cmpb #DrdyBit bne r@ loop until Drdy=1 and Busy=0 - ldb #$01 only one at a time - stb SectCnt,y only one at a time + ldb #$01 only one at a time + stb SectCnt,y only one at a time anda #%01000000 beq chs@ branch if mode lda ,s get bits 23-16 @@ -158,7 +161,7 @@ stb SectNum,y sta CylLow,y bra DoCmd -chs@ +chs@ * Compute proper C:H:S value lda sides,u get device's head ldb sects+1,u and sector @@ -193,26 +196,26 @@ tfr x,d orb DevHead,y OR in with value written earlier stb DevHead,y -DoCmd lda #S$READ read one sector - sta Command,y finish process +DoCmd lda #S$READ read one sector + sta Command,y finish process -Blk2 lda Status,y is IDE ready to send? - anda #DrqBit DRQ, data request - beq Blk2 loop while DRQ =0 +Blk2 lda Status,y is IDE ready to send? + anda #DrqBit DRQ, data request + beq Blk2 loop while DRQ =0 ldx blockloc,u clr ,s - IFDEF DEBLOCK + IFDEF DEBLOCK lda HalfSect,u load half sector flag cmpa #$01 check to see which routine we beq Blk2Lp need and branch to it. - ENDC -BlkLp - lda DataReg,y A <- IDE + ENDC +BlkLp + lda DataReg,y A <- IDE ldb Latch,y - std ,x++ into RAM + std ,x++ into RAM inc ,s - bpl BlkLp go get the rest + bpl BlkLp go get the rest b@ lda DataReg,y read remaining 256 bytes dec ,s bne b@ @@ -220,11 +223,11 @@ BlkEnx leax -256,x stx 1,s - lda Status,y check for error-bit + lda Status,y check for error-bit clrb puls b,x,pc - IFDEF DEBLOCK + IFDEF DEBLOCK Blk2Lp lda DataReg,y A <- IDE inc ,s Here we toss out the @@ -237,18 +240,18 @@ inc ,s bpl b2@ go get the rest bra BlkEnx - ENDC + ENDC -* ------------------------------------------ +* ------------------------------------------ -*Init +*Init * pshs d,y * ldy <Address,pcr -* bsr ChkBusy could be spinning up... -* lda #Diagnos hits all drives -* sta Command,y ./ -* bsr ChkBusy wait 'til both done -* clrb no errors +* bsr ChkBusy could be spinning up... +* lda #Diagnos hits all drives +* sta Command,y ./ +* bsr ChkBusy wait 'til both done +* clrb no errors * puls d,y,pc * Entry: A = number to show @@ -270,15 +273,22 @@ *s@ jsr <D.BtBug * rts - IFGT Level-1 -Pad FILL $39,$1D0-3-2-1-* - ENDC + IFGT Level-1 +* L2 kernel file is composed of rel, boot, krn. The size of each of these +* is controlled with filler, so that (after relocation): +* rel starts at $ED00 and is $130 bytes in size +* boot starts at $EE30 and is $1D0 bytes in size +* krn starts at $F000 and ends at $FEFF (there is no 'emod' at the end +* of krn and so there are no module-end boilerplate bytes) +* +* Filler to get to a total size of $1D0. 3, 2, 1 represent bytes after +* the filler: the end boilerplate for the module, fdb and fcb respectively. +Filler FILL $39,$1D0-3-2-1-* + ENDC Address FDB SDAddr WhchDriv FCB 0 Drive to use (0 = master, 1 = slave) - - EMOD + EMOD eom EQU * - END - + END
--- a/level1/modules/boot_rampak.asm Wed Nov 30 22:10:56 2016 +0000 +++ b/level1/modules/boot_rampak.asm Sun Dec 04 21:01:42 2016 +0000 @@ -1,6 +1,9 @@ ******************************************************************** * Boot - Disto RAMPak Boot Module * +* Provides HWInit, HWTerm, HWRead which are called by code in +* "use"d boot_common.asm +* * $Id$ * * Edt/Rev YYYY/MM/DD Modified by @@ -20,9 +23,9 @@ * Disassembled 94/06/25 11:37:47 by Alan DeKok - IFP1 + IFP1 use defsfile - ENDC + ENDC tylg set Systm+Objct atrv set ReEnt+rev @@ -46,7 +49,7 @@ bootsize rmb 2 blockloc rmb 2 blockimg rmb 2 -LSN0Ptr rmb 2 In memory LSN0 pointer +LSN0Ptr rmb 2 In memory LSN0 pointer size equ . name equ * @@ -78,7 +81,7 @@ HWTerm lda mpisave,u sta >MPI.Slct clrb - rts + rts * HWRead - Read a 256 byte sector from the device @@ -87,6 +90,7 @@ * X = bits 15-0 of LSN * blockloc,u = ptr to 256 byte sector * Exit: X = ptr to data (i.e. ptr in blockloc,u) +* Carry Clear = OK, Set = Error HWRead tfr x,d move 16 bit LSN into 2 8-bit registers sta 2,y save HB LSN stb 1,y save LB LSN @@ -104,12 +108,21 @@ rts IFGT Level-1 +* L2 kernel file is composed of rel, boot, krn. The size of each of these +* is controlled with filler, so that (after relocation): +* rel starts at $ED00 and is $130 bytes in size +* boot starts at $EE30 and is $1D0 bytes in size +* krn starts at $F000 and ends at $FEFF (there is no 'emod' at the end +* of krn and so there are no module-end boilerplate bytes) +* +* Filler to get to a total size of $1D0. 3, 2, 1 represent bytes after +* the filler: the end boilerplate for the module, fdb and fcb respectively. Pad fill $39,$1D0-3-2-1-* ENDC Address fdb $FF40 address of the device to boot from PakSlot fcb $01 multipak slot number - emod + emod eom equ * - end + end
--- a/level1/modules/boot_scsi.asm Wed Nov 30 22:10:56 2016 +0000 +++ b/level1/modules/boot_scsi.asm Sun Dec 04 21:01:42 2016 +0000 @@ -1,5 +1,7 @@ ******************************************************************** * Boot - SCSI Boot Module +* Provides HWInit, HWTerm, HWRead which are called by code in +* "use"d boot_common.asm * * $Id$ * @@ -46,14 +48,14 @@ * Ded the object to fix that AND the NULL bus address and this code broken. * WhichDrv is now a zero based decimal value passed in by the makefile via ITDNS * Thanks Boisy... - NAM Boot - TTL SCSI Boot Module + NAM Boot + TTL SCSI Boot Module - IFP1 + IFP1 USE defsfile USE rbsuper.d USE scsi.d - ENDC + ENDC tylg SET Systm+Objct atrv SET ReEnt+rev @@ -65,7 +67,7 @@ SCSIEX EQU 1 * Data equates; subroutines must keep data in stack - IFNE SCSIEX + IFNE SCSIEX v$cmd RMB 1 v$extra RMB 1 v$addr0 RMB 1 @@ -76,13 +78,13 @@ v$blks0 RMB 1 v$blks1 RMB 1 v$ctrl RMB 1 - ELSE + ELSE v$cmd RMB 1 v$addr0 RMB 1 v$addr1 RMB 2 v$blks RMB 1 v$opts RMB 1 - ENDC + ENDC seglist RMB 2 pointer to segment list blockloc RMB 2 pointer to memory requested blockimg RMB 2 duplicate of the above @@ -105,33 +107,33 @@ ************************************************************ * Hardware-Specific Booter Area * ************************************************************ -************************************************************ +************************************************************ * HWInit - Initialize the device * Entry: Y = hardware address * Exit: Carry Clear = OK, Set = Error * B = error (Carry Set) -HWInit +HWInit clr >$FF40 stop the disk motors * IFNE D4N1+HDII ?????? - IFNE MPI - leax CntlSlot,pcr point at byte with MPI slot in it - lda ,x get it - sta MPI.Slct and set the MPI to us. - ENDC But this was NOT being done. + IFNE MPI + leax CntlSlot,pcr point at byte with MPI slot in it + lda ,x get it + sta MPI.Slct and set the MPI to us. + ENDC But this was NOT being done. ldd #S$SEEK*256 ldx #0 bsr setup - IFEQ SCSIEX - clr v$blks,u - ENDC + IFEQ SCSIEX + clr v$blks,u + ENDC bra command - + * Sets up the SCSI packet to send * Destroys B setup sta v$cmd,u - IFNE SCSIEX - clr v$extra,u + IFNE SCSIEX + clr v$extra,u clr v$addr0,u stb v$addr1,u stx v$addr2,u @@ -140,13 +142,13 @@ ldb #1 stb v$blks1,u clr v$ctrl,u - ELSE + ELSE stb v$addr0,u stx v$addr1,u ldb #1 stb v$blks,u clr v$opts,u - ENDC + ENDC rts * Sooooo, at end of module, the FF64XX, the XX is not a marching bit @@ -194,6 +196,7 @@ * X = bits 15-0 of LSN * blockloc,u = ptr to 256 byte sector * Exit: X = ptr to data (i.e. ptr in blockloc,u) +* Carry Clear = OK, Set = Error HWRead lda #S$READEX bsr setup * SCSI Send Command Routine @@ -212,23 +215,23 @@ anda #%00001111 pshs a bsr Wait4REQ - clra + clra sta SCSIDATA,y puls a bita #X$BUSY bne command bita #X$ERROR beq HWTerm -reterr comb +reterr comb ldb #E$Unit - rts + rts * HWTerm - Terminate the device * Entry: Y = hardware address * Exit: Carry Clear = OK, Set = Error * B = error (Carry Set) -HWTerm clrb - rts +HWTerm clrb + rts SCSISend bsr Wait4REQ bita #CMD @@ -239,19 +242,19 @@ sta SCSIDATA,y bra SCSISend ckmsg bita #MSG MESSAGE IN (target->initiator) - beq HWTerm + beq HWTerm lda SCSIDATA,y extended message? - deca + deca * * MESSAGE IN phase code * bne SCSISend ldb SCSIDATA,y get extended message length l@ tst SCSIDATA,y read extended message - decb + decb bne l@ bra reterr return with carry set - + Wait4REQ loop@ lda SCSISTAT,y bita #REQ @@ -261,10 +264,10 @@ * Patch to allow booting from sector sizes > 256 bytes - BGP 08/16/97 * We ignore any bytes beyond byte 256, but continue to read them from * the SCSIDATA until the CMD bit is set. -read +read * next 2 lines added clrb +++ use B as counter -read2 +read2 bsr Wait4REQ bita #CMD bne HWTerm @@ -275,7 +278,7 @@ incb +++ bne read2 +++ leax -256,x -read3 +read3 bsr Wait4REQ +++ bita #CMD +++ bne HWTerm +++ @@ -283,24 +286,35 @@ bra read3 +++ - IFGT Level-1 + IFGT Level-1 +* L2 kernel file is composed of rel, boot, krn. The size of each of these +* is controlled with filler, so that (after relocation): +* rel starts at $ED00 and is $130 bytes in size +* boot starts at $EE30 and is $1D0 bytes in size +* krn starts at $F000 and ends at $FEFF (there is no 'emod' at the end +* of krn and so there are no module-end boilerplate bytes) +* +* Filler to get to a total size of $1D0. 3, 1, 2, 1 represent bytes after +* the filler: the end boilerplate for the module, fcb, fdb and fcb respectively. * Fillers to get to $1D0 -Pad FILL $39,$1D0-3-1-2-1-* - ENDC +Filler FILL $39,$1D0-3-1-2-1-* + ENDC + * rev1, add selections for MPI slot and bus address of drive * 2012\11\05 Gene Heskett * The default SCSI ID is here, but first do MPI slot - IFEQ MPI-1 + IFEQ MPI-1 CntlSlot FCB SDMPI - ELSE + ELSE CntrSlot FCB $FF - ENDC + ENDC Address FDB SDAddr * So now, this can be a base zero decimal value! - IFNDEF ITDNS + IFNDEF ITDNS ITDNS EQU 0 - ENDC + ENDC WhichDrv FCB ITDNS + EMOD eom EQU * END
--- a/level1/modules/boot_sdc.asm Wed Nov 30 22:10:56 2016 +0000 +++ b/level1/modules/boot_sdc.asm Sun Dec 04 21:01:42 2016 +0000 @@ -1,5 +1,7 @@ ******************************************************************** * Boot - CoCo SDC Boot module +* Provides HWInit, HWTerm, HWRead which are called by code in +* "use"d boot_common.asm * * $Id$ * @@ -112,7 +114,7 @@ * * Exit: * X = ptr to data (i.e. ptr in blockloc,u) -* Carry set => ERROR +* Carry Clear = OK, Set = Error * * multicomp09: * for now, the image starts at SDcard block $02.8000 @@ -230,7 +232,15 @@ *-------------------------------------------------------------------------- IFGT Level-1 -* Filler to get $1D0 +* L2 kernel file is composed of rel, boot, krn. The size of each of these +* is controlled with filler, so that (after relocation): +* rel starts at $ED00 and is $130 bytes in size +* boot starts at $EE30 and is $1D0 bytes in size +* krn starts at $F000 and ends at $FEFF (there is no 'emod' at the end +* of krn and so there are no module-end boilerplate bytes) +* +* Filler to get to a total size of $1D0. 3, 2, 1 represent bytes after +* the filler: the end boilerplate for the module, fdb and fcb respectively. Filler fill $39,$1D0-3-2-1-* ENDC
--- a/level1/modules/boot_wd1002.asm Wed Nov 30 22:10:56 2016 +0000 +++ b/level1/modules/boot_wd1002.asm Sun Dec 04 21:01:42 2016 +0000 @@ -30,9 +30,9 @@ *! $03=18mS/6.0mS ! $07=10mS/4.0mS ! $0B=04mS/2.0mS ! $0F=15uS/ 35uS ! *+------------------+------------------+------------------+------------------+ - IFP1 + IFP1 use defsfile - ENDC + ENDC * These equates should not have to be changed: BEdtn equ 2 @@ -119,14 +119,14 @@ cmpa #$07 legal drive number? blo InitPIA yes, go initialize PIA... UnitErr ldb #E$Unit - coma - rts + coma + rts DumpRead clr PB,y set WD address to sector buffer DumpR0 lda WDData,y get a byte from WD sector buffer decb done yet? bne DumpR0 no, go dump another byte - rts + rts LSN0Info ldb #DD.FMT load number of bytes to dump bsr DumpRead go dump LSN0 up to DD.FMT lda WDData,y get DD.FMT (disk density, sides) @@ -149,7 +149,7 @@ bsr DumpRead go dump LSN0 from DD.DAT to number of sides in option table lda WDData,y get number of sides from DD.OPT section sta U.Sides,u -GotInfo rts +GotInfo rts InitPIA clr CRA,y enable PIA DDRA ldd #$033E [A]=DDRA: PA bits 7-2 = inputs, bits 1-0 = outputs @@ -223,7 +223,7 @@ ReadErr ldb #E$Read coma set Carry for error leas BootMem,s restore stack pointer - rts + rts ChkBtMSB tst U.BT,u boot file LSN MSB = 0? beq GotCyl yes, go determine head number dec U.BT,u decrement boot file LSN MSB @@ -277,7 +277,7 @@ ldd U.BSZ,u get boot file size ldx U.BtStrt,u get boot file start address BtExit0 leas BootMem,s restore stack pointer - rts + rts GetSctr bsr SetupTF go set up WD task files (except command) lda #ReadSctr load WD read sector command code @@ -297,10 +297,10 @@ stb PB,y set WD error register address ldb WDData,y get error register contents bne BWErr -NoError clrb - rts +NoError clrb + rts BWErr comb error, set [CC] Carry... - rts + rts SetupTF ldd #$01*256+SctrCnt single sector commands only bsr TFUpdat @@ -325,14 +325,21 @@ ldb #SDHReg TfUpdat stb PB,y set WD register address sta WDData,y write data to WD 1002-05 - rts + rts - IFGT Level-1 -* Pad Boot module out to $01D0 exactly -Pad fill $39,$1D0-3-* - ENDC + IFGT Level-1 +* L2 kernel file is composed of rel, boot, krn. The size of each of these +* is controlled with filler, so that (after relocation): +* rel starts at $ED00 and is $130 bytes in size +* boot starts at $EE30 and is $1D0 bytes in size +* krn starts at $F000 and ends at $FEFF (there is no 'emod' at the end +* of krn and so there are no module-end boilerplate bytes) +* +* Filler to get to a total size of $1D0. 3 represents bytes after +* the filler: the end boilerplate for the module. +Filler fill $39,$1D0-3-* + ENDC - emod + emod BEnd equ * - end - + end