Mercurial > hg > Members > kono > nitros9-code
changeset 737:f5740daaf828
With new clock module from NitrOS, these are no longer needed
| author | boisy |
|---|---|
| date | Sun, 05 Jan 2003 23:58:30 +0000 |
| parents | 5126a1921409 |
| children | 7bac2d08d4bd |
| files | level2/modules/clock2_146818.asm level2/modules/clock2_bb.asm level2/modules/clock2_disto.asm level2/modules/clock2_soft.asm level2/modules/clock2_swatch.asm |
| diffstat | 5 files changed, 0 insertions(+), 829 deletions(-) [+] |
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--- a/level2/modules/clock2_146818.asm Sun Jan 05 23:55:43 2003 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,127 +0,0 @@ -******************************************************************** -* Clock2 - Motorola 146818 clock driver -* -* $Id$ -* -* Ed. Comments Who YY/MM/DD -* ------------------------------------------------------------------ -* 1 Created BRI 88/10/06 -* 2 Shift D.Tick & exit if UIP (not wait up to -* 2228 uS for completion), general clean up BRI 88/11/17 -* 3 Re-wrote clock access to eliminate repeated -* subroutine calls to increase speed BRI 88/11/26 -* 4 Changed clock access to once per minute BRI 89/03/25 -* 5 More changes BRI 90/04/15 - - nam Clock2 - ttl Motorola 146818 clock driver - -edition equ 5 -MPISlot equ $33 (MPI Slot $00-$33) - - ifp1 - use defsfile - endc - -ClkAddr equ $FF72 clock base address -Vrsn equ 1 -SpeedClk equ $20 32.768 KHz, rate=0 -StartClk equ $06 binary, 24 Hour, DST disabled -StopClk equ $86 bit 7 set stops clock to allow setting t - -* MC146818/DS1287 clock register map: - org $00 -CRegSec rmb $01 seconds register -CRegSAl rmb $01 seconds alarm register -CRegMin rmb $01 minutes register -CRegMAl rmb $01 minutes alarm register -CRegHour rmb $01 hours register -CRegHAl rmb $01 hours alarm register -CRegDayW rmb $01 day of week register -CRegDayM rmb $01 day of month register -CRegMnth rmb $01 months register -CRegYear rmb $01 years register -CRegA rmb $01 bits 7-0: UIP (read only); DV2-DV0; RS3- -CRegB rmb $01 bits 7-0: SET; PIE; AIE; UIE; SQWE; DM; -CRegC rmb $01 bits 7-0: IRQF; PF; AF; UF; Unused3-Unus -CRegD rmb $01 bits 7-0: VRT; Unused6-Unused0 -CSRAM rmb $40-. CMOS static RAM - - mod CSize,CNam,Systm+Objct,ReEnt+Vrsn,Entry,ClkAddr - -CNam fcs "Clock2" - fcb edition -*RTCSlot fcb MPISlot - -Entry bra Init clock hardware initialization gets time - nop maintain 3 byte entry table spacing - bra GetTime get hardware time - nop save a couple cycles with short branch a -SetTime clrb no error for return... - pshs cc,d,x,y,u save regs which will be altered - ldx <M$Mem,pcr get clock base addr - leay <SetTable,pcr point [Y] to RTC register set table - ldu #D.Time point [U] to time variables in DP - ldb #(SetEnd-SetTable)/2 get loop count - stb R$B,s save counter to B reg on stack - orcc #IntMasks disable IRQs while setting clock -CSetLoop ldd ,y++ get clock set data - bmi CRegSet [A] Sign bit set, go save [B] to clock requirement - ldb b,u get system time from D.Time variables -CRegSet anda #^Sign clear sign bit - std ,x generate clock address strobe, store dat - dec R$B,s done all clock regs? - bne CSetLoop no, go do next... -L003A ldb #$01 - stb <$002E - puls cc,d,x,y,u,pc restore altered regs, return to caller - -SetTable equ * - fcb Sign+CRegB,StopClk - fcb Sign+CRegA,SpeedClk -GetTable equ * - fcb CRegYear,D.Year-D.Time - fcb CRegMnth,D.Month-D.Time - fcb CRegDayM,D.Day-D.Time - fcb CRegHour,D.Hour-D.Time - fcb CRegMin,D.Min-D.Time - fcb CRegSec,D.Sec-D.Time -GetEnd equ * - fcb Sign+CRegDayW,$01 - fcb Sign+CRegHAl,$00 - fcb Sign+CRegMAl,$00 - fcb Sign+CRegSAl,$00 - fcb Sign+CRegB,StartClk -SetEnd equ * - -Init ldb #59 last second in minute - stb <D.Sec force RTC read - -GetTime clrb no error for return... - pshs cc,d,x,y,u save regs which will be altered - ldb <D.Sec get current second - incb next... - cmpb #60 done minute? - bhs CGetT00 yes, go read RTC... - stb <D.Sec set new second - bra CGExit go clean up & return -CGetT00 ldx <M$Mem,pcr get clock base addr - lda #CRegA RTC Update In Progress status register - sta ,x generate address strobe - lda 1,x get UIP status - bmi L003A RTC Update In Progress (1:449 chance), go shft D.Ticki - leay <GetTable,pcr point [Y] to RTC "get" register info table - ldu #D.Time point [U] to time variables in DP - ldb #$06 - stb R$B,s save counter to B reg on stack -CGetLoop ldd ,y++ get clock register info from table - sta ,x generate clock address strobe - lda 1,x get clock data - sta b,u save data to D.Time variables - dec R$B,s done all D.Time vars? - bne CGetLoop no, go do next... -CGExit puls cc,d,x,y,u,pc recover regs, return to caller - - emod -CSize equ * - end
--- a/level2/modules/clock2_bb.asm Sun Jan 05 23:55:43 2003 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,154 +0,0 @@ -******************************************************************** -* Clock2 - Burke & Burke/TC^3 clock driver -* -* $Id$ -* -* Ed. Comments Who YY/MM/DD -* ------------------------------------------------------------------ -* 1 Created BGP 02/10/10 - - nam Clock2 - ttl Burke & Burke/TC^3 clock driver - - ifp1 - use defsfile - endc - -rev set 1 -edition set 1 - -RTC.Zero equ -4 Send zero bit by writing this offset -RTC.One equ -3 Send one bit by writing this offset -RTC.Read equ 0 Read data from this offset - - ifne TC3 -RTC.Base equ $FF7C We map the clock into this addr - else -MPIFlag set 1 -RTCMPSlt equ $22 MPI Slot ($00-$33) where RTC is -RTC.Base equ $FF5C Burke & Burke - endc - - mod CSize,CNam,Systm+Objct,ReEnt+rev,Entry,RTC.Base - -CNam fcs "Clock2" - fcb edition edition byte - ifeq TC3 -SlotSlct fcb RTCMPSlt slot constant for MPI select code - endc - -Entry bra Init clock hardware initialization - nop maintain 3 byte entry table spacing - bra ReadRTC get hardware time - nop save a couple cycles with short branch a - bra SetTime set hardware time - -* SetTime -SetTime ldx R$X,u - ldd ,x - std <D.Year - ldd 2,x - std <D.Day - ldd 4,x - std <D.Min - andcc #^Carry - pshs d,x,y,u,cc - leay SendBCD,pcr - lbra TfrTime - rts - -GetTime ldb <D.Sec get seconds - incb - cmpb #60 - beq ReadRTC if zero, get SmartWatch time - stb <D.Sec else update second - rts - -Init -ReadRTC pshs d,x,y,u,cc save regs which will be altered - leay ReadBCD,pcr Read bytes of clock - -TfrTime orcc #IntMasks turn off interrupts - ldu M$Mem,pcr Get base address - - IFNE MPIFlag - ldb >MPI.Slct Select slot - pshs b - andb #$F0 - orb SlotSlct,pcr - stb >MPI.Slct - ENDC - - lbsr SendMsg Initialize clock - ldx #D.Sec - ldb #8 Tfr 8 bytes - -tfrloop jsr ,y Tfr 1 byte - bitb #$03 - beq skipstuf Skip over day-of-week, etc. - leax -1,x -skipstuf decb - bne tfrloop - - IFNE MPIFlag - puls b - stb >MPI.Slct restore MPAK slot - ENDC - - puls d,x,y,u,cc,pc - -ClkMsg fcb $C5,$3A,$A3,$5C,$C5,$3A,$A3,$5C - -* Enable clock with message $C53AA35CC53AA35C -SendMsg lda RTC.Read,u Send Initialization message to clock - leax <ClkMsg,pcr - ldb #8 -msgloop lda ,x+ - bsr SendByte - decb - bne msgloop - rts - -SendBCD pshs b Send byte to clock, first converting to BCD - bitb #$03 - bne BCDskip Send zero for day-of-week, etc. - lda #0 - bra SndBCDGo -BCDskip lda ,x -SndBCDGo tfr a,b - bra binenter -binloop adda #6 -binenter subb #10 - bhs binloop - puls b -SendByte coma Send one byte to clock - rora - bcc sendone -sendzero tst RTC.Zero,u - lsra - bcc sendone - bne sendzero - rts -sendone tst RTC.One,u - lsra - bcc sendone - bne sendzero - rts - -ReadBCD pshs b - ldb #$80 High bit will rotate out after we read 8 bits -readbit lda RTC.Read,u Read a bit - lsra - rorb Shift it into B - bcc readbit Stop when marker bit appears - tfr b,a - bra BCDEnter Convert BCD number to Binary -BCDLoop subb #6 by subtracting 6 for each $10 -BCDEnter suba #$10 - bhs BCDLoop - stb ,x - puls b,pc - - emod -CSize equ * - end
--- a/level2/modules/clock2_disto.asm Sun Jan 05 23:55:43 2003 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,157 +0,0 @@ -******************************************************************** -* Clock2 - Disto 2N1/4N1 clock driver -* -* $Id$ -* -* Ed. Comments Who YY/MM/DD -* ------------------------------------------------------------------ -* 1 MPI slot dependent Disto RTC where edition BRI 89/10/12 -* byte is really MPI slot code. - - nam Clock2 - ttl Disto 2N1/4N1 clock driver - - ifp1 - use defsfile - endc - -tylg set Systm+Objct -atrv set ReEnt+rev -rev set 1 -edition set 3 - - -RTCMPSlt equ $33 -RTCBase equ $FF50 clock base address - - mod eom,name,tylg,atrv,start,RTCBase - -name fcs "Clock2" - fcb edition -MPISlot fcb RTCMPSlt - -start bra Init - nop - bra GetTime - nop - lbra SetTime - -Init pshs x,a,cc - ldx M$Mem,pcr get hw addr of disto clock - orcc #IntMasks mask IRQ and FIRQ - sta >$FFD8 slow down CoCo 3 to .89MHz - ldb >MPI.Slct get current MPI slot - pshs b save it - lda >MPISlot,pcr get our slot selection - sta >MPI.Slct select it! - ldd #$010F - stb 1,x - sta ,x - ldd #$0504 - sta ,x - stb ,x - puls b get original slot - stb >MPI.Slct select it! - stb >$FFD9 speed Coco 3 up to 1.78MHz - ldb #59 last second in minute - stb <D.Sec force RTC read - puls x,a,cc fall through to RTC read ebelow - -GetTime clrb return no error - pshs u,y,x,b,a,cc save regs to be altered - ldb <D.Sec get current second - incb next... - cmpb #60 minute done? - bcc L005E yes, go read RTC... - stb <D.Sec set new second - bra GTExit go clean up & return -L005E ldx M$Mem,pcr get clock base addr - orcc #IntMasks - sta >$FFD8 - ldb >MPI.Slct - pshs b - lda >MPISlot,pcr - sta >MPI.Slct - ldy #D.Time - ldb #$0B - bsr L0098 - bsr L0098 - bsr L0098 - ldb #$05 - stb 1,x - decb - lda ,x - anda #$03 - bsr L009F - bsr L0098 - bsr L0098 - puls b - stb >MPI.Slct - stb >$FFD9 -GTExit puls pc,u,y,x,b,a,cc recover regs & return - -L0098 stb $01,x - decb - lda ,x - anda #$0F -L009F pshs b - ldb #$0A - mul - pshs b - ldb $01,s - stb $01,x - lda ,x - anda #$0F - adda ,s+ - puls b - decb - sta ,y+ - rts - -SetTime clrb no error for return... - pshs u,y,x,b,a,cc save regs to be altered - ldx M$Mem,pcr get clock base addres - orcc #IntMasks - sta >$FFD8 - ldb >MPI.Slct - pshs b - lda >MPISlot,pcr - sta >MPI.Slct - ldy #D.Time - ldb #$0B - bsr L00EA - bsr L00EA - bsr L00EA - bsr L00EA - bsr L00EA - bsr L00EA - puls b - stb >MPI.Slct - stb >$FFD9 - puls pc,u,y,x,b,a,cc restore altered regs & return - -L00EA stb $01,x - decb - clra - pshs b,a - ldb ,y+ - clr ,-s -L00F4 subb #$0A - bcs L00FC - inc ,s - bra L00F4 -L00FC addb #$0A - puls a - ora ,s+ - sta ,x - tfr b,a - puls b - stb $01,x - decb - sta ,x - rts - - emod -eom equ * - end -
--- a/level2/modules/clock2_soft.asm Sun Jan 05 23:55:43 2003 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,111 +0,0 @@ -******************************************************************** -* Clock2 - Software clock driver -* -* $Id$ -* -* This clock driver is not only Y2K compliant, but also will handle -* leap year calculations correctly for all years from 1900 A.D. to -* 2155 A.D. Note that this driver is ONLY valid from 1900-2155 and -* will not handle years outside of this range. -* -* Ed. Comments Who YY/MM/DD -* ------------------------------------------------------------------ -* 1 Obtained source and commented/restructured BGP 98/10/05 -* 2 Fixed leap year assumptions about 1900 and BGP 99/05/02 -* 2100 so that they do not have Feb. 29 - - nam Clock2 - ttl Software clock driver - -rev set 1 -edition set 2 - - ifp1 - use defsfile - endc - - mod len2,name2,systm+objct,reent+rev,entry,0 - -name2 fcs "Clock2" - fcb edition - -entry bra Init 0 init hardware - nop - bra GetTime 3 get time to D.Time (once a second??) - nop - bra SetTime 6 set time fm D.Time - nop - -* Init and SetTime do nothing for the software clock -Init -SetTime clrb setime must clrb if okay - rts nothing for this guy - -GetTime ldd <D.Min get minutes, seconds -* Second increment - incb secs+1 - cmpb #60 minute yet? - blo L0080 ..no -* Minute increment - inca minute+1 - cmpa #60 hour yet? - blo L007F ..no - ldd <D.Day get day, hour -* Hour increment - incb hour+1 - cmpb #24 day yet? - blo L007C ..no -* Day increment - inca day+1 - leax >months,pcr point to months table - ldb <D.Month this month - cmpa b,x end of month? - bls L007B ..no -* Here we are at the case where the incremented day in A is larger -* than the max day in the month. -* Now's our chance to check for leap year case. - cmpb #2 yes, is it Feb? - bne L006D ..no, ok - ldb <D.Year else get year - beq L006D 1900 has no leap year.. +BGP+ 1999/05/02 - cmpb #200 is year 2100? +BGP+ 1999/05/02 - beq L006D yep, has no leap year.. +BGP+ 1999/05/02 - andb #$03 check for leap year - cmpd #$1D00 29th on leap year? - beq L007B ..yes, skip it -L006D ldd <D.Year else month+1 -* Month increment - incb - cmpb #13 end of year? - blo L0077 ..no -* Year increment -* Note that once A rolls over to 0, it assumes year 1900. - inca year+1 - ldb #$01 set month to jan -L0077 std <D.Year save year, month - lda #$01 day=1st -L007B clrb hour=midnite -L007C std <D.Day save day,hour - clra minute=00 -L007F clrb seconds=00 -L0080 std <D.Min save min,secs - rts - -months fcb $00 - fcb 31 jan - fcb 28 feb - fcb 31 mar - fcb 30 apr - fcb 31 may - fcb 30 jun - fcb 31 jul - fcb 31 aug - fcb 30 sep - fcb 31 oct - fcb 30 nov - fcb 31 dec - - emod -len2 equ * - end -
--- a/level2/modules/clock2_swatch.asm Sun Jan 05 23:55:43 2003 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,280 +0,0 @@ -******************************************************************** -* Clock2 - Dallas Semiconductor 1216E SmartWatch clock driver -* -* $Id$ -* -* Ed. Comments Who YY/MM/DD -* ------------------------------------------------------------------ -* 1 Created BGP 98/10/04 - - nam Clock2 - ttl Dallas Semiconductor 1216E SmartWatch clock driver - - ifp1 - use defsfile - endc - -rev set 1 -edition set 1 - -RTC.Base equ $2000 We map the clock into this addr -RTC.Blok equ $FFA1 Address corresponding to map RTC ROM block into -RTCMPSlt equ $33 MPI Slot ($00-$33) where RTC is - - mod CSize,CNam,Systm+Objct,ReEnt+rev,Entry,RTC.Base - -CNam fcs "Clock2" - fcb edition edition byte -SlotSlct fcb RTCMPSlt slot constant for MPI select code - -Entry bra Init clock hardware initialization - nop maintain 3 byte entry table spacing -* bra GetTime get hardware time - bra ReadSW get hardware time - nop save a couple cycles with short branch a - bra SetTime set hardware time - -* SetTime is not implemented yet -SetTime clrb - rts - -GetTime ldb <D.Sec get seconds - incb - cmpb #60 - beq ReadSW if zero, get SmartWatch time - stb <D.Sec else update second - rts - -Init -ReadSW pshs d,x,y,u save regs which will be altered - - ldx #$003E - ldb #1 - os9 F$MapBlk -* lbcs exx - - pshs cc - -* orcc #IntMasks disable interrupts - lda MPI.Slct get MPI slot - ldb <D.HINIT get GIME shadow of $FF90 - pshs d - lda SlotSlct,pcr - sta MPI.Slct and select it - andb #$FC - stb $FF90 ROM mapping = 16k internal, 16k external - leay SWKey,pcr -*ROMRAM sta >$FFDE put CC3 in ROM mode -* Loop to write 64 bit key to SmartWatch -MapSW lda $04,u read ROM block (trigger SW) -LoopTop ldb #8 B = bit counter (8) - lda ,y+ get byte in key - beq ReadTime if zero, exit -BitLoop lsra move bit 0 to Carry - bcs Write1 if Carry set, write a 1 to SmartWatch - tst ,u else write 0 to SmartWatch - bra LoopCntl -Write1 tst 1,u -LoopCntl decb dec bit counter - beq LoopTop if more bits, continue - bra BitLoop else move to top of loop and get next byte in key - -* Read Time from SmartWatch -ReadTime lda #8 -L00CF ldb #8 - pshs d -L00D3 ldb 4,u - lsrb - rora - dec 1,s dec count (B) on stack - bne L00D3 - -* Convert BCD to a normal number -BCD2Dec clrb -B2DLoop cmpa #$10 - bcs B2DDone - suba #$10 - addb #$0A - bra B2DLoop -B2DDone pshs a - addb ,s+ - - stb 1,s - puls a - deca - bne L00CF -* sta >$FFDF -* Restore original values and unmask interrupts ASAP - ldx #D.Time - ldd ,s get year/Month - std ,x save year/month - lda 2,s get day - sta 2,x save day - ldd 4,s get hour/min - std 3,x save hour/min - lda 6,s get seconds - sta 5,x save seconds - leas 8,s clean stack - puls d get DINIT/MPI slot - sta >MPI.Slct restore org MPI slot - stb >$FF90 restore org GIME INT0 - - puls cc - - ldb #1 - os9 F$ClrBlk - -exx - puls pc,d,x,y,u - -SWKey fcb %11000101,%00111010,%10100011,%01011100 - fcb %11000101,%00111010,%10100011,%01011100 - fcb $00 - - ifeq 1 - - -* Read SmartWatch time -* Entry: Y=copy of stack pointer -ReadSW pshs cc Save interrupt status - orcc #IntMasks Disable interupts - - lda >MPI.Slct Get current MPak slot - ldb <D.HINIT Get current GIME init register - pshs d Save current MPak slot & GIME init register - lda #RTCMPSlt Set MPak to slot 4 (both ROM & IRQ select) - sta >MPI.Slct - andb #$FC Set GIME to use 16K Internal/16K External ROM - stb $FF90 - lda <D.TINIT Get task side - bita #$01 We in task 1? (either GRFDRV or user task) - bne L0207 Yes, adjust myself for it -* If we are in system state, map ROM block into block 2 of Task 0 - ldb RTC.Blok Get current memory block to swap out - pshs d Save it - lda #$3E Get Disk ROM block # - sta RTC.Blok Swap it in - bra ROMRAM Go find Smart watch -* If we are in user state, map ROM block into block 2 of Task 1 -L0207 ldb RTC.Blok+8 Get block # to save - pshs d Preserve Init1 register & block # currently mapped - lda #$3E Get Disk ROM block # - sta RTC.Blok+8 Swap it in - -* Now, switch to ROM mode and swap Smartwatch in -ROMRAM clr $FFDE Switch to all ROM mode -* pshs dp Preserve DP -* lda #$20 Point DP to ROM/Smartwatch block -* tfr a,dp - lbsr MapSW Swap Smarwatch into beginning of ROM block - ldx #D.Sec Point to system seconds - lda #8 Get # registers to read - sta ,-s Save it on stack -* Read bits from SmartWatch -ReadSW ldb #8 Get # of bits -GetBit lda >RTC.Base+4 Get a bit off the smartwatch - lsra Shift it to carry - ror ,x Move it location - decb Done? - bne GetBit No, keep going - lda ,s Get register # - cmpa #$08 Was it the 1/10th second register? - beq L023D Yes skip it and do it again - cmpa #$04 Was it day of week register? - bne L0239 No, go on to next register - ldb ,x Get the day of week - stb <D.Daywk Save it - bra L023D Move to next register - -L0239 leax -1,x Move time packet pointer back - bsr BCD2Dec Convert BCD to hex for current register -L023D dec ,s Done all registers? - bne ReadSW No, go back - leas 1,s Purge stack -* puls dp Get back real DP - clr $FFDF Swap back to all RAM mode - puls d Restore block # - bita #$01 In task 1? - bne L0251 Yes, save block to task 1 - stb RTC.Blok Save block to task 0 - bra L0254 Continue on -L0251 stb RTC.Blok+8 Save block to task 1 -L0254 puls d Restore MPak slot # & GIME init register - sta >MPI.Slct Switch MPak back - stb $FF90 Restore GIME - puls cc,pc Restore interupts & return - -* Convert BCD to Hex -BCD2Dec lda 1,x Get BCD byte - clrb Clear out destination byte -L0261 cmpa #16 0-15? - blo L026B Yes, it's fine - suba #16 Subtract 16 from BCD byte - addb #10 Add 10 to destination byte - bra L0261 keep doing until we are done -L026B pshs a Push leftover onto stack - addb ,s+ Add to current destination byte - stb 1,x Store it back - rts return - - - - - - - - - - - - - - - - -* Enable SmartWatch -* Entry: S is a new stack ptr for temporary use. ROM has been mapped into -* block 2, which will have the Smartwatch mapped into the beginning of -* it after we send out the 'map in Smartwatch' 64 bit sequence -* Y=original stack pointer, DO NOT MODIFY! -* DP must be $20, for direct page addressing -* -* 6809 optomization: Preserve DP on the stack, and then set it for $20 -* Use for $2000/$2001 ops in direct page mode, saving 50+ cycles -* (especially considering interrupts are disabled this whole time!) -* NOTE: all accesses to smartwatch except the init pattern have to be -* READS ONLY, not writes -* 6309: do above, and use LDE instead of TST, as well as F as the counter -* instead of the stack -* - -SWBits fcb %11000101,%00111010,%10100011,%01011100 - fcb %11000101,%00111010,%10100011,%01011100 - -MapSW leax SWBits,pc point to coding table - lda >RTC.Base+4 Reset Smarwatch to expect the map in sequence - lda #8 byte counter - sta ,-s onto stack - -ByteLoop ldb #8 bit counter - lda ,x+ get code byte -BitLoop lsra shift LSBit out - bcs Write1 if a 1 bit, skip ahead - tst >RTC.Base if 0, test 1st byte of ROM we mapped in - bra DecLoop -Write1 tst >RTC.Base+1 if 1 bit, test 2nd byte of ROM we mapped in -DecLoop decb dec bit counter - bne BitLoop keep reading alternate signals until byte is done - dec ,s dec byte counter - bne ByteLoop keep going until entire 64 bit read pattern done - puls a,pc restore regs & return - - - - endc - - emod -CSize equ * - end - -