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1 //===- ARCISelLowering.h - ARC DAG Lowering Interface -----------*- C++ -*-===//
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2 //
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3 // The LLVM Compiler Infrastructure
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4 //
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5 // This file is distributed under the University of Illinois Open Source
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6 // License. See LICENSE.TXT for details.
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7 //
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8 //===----------------------------------------------------------------------===//
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9 //
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10 // This file defines the interfaces that ARC uses to lower LLVM code into a
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11 // selection DAG.
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12 //
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13 //===----------------------------------------------------------------------===//
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14
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15 #ifndef LLVM_LIB_TARGET_ARC_ARCISELLOWERING_H
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16 #define LLVM_LIB_TARGET_ARC_ARCISELLOWERING_H
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17
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18 #include "ARC.h"
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19 #include "llvm/CodeGen/SelectionDAG.h"
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20 #include "llvm/Target/TargetLowering.h"
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21
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22 namespace llvm {
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23
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24 // Forward delcarations
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25 class ARCSubtarget;
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26 class ARCTargetMachine;
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27
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28 namespace ARCISD {
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29
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30 enum NodeType : unsigned {
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31 // Start the numbering where the builtin ops and target ops leave off.
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32 FIRST_NUMBER = ISD::BUILTIN_OP_END,
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33
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34 // Branch and link (call)
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35 BL,
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36
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37 // Jump and link (indirect call)
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38 JL,
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39
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40 // CMP
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41 CMP,
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42
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43 // CMOV
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44 CMOV,
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45
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46 // BRcc
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47 BRcc,
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48
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49 // Global Address Wrapper
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50 GAWRAPPER,
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51
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52 // return, (j_s [blink])
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53 RET
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54 };
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55
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56 } // end namespace ARCISD
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57
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58 //===--------------------------------------------------------------------===//
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59 // TargetLowering Implementation
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60 //===--------------------------------------------------------------------===//
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61 class ARCTargetLowering : public TargetLowering {
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62 public:
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63 explicit ARCTargetLowering(const TargetMachine &TM,
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64 const ARCSubtarget &Subtarget);
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65
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66 /// Provide custom lowering hooks for some operations.
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67 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
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68
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69 /// This method returns the name of a target specific DAG node.
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70 const char *getTargetNodeName(unsigned Opcode) const override;
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71
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72 /// Return true if the addressing mode represented by AM is legal for this
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73 /// target, for a load/store of the specified type.
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74 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,
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75 unsigned AS,
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76 Instruction *I = nullptr) const override;
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77
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78 private:
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79 const TargetMachine &TM;
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80 const ARCSubtarget &Subtarget;
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81
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82 // Lower Operand helpers
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83 SDValue LowerCallArguments(SDValue Chain, CallingConv::ID CallConv,
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84 bool isVarArg,
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85 const SmallVectorImpl<ISD::InputArg> &Ins,
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86 SDLoc dl, SelectionDAG &DAG,
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87 SmallVectorImpl<SDValue> &InVals) const;
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88 // Lower Operand specifics
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89 SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const;
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90 SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const;
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91 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
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92 SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const;
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93 SDValue LowerSIGN_EXTEND_INREG(SDValue Op, SelectionDAG &DAG) const;
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94 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
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95 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
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96
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97 SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv,
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98 bool isVarArg,
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99 const SmallVectorImpl<ISD::InputArg> &Ins,
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100 const SDLoc &dl, SelectionDAG &DAG,
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101 SmallVectorImpl<SDValue> &InVals) const override;
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102
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103 SDValue LowerCall(TargetLowering::CallLoweringInfo &CLI,
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104 SmallVectorImpl<SDValue> &InVals) const override;
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105
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106 SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg,
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107 const SmallVectorImpl<ISD::OutputArg> &Outs,
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108 const SmallVectorImpl<SDValue> &OutVals, const SDLoc &dl,
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109 SelectionDAG &DAG) const override;
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110
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111 bool CanLowerReturn(CallingConv::ID CallConv, MachineFunction &MF,
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112 bool isVarArg,
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113 const SmallVectorImpl<ISD::OutputArg> &ArgsFlags,
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114 LLVMContext &Context) const override;
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115
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116 bool mayBeEmittedAsTailCall(const CallInst *CI) const override;
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117 };
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118
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119 } // end namespace llvm
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120
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121 #endif // LLVM_LIB_TARGET_ARC_ARCISELLOWERING_H
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