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annotate test/CodeGen/ARM/a15-SD-dep.ll @ 100:7d135dc70f03

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LLVM 3.9
author Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
date Tue, 26 Jan 2016 22:53:40 +0900
parents 54457678186b
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1 ; RUN: llc -O1 -mcpu=cortex-a15 -mtriple=armv7-linux-gnueabi -disable-a15-sd-optimization -verify-machineinstrs < %s | FileCheck -check-prefix=CHECK-DISABLED %s
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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2 ; RUN: llc -O1 -mcpu=cortex-a15 -mtriple=armv7-linux-gnueabi -verify-machineinstrs < %s | FileCheck -check-prefix=CHECK-ENABLED %s
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3
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4 ; CHECK-ENABLED-LABEL: t1:
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parents:
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5 ; CHECK-DISABLED-LABEL: t1:
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parents:
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6 define <2 x float> @t1(float %f) {
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7 ; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d0[0]
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parents:
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8 ; CHECK-DISABLED-NOT: vdup.32 d{{[0-9]*}}, d0[0]
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parents:
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9 %i1 = insertelement <2 x float> undef, float %f, i32 1
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parents:
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10 %i2 = fadd <2 x float> %i1, %i1
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11 ret <2 x float> %i2
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12 }
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13
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14 ; CHECK-ENABLED-LABEL: t2:
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parents:
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15 ; CHECK-DISABLED-LABEL: t2:
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16 define <4 x float> @t2(float %g, float %f) {
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17 ; CHECK-ENABLED: vdup.32 q{{[0-9]*}}, d0[0]
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18 ; CHECK-DISABLED-NOT: vdup.32 d{{[0-9]*}}, d0[0]
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19 %i1 = insertelement <4 x float> undef, float %f, i32 1
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20 %i2 = fadd <4 x float> %i1, %i1
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21 ret <4 x float> %i2
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22 }
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23
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24 ; CHECK-ENABLED-LABEL: t3:
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parents:
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25 ; CHECK-DISABLED-LABEL: t3:
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parents:
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26 define arm_aapcs_vfpcc <2 x float> @t3(float %f) {
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27 ; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d0[0]
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28 ; CHECK-DISABLED-NOT: vdup.32 d{{[0-9]*}}, d0[0]
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29 %i1 = insertelement <2 x float> undef, float %f, i32 1
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30 %i2 = fadd <2 x float> %i1, %i1
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31 ret <2 x float> %i2
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32 }
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33
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34 ; CHECK-ENABLED-LABEL: t4:
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35 ; CHECK-DISABLED-LABEL: t4:
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36 define <2 x float> @t4(float %f) {
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37 ; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d0[0]
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38 ; CHECK-DISABLED-NOT: vdup
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39 %i1 = insertelement <2 x float> undef, float %f, i32 1
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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40 br label %b
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41
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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42 ; Block %b has an S-reg as live-in.
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43 b:
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44 %i2 = fadd <2 x float> %i1, %i1
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45 ret <2 x float> %i2
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46 }
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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47
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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48 ; CHECK-ENABLED-LABEL: t5:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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49 ; CHECK-DISABLED-LABEL: t5:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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50 define arm_aapcs_vfpcc <4 x float> @t5(<4 x float> %q, float %f) {
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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51 ; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d{{[0-9]*}}[0]
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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52 ; CHECK-ENABLED: vadd.f32
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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53 ; CHECK-ENABLED-NEXT: bx lr
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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54 ; CHECK-DISABLED-NOT: vdup
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55 %i1 = insertelement <4 x float> %q, float %f, i32 1
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56 %i2 = fadd <4 x float> %i1, %i1
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57 ret <4 x float> %i2
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58 }
77
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59
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60 ; Test that DPair can be successfully passed as QPR.
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61 ; CHECK-ENABLED-LABEL: test_DPair1:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
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62 ; CHECK-DISABLED-LABEL: test_DPair1:
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parents: 0
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63 define void @test_DPair1(i32 %vsout, i8* nocapture %out, float %x, float %y) {
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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64 entry:
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65 %0 = insertelement <4 x float> undef, float %x, i32 1
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parents: 0
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66 %1 = insertelement <4 x float> %0, float %y, i32 0
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parents: 0
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67 ; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d{{[0-9]*}}[0]
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
68 ; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d{{[0-9]*}}[1]
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
69 ; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d{{[0-9]*}}[0]
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
70 ; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d{{[0-9]*}}[1]
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
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71 ; CHECK-DISABLED-NOT: vdup
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parents: 0
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72 switch i32 %vsout, label %sw.epilog [
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73 i32 1, label %sw.bb
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74 i32 0, label %sw.bb6
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75 ]
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76
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77 sw.bb: ; preds = %entry
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78 %2 = insertelement <4 x float> %1, float 0.000000e+00, i32 0
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79 br label %sw.bb6
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80
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81 sw.bb6: ; preds = %sw.bb, %entry
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82 %sum.0 = phi <4 x float> [ %1, %entry ], [ %2, %sw.bb ]
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83 %3 = extractelement <4 x float> %sum.0, i32 0
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84 %conv = fptoui float %3 to i8
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85 store i8 %conv, i8* %out, align 1
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86 ret void
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87
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88 sw.epilog: ; preds = %entry
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89 ret void
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parents: 0
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90 }
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parents: 0
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91
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92 ; CHECK-ENABLED-LABEL: test_DPair2:
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parents: 0
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93 ; CHECK-DISABLED-LABEL: test_DPair2:
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parents: 0
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94 define void @test_DPair2(i32 %vsout, i8* nocapture %out, float %x) {
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95 entry:
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96 %0 = insertelement <4 x float> undef, float %x, i32 0
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97 ; CHECK-ENABLED: vdup.32 q{{[0-9]*}}, d{{[0-9]*}}[0]
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98 ; CHECK-DISABLED-NOT: vdup
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parents: 0
diff changeset
99 switch i32 %vsout, label %sw.epilog [
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100 i32 1, label %sw.bb
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101 i32 0, label %sw.bb1
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parents: 0
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102 ]
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103
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104 sw.bb: ; preds = %entry
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105 %1 = insertelement <4 x float> %0, float 0.000000e+00, i32 0
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106 br label %sw.bb1
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parents: 0
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107
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parents: 0
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108 sw.bb1: ; preds = %entry, %sw.bb
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parents: 0
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109 %sum.0 = phi <4 x float> [ %0, %entry ], [ %1, %sw.bb ]
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110 %2 = extractelement <4 x float> %sum.0, i32 0
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111 %conv = fptoui float %2 to i8
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parents: 0
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112 store i8 %conv, i8* %out, align 1
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
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113 br label %sw.epilog
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parents: 0
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114
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115 sw.epilog: ; preds = %entry, %sw.bb1
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116 ret void
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parents: 0
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117 }