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annotate test/CodeGen/ARM/intrinsics.ll @ 100:7d135dc70f03

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LLVM 3.9
author Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
date Tue, 26 Jan 2016 22:53:40 +0900
parents 95c75e76d11b
children
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95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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1 ; RUN: llc < %s -mtriple=armv7-eabi -mcpu=cortex-a8 | FileCheck %s
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2 ; RUN: llc < %s -march=thumb -mtriple=thumbv7-eabi -mcpu=cortex-a8 | FileCheck %s
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3
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4 define void @coproc() nounwind {
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5 entry:
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6 ; CHECK: mrc
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7 %0 = tail call i32 @llvm.arm.mrc(i32 7, i32 1, i32 1, i32 1, i32 4) nounwind
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8 ; CHECK: mcr
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9 tail call void @llvm.arm.mcr(i32 7, i32 1, i32 %0, i32 1, i32 1, i32 4) nounwind
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10 ; CHECK: mrc2
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11 %1 = tail call i32 @llvm.arm.mrc2(i32 7, i32 1, i32 1, i32 1, i32 4) nounwind
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12 ; CHECK: mcr2
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13 tail call void @llvm.arm.mcr2(i32 7, i32 1, i32 %1, i32 1, i32 1, i32 4) nounwind
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14 ; CHECK: mcrr
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15 tail call void @llvm.arm.mcrr(i32 7, i32 1, i32 %0, i32 %1, i32 1) nounwind
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16 ; CHECK: mcrr2
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17 tail call void @llvm.arm.mcrr2(i32 7, i32 1, i32 %0, i32 %1, i32 1) nounwind
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18 ; CHECK: cdp
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19 tail call void @llvm.arm.cdp(i32 7, i32 3, i32 1, i32 1, i32 1, i32 5) nounwind
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20 ; CHECK: cdp2
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21 tail call void @llvm.arm.cdp2(i32 7, i32 3, i32 1, i32 1, i32 1, i32 5) nounwind
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22 ret void
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23 }
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25 declare void @llvm.arm.cdp2(i32, i32, i32, i32, i32, i32) nounwind
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26
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27 declare void @llvm.arm.cdp(i32, i32, i32, i32, i32, i32) nounwind
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29 declare void @llvm.arm.mcrr2(i32, i32, i32, i32, i32) nounwind
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30
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31 declare void @llvm.arm.mcrr(i32, i32, i32, i32, i32) nounwind
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32
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33 declare void @llvm.arm.mcr2(i32, i32, i32, i32, i32, i32) nounwind
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34
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35 declare i32 @llvm.arm.mrc2(i32, i32, i32, i32, i32) nounwind
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36
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37 declare void @llvm.arm.mcr(i32, i32, i32, i32, i32, i32) nounwind
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38
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39 declare i32 @llvm.arm.mrc(i32, i32, i32, i32, i32) nounwind