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annotate test/CodeGen/ARM/long_shift.ll @ 100:7d135dc70f03

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LLVM 3.9
author Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
date Tue, 26 Jan 2016 22:53:40 +0900
parents 54457678186b
children 803732b1fca8
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
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1 ; RUN: llc -mtriple=arm-eabi %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-LE
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2 ; RUN: llc -mtriple=armeb-eabi %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-BE
0
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3
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4 define i64 @f0(i64 %A, i64 %B) {
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5 ; CHECK-LABEL: f0:
77
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
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6 ; CHECK-LE: lsrs r3, r3, #1
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
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7 ; CHECK-LE-NEXT: rrx r2, r2
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8 ; CHECK-LE-NEXT: subs r0, r0, r2
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
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9 ; CHECK-LE-NEXT: sbc r1, r1, r3
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parents: 0
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10 ; CHECK-BE: lsrs r2, r2, #1
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11 ; CHECK-BE-NEXT: rrx r3, r3
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parents: 0
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12 ; CHECK-BE-NEXT: subs r1, r1, r3
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parents: 0
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13 ; CHECK-BE-NEXT: sbc r0, r0, r2
0
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parents:
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14 %tmp = bitcast i64 %A to i64
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15 %tmp2 = lshr i64 %B, 1
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16 %tmp3 = sub i64 %tmp, %tmp2
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17 ret i64 %tmp3
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18 }
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19
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20 define i32 @f1(i64 %x, i64 %y) {
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21 ; CHECK-LABEL: f1:
77
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22 ; CHECK-LE: lsl{{.*}}r2
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23 ; CHECK-BE: lsl{{.*}}r3
0
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24 %a = shl i64 %x, %y
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25 %b = trunc i64 %a to i32
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26 ret i32 %b
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27 }
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28
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29 define i32 @f2(i64 %x, i64 %y) {
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30 ; CHECK-LABEL: f2:
77
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
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31 ; CHECK-LE: lsr{{.*}}r2
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parents: 0
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32 ; CHECK-LE-NEXT: rsb r3, r2, #32
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parents: 0
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33 ; CHECK-LE-NEXT: sub r2, r2, #32
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34 ; CHECK-LE-NEXT: orr r0, r0, r1, lsl r3
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35 ; CHECK-LE-NEXT: cmp r2, #0
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36 ; CHECK-LE-NEXT: asrge r0, r1, r2
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37
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38 ; CHECK-BE: lsr{{.*}}r3
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parents: 0
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39 ; CHECK-BE-NEXT: rsb r2, r3, #32
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
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40 ; CHECK-BE-NEXT: orr r1, r1, r0, lsl r2
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
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41 ; CHECK-BE-NEXT: sub r2, r3, #32
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parents: 0
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42 ; CHECK-BE-NEXT: cmp r2, #0
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parents: 0
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43 ; CHECK-BE-NEXT: asrge r1, r0, r2
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parents: 0
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44
0
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parents:
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45 %a = ashr i64 %x, %y
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parents:
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46 %b = trunc i64 %a to i32
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parents:
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47 ret i32 %b
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48 }
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49
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50 define i32 @f3(i64 %x, i64 %y) {
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51 ; CHECK-LABEL: f3:
77
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
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52 ; CHECK-LE: lsr{{.*}}r2
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
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53 ; CHECK-LE-NEXT: rsb r3, r2, #32
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
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54 ; CHECK-LE-NEXT: sub r2, r2, #32
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
55 ; CHECK-LE-NEXT: orr r0, r0, r1, lsl r3
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
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56 ; CHECK-LE-NEXT: cmp r2, #0
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
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57 ; CHECK-LE-NEXT: lsrge r0, r1, r2
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
58
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59 ; CHECK-BE: lsr{{.*}}r3
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
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60 ; CHECK-BE-NEXT: rsb r2, r3, #32
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
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61 ; CHECK-BE-NEXT: orr r1, r1, r0, lsl r2
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
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62 ; CHECK-BE-NEXT: sub r2, r3, #32
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
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63 ; CHECK-BE-NEXT: cmp r2, #0
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
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64 ; CHECK-BE-NEXT: lsrge r1, r0, r2
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
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65
0
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parents:
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66 %a = lshr i64 %x, %y
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parents:
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67 %b = trunc i64 %a to i32
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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68 ret i32 %b
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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69 }