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annotate test/CodeGen/Generic/2006-11-20-DAGCombineCrash.ll @ 100:7d135dc70f03

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LLVM 3.9
author Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
date Tue, 26 Jan 2016 22:53:40 +0900
parents afa8332a0e37
children
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95c75e76d11b LLVM 3.4
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1 ; RUN: llc < %s
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2 ; PR1011
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3 %struct.mng_data = type { i8* (%struct.mng_data*, i32)*, i32, i32, i32, i8, i8, i32, i32, i32, i32, i32 }
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4
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5 define void @mng_display_bgr565() {
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6 entry:
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7 br i1 false, label %bb.preheader, label %return
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8
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9 bb.preheader: ; preds = %entry
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10 br i1 false, label %cond_true48, label %cond_next80
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11
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12 cond_true48: ; preds = %bb.preheader
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afa8332a0e37 LLVM 3.8
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13 %tmp = load i8, i8* null ; <i8> [#uses=1]
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14 %tmp51 = zext i8 %tmp to i16 ; <i16> [#uses=1]
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15 %tmp99 = load i8, i8* null ; <i8> [#uses=1]
0
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16 %tmp54 = bitcast i8 %tmp99 to i8 ; <i8> [#uses=1]
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17 %tmp54.upgrd.1 = zext i8 %tmp54 to i32 ; <i32> [#uses=1]
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18 %tmp55 = lshr i32 %tmp54.upgrd.1, 3 ; <i32> [#uses=1]
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19 %tmp55.upgrd.2 = trunc i32 %tmp55 to i16 ; <i16> [#uses=1]
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20 %tmp52 = shl i16 %tmp51, 5 ; <i16> [#uses=1]
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21 %tmp56 = and i16 %tmp55.upgrd.2, 28 ; <i16> [#uses=1]
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22 %tmp57 = or i16 %tmp56, %tmp52 ; <i16> [#uses=1]
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23 %tmp60 = zext i16 %tmp57 to i32 ; <i32> [#uses=1]
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24 %tmp62 = xor i32 0, 65535 ; <i32> [#uses=1]
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25 %tmp63 = mul i32 %tmp60, %tmp62 ; <i32> [#uses=1]
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26 %tmp65 = add i32 0, %tmp63 ; <i32> [#uses=1]
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27 %tmp69 = add i32 0, %tmp65 ; <i32> [#uses=1]
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28 %tmp70 = lshr i32 %tmp69, 16 ; <i32> [#uses=1]
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29 %tmp70.upgrd.3 = trunc i32 %tmp70 to i16 ; <i16> [#uses=1]
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30 %tmp75 = lshr i16 %tmp70.upgrd.3, 8 ; <i16> [#uses=1]
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31 %tmp75.upgrd.4 = trunc i16 %tmp75 to i8 ; <i8> [#uses=1]
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32 %tmp76 = lshr i8 %tmp75.upgrd.4, 5 ; <i8> [#uses=1]
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33 store i8 %tmp76, i8* null
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34 ret void
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35
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36 cond_next80: ; preds = %bb.preheader
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37 ret void
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38
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39 return: ; preds = %entry
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40 ret void
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41 }