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annotate test/CodeGen/NVPTX/arithmetic-fp-sm20.ll @ 100:7d135dc70f03

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LLVM 3.9
author Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
date Tue, 26 Jan 2016 22:53:40 +0900
parents 54457678186b
children
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54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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1 ; RUN: llc < %s -march=nvptx -mcpu=sm_20 -fp-contract=fast | FileCheck %s
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2 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 -fp-contract=fast | FileCheck %s
0
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3
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4 ;; These tests should run for all targets
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5
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6 ;;===-- Basic instruction selection tests ---------------------------------===;;
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7
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8
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9 ;;; f64
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10
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11 define double @fadd_f64(double %a, double %b) {
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12 ; CHECK: add.f64 %fd{{[0-9]+}}, %fd{{[0-9]+}}, %fd{{[0-9]+}}
0
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13 ; CHECK: ret
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14 %ret = fadd double %a, %b
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15 ret double %ret
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16 }
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17
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18 define double @fsub_f64(double %a, double %b) {
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19 ; CHECK: sub.f64 %fd{{[0-9]+}}, %fd{{[0-9]+}}, %fd{{[0-9]+}}
0
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20 ; CHECK: ret
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21 %ret = fsub double %a, %b
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22 ret double %ret
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23 }
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24
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25 define double @fmul_f64(double %a, double %b) {
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26 ; CHECK: mul.f64 %fd{{[0-9]+}}, %fd{{[0-9]+}}, %fd{{[0-9]+}}
0
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27 ; CHECK: ret
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28 %ret = fmul double %a, %b
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29 ret double %ret
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30 }
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31
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32 define double @fdiv_f64(double %a, double %b) {
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33 ; CHECK: div.rn.f64 %fd{{[0-9]+}}, %fd{{[0-9]+}}, %fd{{[0-9]+}}
0
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34 ; CHECK: ret
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35 %ret = fdiv double %a, %b
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36 ret double %ret
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37 }
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38
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39 ;; PTX does not have a floating-point rem instruction
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40
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41
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42 ;;; f32
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43
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44 define float @fadd_f32(float %a, float %b) {
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45 ; CHECK: add.f32 %f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}
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46 ; CHECK: ret
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47 %ret = fadd float %a, %b
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48 ret float %ret
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49 }
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50
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51 define float @fsub_f32(float %a, float %b) {
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52 ; CHECK: sub.f32 %f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}
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53 ; CHECK: ret
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54 %ret = fsub float %a, %b
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55 ret float %ret
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56 }
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57
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58 define float @fmul_f32(float %a, float %b) {
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59 ; CHECK: mul.f32 %f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}
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60 ; CHECK: ret
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61 %ret = fmul float %a, %b
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62 ret float %ret
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63 }
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64
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65 define float @fdiv_f32(float %a, float %b) {
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66 ; CHECK: div.rn.f32 %f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}
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67 ; CHECK: ret
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68 %ret = fdiv float %a, %b
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69 ret float %ret
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70 }
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71
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72 ;; PTX does not have a floating-point rem instruction