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annotate test/CodeGen/NVPTX/surf-read-cuda.ll @ 100:7d135dc70f03

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LLVM 3.9
author Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
date Tue, 26 Jan 2016 22:53:40 +0900
parents afa8332a0e37
children
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54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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1 ; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s --check-prefix=SM20
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2 ; RUN: llc < %s -march=nvptx -mcpu=sm_30 | FileCheck %s --check-prefix=SM30
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3
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4 target triple = "nvptx-unknown-cuda"
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6 declare i32 @llvm.nvvm.suld.1d.i32.trap(i64, i32)
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7 declare i64 @llvm.nvvm.texsurf.handle.internal.p1i64(i64 addrspace(1)*)
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10 ; SM20-LABEL: .entry foo
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11 ; SM30-LABEL: .entry foo
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12 define void @foo(i64 %img, float* %red, i32 %idx) {
54457678186b LLVM 3.6
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13 ; SM20: ld.param.u64 %rd[[SURFREG:[0-9]+]], [foo_param_0];
54457678186b LLVM 3.6
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14 ; SM20: suld.b.1d.b32.trap {%r[[RED:[0-9]+]]}, [%rd[[SURFREG]], {%r{{[0-9]+}}}]
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15 ; SM30: ld.param.u64 %rd[[SURFREG:[0-9]+]], [foo_param_0];
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16 ; SM30: suld.b.1d.b32.trap {%r[[RED:[0-9]+]]}, [%rd[[SURFREG]], {%r{{[0-9]+}}}]
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17 %val = tail call i32 @llvm.nvvm.suld.1d.i32.trap(i64 %img, i32 %idx)
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18 ; SM20: cvt.rn.f32.s32 %f[[REDF:[0-9]+]], %r[[RED]]
54457678186b LLVM 3.6
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19 ; SM30: cvt.rn.f32.s32 %f[[REDF:[0-9]+]], %r[[RED]]
54457678186b LLVM 3.6
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20 %ret = sitofp i32 %val to float
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afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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21 ; SM20: st.global.f32 [%r{{[0-9]+}}], %f[[REDF]]
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22 ; SM30: st.global.f32 [%r{{[0-9]+}}], %f[[REDF]]
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23 store float %ret, float* %red
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24 ret void
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25 }
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27 @surf0 = internal addrspace(1) global i64 0, align 8
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29 ; SM20-LABEL: .entry bar
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30 ; SM30-LABEL: .entry bar
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31 define void @bar(float* %red, i32 %idx) {
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32 ; SM30: mov.u64 %rd[[SURFHANDLE:[0-9]+]], surf0
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33 %surfHandle = tail call i64 @llvm.nvvm.texsurf.handle.internal.p1i64(i64 addrspace(1)* @surf0)
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34 ; SM20: suld.b.1d.b32.trap {%r[[RED:[0-9]+]]}, [surf0, {%r{{[0-9]+}}}]
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35 ; SM30: suld.b.1d.b32.trap {%r[[RED:[0-9]+]]}, [%rd[[SURFHANDLE]], {%r{{[0-9]+}}}]
54457678186b LLVM 3.6
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36 %val = tail call i32 @llvm.nvvm.suld.1d.i32.trap(i64 %surfHandle, i32 %idx)
54457678186b LLVM 3.6
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37 ; SM20: cvt.rn.f32.s32 %f[[REDF:[0-9]+]], %r[[RED]]
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38 ; SM30: cvt.rn.f32.s32 %f[[REDF:[0-9]+]], %r[[RED]]
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39 %ret = sitofp i32 %val to float
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afa8332a0e37 LLVM 3.8
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40 ; SM20: st.global.f32 [%r{{[0-9]+}}], %f[[REDF]]
afa8332a0e37 LLVM 3.8
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41 ; SM30: st.global.f32 [%r{{[0-9]+}}], %f[[REDF]]
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42 store float %ret, float* %red
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43 ret void
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44 }
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49 !nvvm.annotations = !{!1, !2, !3}
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60c9769439b8 LLVM 3.7
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50 !1 = !{void (i64, float*, i32)* @foo, !"kernel", i32 1}
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51 !2 = !{void (float*, i32)* @bar, !"kernel", i32 1}
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52 !3 = !{i64 addrspace(1)* @surf0, !"surface", i32 1}
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54457678186b LLVM 3.6
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