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annotate test/CodeGen/NVPTX/tex-read-cuda.ll @ 100:7d135dc70f03

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LLVM 3.9
author Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
date Tue, 26 Jan 2016 22:53:40 +0900
parents afa8332a0e37
children
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54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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1 ; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s --check-prefix=SM20
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2 ; RUN: llc < %s -march=nvptx -mcpu=sm_30 | FileCheck %s --check-prefix=SM30
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3
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5 target triple = "nvptx-unknown-cuda"
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7 declare { float, float, float, float } @llvm.nvvm.tex.unified.1d.v4f32.s32(i64, i32)
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8 declare i64 @llvm.nvvm.texsurf.handle.internal.p1i64(i64 addrspace(1)*)
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9
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10 ; SM20-LABEL: .entry foo
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11 ; SM30-LABEL: .entry foo
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12 define void @foo(i64 %img, float* %red, i32 %idx) {
54457678186b LLVM 3.6
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13 ; SM20: ld.param.u64 %rd[[TEXREG:[0-9]+]], [foo_param_0];
54457678186b LLVM 3.6
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14 ; SM20: tex.1d.v4.f32.s32 {%f[[RED:[0-9]+]], %f[[GREEN:[0-9]+]], %f[[BLUE:[0-9]+]], %f[[ALPHA:[0-9]+]]}, [%rd[[TEXREG]], {%r{{[0-9]+}}}]
54457678186b LLVM 3.6
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15 ; SM30: ld.param.u64 %rd[[TEXREG:[0-9]+]], [foo_param_0];
54457678186b LLVM 3.6
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16 ; SM30: tex.1d.v4.f32.s32 {%f[[RED:[0-9]+]], %f[[GREEN:[0-9]+]], %f[[BLUE:[0-9]+]], %f[[ALPHA:[0-9]+]]}, [%rd[[TEXREG]], {%r{{[0-9]+}}}]
54457678186b LLVM 3.6
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17 %val = tail call { float, float, float, float } @llvm.nvvm.tex.unified.1d.v4f32.s32(i64 %img, i32 %idx)
54457678186b LLVM 3.6
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18 %ret = extractvalue { float, float, float, float } %val, 0
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afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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19 ; SM20: st.global.f32 [%r{{[0-9]+}}], %f[[RED]]
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20 ; SM30: st.global.f32 [%r{{[0-9]+}}], %f[[RED]]
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21 store float %ret, float* %red
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22 ret void
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23 }
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26 @tex0 = internal addrspace(1) global i64 0, align 8
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28 ; SM20-LABEL: .entry bar
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29 ; SM30-LABEL: .entry bar
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30 define void @bar(float* %red, i32 %idx) {
54457678186b LLVM 3.6
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31 ; SM30: mov.u64 %rd[[TEXHANDLE:[0-9]+]], tex0
54457678186b LLVM 3.6
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32 %texHandle = tail call i64 @llvm.nvvm.texsurf.handle.internal.p1i64(i64 addrspace(1)* @tex0)
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33 ; SM20: tex.1d.v4.f32.s32 {%f[[RED:[0-9]+]], %f[[GREEN:[0-9]+]], %f[[BLUE:[0-9]+]], %f[[ALPHA:[0-9]+]]}, [tex0, {%r{{[0-9]+}}}]
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34 ; SM30: tex.1d.v4.f32.s32 {%f[[RED:[0-9]+]], %f[[GREEN:[0-9]+]], %f[[BLUE:[0-9]+]], %f[[ALPHA:[0-9]+]]}, [%rd[[TEXHANDLE]], {%r{{[0-9]+}}}]
54457678186b LLVM 3.6
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35 %val = tail call { float, float, float, float } @llvm.nvvm.tex.unified.1d.v4f32.s32(i64 %texHandle, i32 %idx)
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36 %ret = extractvalue { float, float, float, float } %val, 0
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afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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37 ; SM20: st.global.f32 [%r{{[0-9]+}}], %f[[RED]]
afa8332a0e37 LLVM 3.8
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38 ; SM30: st.global.f32 [%r{{[0-9]+}}], %f[[RED]]
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54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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39 store float %ret, float* %red
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40 ret void
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41 }
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43 !nvvm.annotations = !{!1, !2, !3}
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60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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44 !1 = !{void (i64, float*, i32)* @foo, !"kernel", i32 1}
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45 !2 = !{void (float*, i32)* @bar, !"kernel", i32 1}
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46 !3 = !{i64 addrspace(1)* @tex0, !"texture", i32 1}