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author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Sun, 31 Jan 2016 17:34:49 +0900
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1 ============================================================
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2 Extending LLVM: Adding instructions, intrinsics, types, etc.
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3 ============================================================
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4
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5 Introduction and Warning
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6 ========================
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9 During the course of using LLVM, you may wish to customize it for your research
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10 project or for experimentation. At this point, you may realize that you need to
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11 add something to LLVM, whether it be a new fundamental type, a new intrinsic
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12 function, or a whole new instruction.
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13
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14 When you come to this realization, stop and think. Do you really need to extend
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15 LLVM? Is it a new fundamental capability that LLVM does not support at its
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16 current incarnation or can it be synthesized from already pre-existing LLVM
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17 elements? If you are not sure, ask on the `LLVM-dev
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18 <http://lists.llvm.org/mailman/listinfo/llvm-dev>`_ list. The reason is that
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19 extending LLVM will get involved as you need to update all the different passes
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20 that you intend to use with your extension, and there are ``many`` LLVM analyses
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21 and transformations, so it may be quite a bit of work.
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22
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23 Adding an `intrinsic function`_ is far easier than adding an
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24 instruction, and is transparent to optimization passes. If your added
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25 functionality can be expressed as a function call, an intrinsic function is the
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26 method of choice for LLVM extension.
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27
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28 Before you invest a significant amount of effort into a non-trivial extension,
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29 **ask on the list** if what you are looking to do can be done with
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30 already-existing infrastructure, or if maybe someone else is already working on
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31 it. You will save yourself a lot of time and effort by doing so.
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32
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33 .. _intrinsic function:
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34
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35 Adding a new intrinsic function
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36 ===============================
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37
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38 Adding a new intrinsic function to LLVM is much easier than adding a new
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39 instruction. Almost all extensions to LLVM should start as an intrinsic
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40 function and then be turned into an instruction if warranted.
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41
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42 #. ``llvm/docs/LangRef.html``:
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43
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44 Document the intrinsic. Decide whether it is code generator specific and
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45 what the restrictions are. Talk to other people about it so that you are
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46 sure it's a good idea.
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47
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48 #. ``llvm/include/llvm/IR/Intrinsics*.td``:
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49
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50 Add an entry for your intrinsic. Describe its memory access characteristics
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51 for optimization (this controls whether it will be DCE'd, CSE'd, etc). Note
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52 that any intrinsic using one of the ``llvm_any*_ty`` types for an argument or
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53 return type will be deemed by ``tblgen`` as overloaded and the corresponding
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54 suffix will be required on the intrinsic's name.
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55
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56 #. ``llvm/lib/Analysis/ConstantFolding.cpp``:
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57
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58 If it is possible to constant fold your intrinsic, add support to it in the
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59 ``canConstantFoldCallTo`` and ``ConstantFoldCall`` functions.
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60
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61 #. ``llvm/test/*``:
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62
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63 Add test cases for your test cases to the test suite
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64
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65 Once the intrinsic has been added to the system, you must add code generator
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66 support for it. Generally you must do the following steps:
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67
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68 Add support to the .td file for the target(s) of your choice in
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69 ``lib/Target/*/*.td``.
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70
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71 This is usually a matter of adding a pattern to the .td file that matches the
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72 intrinsic, though it may obviously require adding the instructions you want to
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73 generate as well. There are lots of examples in the PowerPC and X86 backend
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74 to follow.
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75
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76 Adding a new SelectionDAG node
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77 ==============================
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78
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79 As with intrinsics, adding a new SelectionDAG node to LLVM is much easier than
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80 adding a new instruction. New nodes are often added to help represent
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81 instructions common to many targets. These nodes often map to an LLVM
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82 instruction (add, sub) or intrinsic (byteswap, population count). In other
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83 cases, new nodes have been added to allow many targets to perform a common task
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84 (converting between floating point and integer representation) or capture more
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85 complicated behavior in a single node (rotate).
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86
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87 #. ``include/llvm/CodeGen/ISDOpcodes.h``:
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88
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89 Add an enum value for the new SelectionDAG node.
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90
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91 #. ``lib/CodeGen/SelectionDAG/SelectionDAG.cpp``:
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92
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93 Add code to print the node to ``getOperationName``. If your new node can be
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94 evaluated at compile time when given constant arguments (such as an add of a
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95 constant with another constant), find the ``getNode`` method that takes the
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96 appropriate number of arguments, and add a case for your node to the switch
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97 statement that performs constant folding for nodes that take the same number
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98 of arguments as your new node.
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99
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100 #. ``lib/CodeGen/SelectionDAG/LegalizeDAG.cpp``:
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101
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102 Add code to `legalize, promote, and expand
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103 <CodeGenerator.html#selectiondag_legalize>`_ the node as necessary. At a
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104 minimum, you will need to add a case statement for your node in
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105 ``LegalizeOp`` which calls LegalizeOp on the node's operands, and returns a
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106 new node if any of the operands changed as a result of being legalized. It
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107 is likely that not all targets supported by the SelectionDAG framework will
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108 natively support the new node. In this case, you must also add code in your
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109 node's case statement in ``LegalizeOp`` to Expand your node into simpler,
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110 legal operations. The case for ``ISD::UREM`` for expanding a remainder into
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111 a divide, multiply, and a subtract is a good example.
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112
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113 #. ``lib/CodeGen/SelectionDAG/LegalizeDAG.cpp``:
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114
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115 If targets may support the new node being added only at certain sizes, you
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116 will also need to add code to your node's case statement in ``LegalizeOp``
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117 to Promote your node's operands to a larger size, and perform the correct
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118 operation. You will also need to add code to ``PromoteOp`` to do this as
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119 well. For a good example, see ``ISD::BSWAP``, which promotes its operand to
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120 a wider size, performs the byteswap, and then shifts the correct bytes right
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121 to emulate the narrower byteswap in the wider type.
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122
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123 #. ``lib/CodeGen/SelectionDAG/LegalizeDAG.cpp``:
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124
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125 Add a case for your node in ``ExpandOp`` to teach the legalizer how to
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126 perform the action represented by the new node on a value that has been split
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127 into high and low halves. This case will be used to support your node with a
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128 64 bit operand on a 32 bit target.
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129
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130 #. ``lib/CodeGen/SelectionDAG/DAGCombiner.cpp``:
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131
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132 If your node can be combined with itself, or other existing nodes in a
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133 peephole-like fashion, add a visit function for it, and call that function
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134 from. There are several good examples for simple combines you can do;
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135 ``visitFABS`` and ``visitSRL`` are good starting places.
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136
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137 #. ``lib/Target/PowerPC/PPCISelLowering.cpp``:
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138
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139 Each target has an implementation of the ``TargetLowering`` class, usually in
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140 its own file (although some targets include it in the same file as the
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141 DAGToDAGISel). The default behavior for a target is to assume that your new
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142 node is legal for all types that are legal for that target. If this target
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143 does not natively support your node, then tell the target to either Promote
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144 it (if it is supported at a larger type) or Expand it. This will cause the
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145 code you wrote in ``LegalizeOp`` above to decompose your new node into other
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146 legal nodes for this target.
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147
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148 #. ``lib/Target/TargetSelectionDAG.td``:
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149
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150 Most current targets supported by LLVM generate code using the DAGToDAG
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151 method, where SelectionDAG nodes are pattern matched to target-specific
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152 nodes, which represent individual instructions. In order for the targets to
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153 match an instruction to your new node, you must add a def for that node to
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154 the list in this file, with the appropriate type constraints. Look at
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155 ``add``, ``bswap``, and ``fadd`` for examples.
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156
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157 #. ``lib/Target/PowerPC/PPCInstrInfo.td``:
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158
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159 Each target has a tablegen file that describes the target's instruction set.
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160 For targets that use the DAGToDAG instruction selection framework, add a
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161 pattern for your new node that uses one or more target nodes. Documentation
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162 for this is a bit sparse right now, but there are several decent examples.
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163 See the patterns for ``rotl`` in ``PPCInstrInfo.td``.
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164
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165 #. TODO: document complex patterns.
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166
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167 #. ``llvm/test/CodeGen/*``:
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168
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169 Add test cases for your new node to the test suite.
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170 ``llvm/test/CodeGen/X86/bswap.ll`` is a good example.
0
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171
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172 Adding a new instruction
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173 ========================
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174
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175 .. warning::
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176
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177 Adding instructions changes the bitcode format, and it will take some effort
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178 to maintain compatibility with the previous version. Only add an instruction
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179 if it is absolutely necessary.
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180
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181 #. ``llvm/include/llvm/IR/Instruction.def``:
0
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182
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183 add a number for your instruction and an enum name
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184
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185 #. ``llvm/include/llvm/IR/Instructions.h``:
0
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186
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187 add a definition for the class that will represent your instruction
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188
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189 #. ``llvm/include/llvm/IR/InstVisitor.h``:
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190
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191 add a prototype for a visitor to your new instruction type
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192
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193 #. ``llvm/lib/AsmParser/LLLexer.cpp``:
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194
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195 add a new token to parse your instruction from assembly text file
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196
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197 #. ``llvm/lib/AsmParser/LLParser.cpp``:
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198
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199 add the grammar on how your instruction can be read and what it will
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200 construct as a result
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201
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202 #. ``llvm/lib/Bitcode/Reader/BitcodeReader.cpp``:
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203
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204 add a case for your instruction and how it will be parsed from bitcode
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205
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206 #. ``llvm/lib/Bitcode/Writer/BitcodeWriter.cpp``:
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207
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208 add a case for your instruction and how it will be parsed from bitcode
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209
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210 #. ``llvm/lib/IR/Instruction.cpp``:
0
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211
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212 add a case for how your instruction will be printed out to assembly
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213
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214 #. ``llvm/lib/IR/Instructions.cpp``:
0
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215
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216 implement the class you defined in ``llvm/include/llvm/Instructions.h``
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217
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218 #. Test your instruction
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219
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220 #. ``llvm/lib/Target/*``:
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221
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222 add support for your instruction to code generators, or add a lowering pass.
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223
83
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224 #. ``llvm/test/*``:
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225
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226 add your test cases to the test suite.
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227
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228 Also, you need to implement (or modify) any analyses or passes that you want to
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229 understand this new instruction.
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230
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231 Adding a new type
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232 =================
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233
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234 .. warning::
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235
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236 Adding new types changes the bitcode format, and will break compatibility with
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237 currently-existing LLVM installations. Only add new types if it is absolutely
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238 necessary.
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239
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240 Adding a fundamental type
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241 -------------------------
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242
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243 #. ``llvm/include/llvm/IR/Type.h``:
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244
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245 add enum for the new type; add static ``Type*`` for this type
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246
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247 #. ``llvm/lib/IR/Type.cpp`` and ``llvm/lib/IR/ValueTypes.cpp``:
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248
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249 add mapping from ``TypeID`` => ``Type*``; initialize the static ``Type*``
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250
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251 #. ``llvm/llvm/llvm-c/Core.cpp``:
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252
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253 add enum ``LLVMTypeKind`` and modify
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254 ``LLVMTypeKind LLVMGetTypeKind(LLVMTypeRef Ty)`` for the new type
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255
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256 #. ``llvm/include/llvm/IR/TypeBuilder.h``:
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257
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258 add new class to represent new type in the hierarchy
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259
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260 #. ``llvm/lib/AsmParser/LLLexer.cpp``:
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261
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262 add ability to parse in the type from text assembly
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263
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264 #. ``llvm/lib/AsmParser/LLParser.cpp``:
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265
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266 add a token for that type
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267
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268 #. ``llvm/lib/Bitcode/Writer/BitcodeWriter.cpp``:
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269
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270 modify ``static void WriteTypeTable(const ValueEnumerator &VE,
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271 BitstreamWriter &Stream)`` to serialize your type
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272
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273 #. ``llvm/lib/Bitcode/Reader/BitcodeReader.cpp``:
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274
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275 modify ``bool BitcodeReader::ParseTypeType()`` to read your data type
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276
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277 #. ``include/llvm/Bitcode/LLVMBitCodes.h``:
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278
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279 add enum ``TypeCodes`` for the new type
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280
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281 Adding a derived type
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282 ---------------------
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283
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284 #. ``llvm/include/llvm/IR/Type.h``:
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285
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286 add enum for the new type; add a forward declaration of the type also
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287
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288 #. ``llvm/include/llvm/IR/DerivedTypes.h``:
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289
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290 add new class to represent new class in the hierarchy; add forward
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291 declaration to the TypeMap value type
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292
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293 #. ``llvm/lib/IR/Type.cpp`` and ``llvm/lib/IR/ValueTypes.cpp``:
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294
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295 add support for derived type, notably `enum TypeID` and `is`, `get` methods.
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296
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297 #. ``llvm/llvm/llvm-c/Core.cpp``:
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298
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299 add enum ``LLVMTypeKind`` and modify
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300 `LLVMTypeKind LLVMGetTypeKind(LLVMTypeRef Ty)` for the new type
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301
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302 #. ``llvm/include/llvm/IR/TypeBuilder.h``:
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303
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304 add new class to represent new class in the hierarchy
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305
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306 #. ``llvm/lib/AsmParser/LLLexer.cpp``:
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307
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308 modify ``lltok::Kind LLLexer::LexIdentifier()`` to add ability to
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309 parse in the type from text assembly
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310
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311 #. ``llvm/lib/Bitcode/Writer/BitcodeWriter.cpp``:
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312
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313 modify ``static void WriteTypeTable(const ValueEnumerator &VE,
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314 BitstreamWriter &Stream)`` to serialize your type
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315
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316 #. ``llvm/lib/Bitcode/Reader/BitcodeReader.cpp``:
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317
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318 modify ``bool BitcodeReader::ParseTypeType()`` to read your data type
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319
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320 #. ``include/llvm/Bitcode/LLVMBitCodes.h``:
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321
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322 add enum ``TypeCodes`` for the new type
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323
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324 #. ``llvm/lib/IR/AsmWriter.cpp``:
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325
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326 modify ``void TypePrinting::print(Type *Ty, raw_ostream &OS)``
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327 to output the new derived type