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annotate lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.h @ 107:a03ddd01be7e

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author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Sun, 31 Jan 2016 17:34:49 +0900
parents 7d135dc70f03
children 1172e4bd9c6f
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1 // WebAssemblyMachineFunctionInfo.h-WebAssembly machine function info-*- C++ -*-
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2 //
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3 // The LLVM Compiler Infrastructure
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4 //
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5 // This file is distributed under the University of Illinois Open Source
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6 // License. See LICENSE.TXT for details.
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7 //
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8 //===----------------------------------------------------------------------===//
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9 ///
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10 /// \file
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11 /// \brief This file declares WebAssembly-specific per-machine-function
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12 /// information.
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13 ///
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14 //===----------------------------------------------------------------------===//
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15
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16 #ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYMACHINEFUNCTIONINFO_H
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17 #define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYMACHINEFUNCTIONINFO_H
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18
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19 #include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
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20 #include "llvm/CodeGen/MachineRegisterInfo.h"
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21
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22 namespace llvm {
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23
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24 /// This class is derived from MachineFunctionInfo and contains private
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25 /// WebAssembly-specific information for each MachineFunction.
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26 class WebAssemblyFunctionInfo final : public MachineFunctionInfo {
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27 MachineFunction &MF;
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28
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29 std::vector<MVT> Params;
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30
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31 /// A mapping from CodeGen vreg index to WebAssembly register number.
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32 std::vector<unsigned> WARegs;
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33
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34 /// A mapping from CodeGen vreg index to a boolean value indicating whether
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35 /// the given register is considered to be "stackified", meaning it has been
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36 /// determined or made to meet the stack requirements:
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37 /// - single use (per path)
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38 /// - single def (per path)
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39 /// - defined and used in LIFO order with other stack registers
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40 BitVector VRegStackified;
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41
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42 // One entry for each possible target reg. we expect it to be small.
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43 std::vector<unsigned> PhysRegs;
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44
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45 public:
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46 explicit WebAssemblyFunctionInfo(MachineFunction &MF) : MF(MF) {
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47 PhysRegs.resize(WebAssembly::NUM_TARGET_REGS, -1U);
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48 }
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49 ~WebAssemblyFunctionInfo() override;
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50
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51 void addParam(MVT VT) { Params.push_back(VT); }
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52 const std::vector<MVT> &getParams() const { return Params; }
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53
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54 static const unsigned UnusedReg = -1u;
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55
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56 void stackifyVReg(unsigned VReg) {
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57 if (TargetRegisterInfo::virtReg2Index(VReg) >= VRegStackified.size())
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58 VRegStackified.resize(TargetRegisterInfo::virtReg2Index(VReg) + 1);
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59 VRegStackified.set(TargetRegisterInfo::virtReg2Index(VReg));
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60 }
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61 void unstackifyVReg(unsigned VReg) {
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62 if (TargetRegisterInfo::virtReg2Index(VReg) >= VRegStackified.size())
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63 return;
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64 VRegStackified.reset(TargetRegisterInfo::virtReg2Index(VReg));
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65 }
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66 bool isVRegStackified(unsigned VReg) const {
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67 if (TargetRegisterInfo::virtReg2Index(VReg) >= VRegStackified.size())
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68 return false;
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69 return VRegStackified.test(TargetRegisterInfo::virtReg2Index(VReg));
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70 }
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71
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72 void initWARegs();
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73 void setWAReg(unsigned VReg, unsigned WAReg) {
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74 assert(WAReg != UnusedReg);
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75 assert(TargetRegisterInfo::virtReg2Index(VReg) < WARegs.size());
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76 WARegs[TargetRegisterInfo::virtReg2Index(VReg)] = WAReg;
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77 }
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78 unsigned getWAReg(unsigned Reg) const {
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79 if (TargetRegisterInfo::isVirtualRegister(Reg)) {
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80 assert(TargetRegisterInfo::virtReg2Index(Reg) < WARegs.size());
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81 return WARegs[TargetRegisterInfo::virtReg2Index(Reg)];
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82 }
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83 return PhysRegs[Reg];
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84 }
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85 // If new virtual registers are created after initWARegs has been called,
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86 // this function can be used to add WebAssembly register mappings for them.
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87 void addWAReg(unsigned VReg, unsigned WAReg) {
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88 assert(VReg = WARegs.size());
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89 WARegs.push_back(WAReg);
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90 }
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91
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92 void addPReg(unsigned PReg, unsigned WAReg) {
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93 assert(PReg < WebAssembly::NUM_TARGET_REGS);
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94 assert(WAReg < -1U);
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95 PhysRegs[PReg] = WAReg;
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96 }
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97 const std::vector<unsigned> &getPhysRegs() const { return PhysRegs; }
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98 };
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99
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100 } // end namespace llvm
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101
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102 #endif