annotate lib/Target/X86/X86CallingConv.h @ 116:a609e5c42ecc

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1 //=== X86CallingConv.h - X86 Custom Calling Convention Routines -*- C++ -*-===//
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2 //
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3 // The LLVM Compiler Infrastructure
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4 //
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5 // This file is distributed under the University of Illinois Open Source
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6 // License. See LICENSE.TXT for details.
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7 //
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8 //===----------------------------------------------------------------------===//
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9 //
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10 // This file contains the custom routines for the X86 Calling Convention that
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11 // aren't done by tablegen.
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12 //
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13 //===----------------------------------------------------------------------===//
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15 #ifndef LLVM_LIB_TARGET_X86_X86CALLINGCONV_H
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16 #define LLVM_LIB_TARGET_X86_X86CALLINGCONV_H
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18 #include "MCTargetDesc/X86MCTargetDesc.h"
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19 #include "llvm/CodeGen/CallingConvLower.h"
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20 #include "llvm/IR/CallingConv.h"
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21
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22 namespace llvm {
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23
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24 inline bool CC_X86_32_VectorCallIndirect(unsigned &ValNo, MVT &ValVT,
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25 MVT &LocVT,
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26 CCValAssign::LocInfo &LocInfo,
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27 ISD::ArgFlagsTy &ArgFlags,
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28 CCState &State) {
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29 // Similar to CCPassIndirect, with the addition of inreg.
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30 LocVT = MVT::i32;
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31 LocInfo = CCValAssign::Indirect;
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32 ArgFlags.setInReg();
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33 return false; // Continue the search, but now for i32.
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34 }
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35
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37 inline bool CC_X86_AnyReg_Error(unsigned &, MVT &, MVT &,
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38 CCValAssign::LocInfo &, ISD::ArgFlagsTy &,
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39 CCState &) {
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40 llvm_unreachable("The AnyReg calling convention is only supported by the " \
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41 "stackmap and patchpoint intrinsics.");
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42 // gracefully fallback to X86 C calling convention on Release builds.
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43 return false;
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44 }
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46 inline bool CC_X86_32_MCUInReg(unsigned &ValNo, MVT &ValVT,
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47 MVT &LocVT,
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48 CCValAssign::LocInfo &LocInfo,
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49 ISD::ArgFlagsTy &ArgFlags,
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50 CCState &State) {
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51 // This is similar to CCAssignToReg<[EAX, EDX, ECX]>, but makes sure
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52 // not to split i64 and double between a register and stack
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53 static const MCPhysReg RegList[] = {X86::EAX, X86::EDX, X86::ECX};
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54 static const unsigned NumRegs = sizeof(RegList)/sizeof(RegList[0]);
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55
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56 SmallVectorImpl<CCValAssign> &PendingMembers = State.getPendingLocs();
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57
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58 // If this is the first part of an double/i64/i128, or if we're already
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59 // in the middle of a split, add to the pending list. If this is not
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60 // the end of the split, return, otherwise go on to process the pending
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61 // list
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62 if (ArgFlags.isSplit() || !PendingMembers.empty()) {
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63 PendingMembers.push_back(
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64 CCValAssign::getPending(ValNo, ValVT, LocVT, LocInfo));
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65 if (!ArgFlags.isSplitEnd())
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66 return true;
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67 }
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68
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69 // If there are no pending members, we are not in the middle of a split,
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70 // so do the usual inreg stuff.
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71 if (PendingMembers.empty()) {
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72 if (unsigned Reg = State.AllocateReg(RegList)) {
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73 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
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74 return true;
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75 }
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76 return false;
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77 }
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78
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79 assert(ArgFlags.isSplitEnd());
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80
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81 // We now have the entire original argument in PendingMembers, so decide
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82 // whether to use registers or the stack.
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83 // Per the MCU ABI:
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84 // a) To use registers, we need to have enough of them free to contain
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85 // the entire argument.
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86 // b) We never want to use more than 2 registers for a single argument.
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87
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88 unsigned FirstFree = State.getFirstUnallocated(RegList);
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89 bool UseRegs = PendingMembers.size() <= std::min(2U, NumRegs - FirstFree);
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90
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91 for (auto &It : PendingMembers) {
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92 if (UseRegs)
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93 It.convertToReg(State.AllocateReg(RegList[FirstFree++]));
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94 else
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95 It.convertToMem(State.AllocateStack(4, 4));
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96 State.addLoc(It);
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97 }
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98
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99 PendingMembers.clear();
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100
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101 return true;
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102 }
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103
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104 } // End llvm namespace
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105
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106 #endif
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107