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annotate lib/Target/X86/X86SelectionDAGInfo.cpp @ 116:a609e5c42ecc

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change from CGF to this
author mir3636
date Mon, 08 Aug 2016 19:47:00 +0900
parents 7d135dc70f03
children 1172e4bd9c6f
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1 //===-- X86SelectionDAGInfo.cpp - X86 SelectionDAG Info -------------------===//
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2 //
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3 // The LLVM Compiler Infrastructure
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4 //
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5 // This file is distributed under the University of Illinois Open Source
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6 // License. See LICENSE.TXT for details.
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7 //
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8 //===----------------------------------------------------------------------===//
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9 //
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10 // This file implements the X86SelectionDAGInfo class.
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11 //
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12 //===----------------------------------------------------------------------===//
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13
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14 #include "X86InstrInfo.h"
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15 #include "X86ISelLowering.h"
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16 #include "X86RegisterInfo.h"
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17 #include "X86Subtarget.h"
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18 #include "X86SelectionDAGInfo.h"
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19 #include "llvm/CodeGen/SelectionDAG.h"
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20 #include "llvm/IR/DerivedTypes.h"
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21 #include "llvm/Target/TargetLowering.h"
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22
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23 using namespace llvm;
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24
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25 #define DEBUG_TYPE "x86-selectiondag-info"
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26
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27 bool X86SelectionDAGInfo::isBaseRegConflictPossible(
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28 SelectionDAG &DAG, ArrayRef<unsigned> ClobberSet) const {
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29 // We cannot use TRI->hasBasePointer() until *after* we select all basic
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30 // blocks. Legalization may introduce new stack temporaries with large
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31 // alignment requirements. Fall back to generic code if there are any
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32 // dynamic stack adjustments (hopefully rare) and the base pointer would
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33 // conflict if we had to use it.
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34 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
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35 if (!MFI->hasVarSizedObjects() && !MFI->hasOpaqueSPAdjustment())
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36 return false;
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37
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38 const X86RegisterInfo *TRI = static_cast<const X86RegisterInfo *>(
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39 DAG.getSubtarget().getRegisterInfo());
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40 unsigned BaseReg = TRI->getBaseRegister();
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41 for (unsigned R : ClobberSet)
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42 if (BaseReg == R)
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43 return true;
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44 return false;
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45 }
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46
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47 SDValue X86SelectionDAGInfo::EmitTargetCodeForMemset(
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48 SelectionDAG &DAG, SDLoc dl, SDValue Chain, SDValue Dst, SDValue Src,
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49 SDValue Size, unsigned Align, bool isVolatile,
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50 MachinePointerInfo DstPtrInfo) const {
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51 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
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52 const X86Subtarget &Subtarget =
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53 DAG.getMachineFunction().getSubtarget<X86Subtarget>();
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54
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55 #ifndef NDEBUG
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56 // If the base register might conflict with our physical registers, bail out.
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57 const unsigned ClobberSet[] = {X86::RCX, X86::RAX, X86::RDI,
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58 X86::ECX, X86::EAX, X86::EDI};
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59 assert(!isBaseRegConflictPossible(DAG, ClobberSet));
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60 #endif
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61
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62 // If to a segment-relative address space, use the default lowering.
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63 if (DstPtrInfo.getAddrSpace() >= 256)
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64 return SDValue();
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65
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66 // If not DWORD aligned or size is more than the threshold, call the library.
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67 // The libc version is likely to be faster for these cases. It can use the
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68 // address value and run time information about the CPU.
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69 if ((Align & 3) != 0 || !ConstantSize ||
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70 ConstantSize->getZExtValue() > Subtarget.getMaxInlineSizeThreshold()) {
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71 // Check to see if there is a specialized entry-point for memory zeroing.
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72 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Src);
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73
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74 if (const char *bzeroEntry = V &&
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75 V->isNullValue() ? Subtarget.getBZeroEntry() : nullptr) {
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76 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
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77 EVT IntPtr = TLI.getPointerTy(DAG.getDataLayout());
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78 Type *IntPtrTy = DAG.getDataLayout().getIntPtrType(*DAG.getContext());
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79 TargetLowering::ArgListTy Args;
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80 TargetLowering::ArgListEntry Entry;
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81 Entry.Node = Dst;
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82 Entry.Ty = IntPtrTy;
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83 Args.push_back(Entry);
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84 Entry.Node = Size;
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85 Args.push_back(Entry);
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86
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87 TargetLowering::CallLoweringInfo CLI(DAG);
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88 CLI.setDebugLoc(dl).setChain(Chain)
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89 .setCallee(CallingConv::C, Type::getVoidTy(*DAG.getContext()),
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90 DAG.getExternalSymbol(bzeroEntry, IntPtr), std::move(Args),
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91 0)
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92 .setDiscardResult();
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93
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94 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI);
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95 return CallResult.second;
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96 }
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97
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98 // Otherwise have the target-independent code call memset.
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99 return SDValue();
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100 }
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101
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102 uint64_t SizeVal = ConstantSize->getZExtValue();
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103 SDValue InFlag;
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104 EVT AVT;
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105 SDValue Count;
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106 ConstantSDNode *ValC = dyn_cast<ConstantSDNode>(Src);
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107 unsigned BytesLeft = 0;
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108 bool TwoRepStos = false;
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109 if (ValC) {
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110 unsigned ValReg;
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111 uint64_t Val = ValC->getZExtValue() & 255;
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112
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113 // If the value is a constant, then we can potentially use larger sets.
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114 switch (Align & 3) {
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115 case 2: // WORD aligned
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116 AVT = MVT::i16;
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117 ValReg = X86::AX;
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118 Val = (Val << 8) | Val;
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119 break;
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120 case 0: // DWORD aligned
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121 AVT = MVT::i32;
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122 ValReg = X86::EAX;
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123 Val = (Val << 8) | Val;
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124 Val = (Val << 16) | Val;
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125 if (Subtarget.is64Bit() && ((Align & 0x7) == 0)) { // QWORD aligned
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126 AVT = MVT::i64;
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127 ValReg = X86::RAX;
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diff changeset
128 Val = (Val << 32) | Val;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
129 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
130 break;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
131 default: // Byte aligned
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
132 AVT = MVT::i8;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
133 ValReg = X86::AL;
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
134 Count = DAG.getIntPtrConstant(SizeVal, dl);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
135 break;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
136 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
137
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
138 if (AVT.bitsGT(MVT::i8)) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
139 unsigned UBytes = AVT.getSizeInBits() / 8;
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
140 Count = DAG.getIntPtrConstant(SizeVal / UBytes, dl);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
141 BytesLeft = SizeVal % UBytes;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
142 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
143
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
144 Chain = DAG.getCopyToReg(Chain, dl, ValReg, DAG.getConstant(Val, dl, AVT),
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
145 InFlag);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
146 InFlag = Chain.getValue(1);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
147 } else {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
148 AVT = MVT::i8;
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
149 Count = DAG.getIntPtrConstant(SizeVal, dl);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
150 Chain = DAG.getCopyToReg(Chain, dl, X86::AL, Src, InFlag);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
151 InFlag = Chain.getValue(1);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
152 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
153
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
154 Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RCX : X86::ECX,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
155 Count, InFlag);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
156 InFlag = Chain.getValue(1);
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
157 Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RDI : X86::EDI,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
158 Dst, InFlag);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
159 InFlag = Chain.getValue(1);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
160
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
161 SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Glue);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
162 SDValue Ops[] = { Chain, DAG.getValueType(AVT), InFlag };
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
163 Chain = DAG.getNode(X86ISD::REP_STOS, dl, Tys, Ops);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
164
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
165 if (TwoRepStos) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
166 InFlag = Chain.getValue(1);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
167 Count = Size;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
168 EVT CVT = Count.getValueType();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
169 SDValue Left = DAG.getNode(ISD::AND, dl, CVT, Count,
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
170 DAG.getConstant((AVT == MVT::i64) ? 7 : 3, dl,
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
171 CVT));
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
172 Chain = DAG.getCopyToReg(Chain, dl, (CVT == MVT::i64) ? X86::RCX : X86::ECX,
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
173 Left, InFlag);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
174 InFlag = Chain.getValue(1);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
175 Tys = DAG.getVTList(MVT::Other, MVT::Glue);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
176 SDValue Ops[] = { Chain, DAG.getValueType(MVT::i8), InFlag };
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
177 Chain = DAG.getNode(X86ISD::REP_STOS, dl, Tys, Ops);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
178 } else if (BytesLeft) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
179 // Handle the last 1 - 7 bytes.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
180 unsigned Offset = SizeVal - BytesLeft;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
181 EVT AddrVT = Dst.getValueType();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
182 EVT SizeVT = Size.getValueType();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
183
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
184 Chain = DAG.getMemset(Chain, dl,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
185 DAG.getNode(ISD::ADD, dl, AddrVT, Dst,
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
186 DAG.getConstant(Offset, dl, AddrVT)),
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
187 Src,
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
188 DAG.getConstant(BytesLeft, dl, SizeVT),
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
189 Align, isVolatile, false,
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
190 DstPtrInfo.getWithOffset(Offset));
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
191 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
192
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
193 // TODO: Use a Tokenfactor, as in memcpy, instead of a single chain.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
194 return Chain;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
195 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
196
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
197 SDValue X86SelectionDAGInfo::EmitTargetCodeForMemcpy(
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
198 SelectionDAG &DAG, SDLoc dl, SDValue Chain, SDValue Dst, SDValue Src,
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
199 SDValue Size, unsigned Align, bool isVolatile, bool AlwaysInline,
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
200 MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const {
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
201 // This requires the copy size to be a constant, preferably
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
202 // within a subtarget-specific limit.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
203 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
204 const X86Subtarget &Subtarget =
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
205 DAG.getMachineFunction().getSubtarget<X86Subtarget>();
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
206 if (!ConstantSize)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
207 return SDValue();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
208 uint64_t SizeVal = ConstantSize->getZExtValue();
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
209 if (!AlwaysInline && SizeVal > Subtarget.getMaxInlineSizeThreshold())
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
210 return SDValue();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
211
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
212 /// If not DWORD aligned, it is more efficient to call the library. However
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
213 /// if calling the library is not allowed (AlwaysInline), then soldier on as
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
214 /// the code generated here is better than the long load-store sequence we
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
215 /// would otherwise get.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
216 if (!AlwaysInline && (Align & 3) != 0)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
217 return SDValue();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
218
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
219 // If to a segment-relative address space, use the default lowering.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
220 if (DstPtrInfo.getAddrSpace() >= 256 ||
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
221 SrcPtrInfo.getAddrSpace() >= 256)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
222 return SDValue();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
223
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
224 // If the base register might conflict with our physical registers, bail out.
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
225 const unsigned ClobberSet[] = {X86::RCX, X86::RSI, X86::RDI,
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
226 X86::ECX, X86::ESI, X86::EDI};
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
227 if (isBaseRegConflictPossible(DAG, ClobberSet))
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
228 return SDValue();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
229
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
230 MVT AVT;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
231 if (Align & 1)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
232 AVT = MVT::i8;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
233 else if (Align & 2)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
234 AVT = MVT::i16;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
235 else if (Align & 4)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
236 // DWORD aligned
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
237 AVT = MVT::i32;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
238 else
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
239 // QWORD aligned
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
240 AVT = Subtarget.is64Bit() ? MVT::i64 : MVT::i32;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
241
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
242 unsigned UBytes = AVT.getSizeInBits() / 8;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
243 unsigned CountVal = SizeVal / UBytes;
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
244 SDValue Count = DAG.getIntPtrConstant(CountVal, dl);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
245 unsigned BytesLeft = SizeVal % UBytes;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
246
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
247 SDValue InFlag;
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
248 Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RCX : X86::ECX,
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
249 Count, InFlag);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
250 InFlag = Chain.getValue(1);
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
251 Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RDI : X86::EDI,
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
252 Dst, InFlag);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
253 InFlag = Chain.getValue(1);
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
254 Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RSI : X86::ESI,
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255 Src, InFlag);
0
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256 InFlag = Chain.getValue(1);
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257
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258 SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Glue);
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259 SDValue Ops[] = { Chain, DAG.getValueType(AVT), InFlag };
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260 SDValue RepMovs = DAG.getNode(X86ISD::REP_MOVS, dl, Tys, Ops);
0
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261
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262 SmallVector<SDValue, 4> Results;
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263 Results.push_back(RepMovs);
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264 if (BytesLeft) {
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265 // Handle the last 1 - 7 bytes.
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266 unsigned Offset = SizeVal - BytesLeft;
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267 EVT DstVT = Dst.getValueType();
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268 EVT SrcVT = Src.getValueType();
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269 EVT SizeVT = Size.getValueType();
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270 Results.push_back(DAG.getMemcpy(Chain, dl,
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271 DAG.getNode(ISD::ADD, dl, DstVT, Dst,
95
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272 DAG.getConstant(Offset, dl,
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
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273 DstVT)),
0
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274 DAG.getNode(ISD::ADD, dl, SrcVT, Src,
95
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275 DAG.getConstant(Offset, dl,
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276 SrcVT)),
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277 DAG.getConstant(BytesLeft, dl, SizeVT),
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278 Align, isVolatile, AlwaysInline, false,
0
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279 DstPtrInfo.getWithOffset(Offset),
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280 SrcPtrInfo.getWithOffset(Offset)));
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281 }
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282
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parents: 0
diff changeset
283 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Results);
0
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284 }