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1 ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
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2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
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3
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4 declare i1 @llvm.AMDGPU.class.f32(float, i32) #1
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5 declare i1 @llvm.AMDGPU.class.f64(double, i32) #1
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6 declare i32 @llvm.r600.read.tidig.x() #1
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7 declare float @llvm.fabs.f32(float) #1
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8 declare double @llvm.fabs.f64(double) #1
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9
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10 ; SI-LABEL: {{^}}test_isinf_pattern:
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11 ; SI: v_mov_b32_e32 [[MASK:v[0-9]+]], 0x204{{$}}
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12 ; SI: v_cmp_class_f32_e32 vcc, s{{[0-9]+}}, [[MASK]]
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13 ; SI-NOT: v_cmp
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14 ; SI: s_endpgm
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15 define void @test_isinf_pattern(i32 addrspace(1)* nocapture %out, float %x) #0 {
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16 %fabs = tail call float @llvm.fabs.f32(float %x) #1
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17 %cmp = fcmp oeq float %fabs, 0x7FF0000000000000
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18 %ext = zext i1 %cmp to i32
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19 store i32 %ext, i32 addrspace(1)* %out, align 4
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20 ret void
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21 }
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22
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23 ; SI-LABEL: {{^}}test_not_isinf_pattern_0:
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24 ; SI-NOT: v_cmp_class
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25 ; SI: s_endpgm
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26 define void @test_not_isinf_pattern_0(i32 addrspace(1)* nocapture %out, float %x) #0 {
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27 %fabs = tail call float @llvm.fabs.f32(float %x) #1
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28 %cmp = fcmp ueq float %fabs, 0x7FF0000000000000
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29 %ext = zext i1 %cmp to i32
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30 store i32 %ext, i32 addrspace(1)* %out, align 4
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31 ret void
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32 }
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33
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34 ; SI-LABEL: {{^}}test_not_isinf_pattern_1:
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35 ; SI-NOT: v_cmp_class
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36 ; SI: s_endpgm
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37 define void @test_not_isinf_pattern_1(i32 addrspace(1)* nocapture %out, float %x) #0 {
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38 %fabs = tail call float @llvm.fabs.f32(float %x) #1
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39 %cmp = fcmp oeq float %fabs, 0xFFF0000000000000
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40 %ext = zext i1 %cmp to i32
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41 store i32 %ext, i32 addrspace(1)* %out, align 4
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42 ret void
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43 }
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44
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45 ; SI-LABEL: {{^}}test_isfinite_pattern_0:
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46 ; SI-NOT: v_cmp
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47 ; SI: v_mov_b32_e32 [[MASK:v[0-9]+]], 0x1f8{{$}}
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48 ; SI: v_cmp_class_f32_e32 vcc, s{{[0-9]+}}, [[MASK]]
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49 ; SI-NOT: v_cmp
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50 ; SI: s_endpgm
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51 define void @test_isfinite_pattern_0(i32 addrspace(1)* nocapture %out, float %x) #0 {
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52 %ord = fcmp ord float %x, 0.000000e+00
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53 %x.fabs = tail call float @llvm.fabs.f32(float %x) #1
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54 %ninf = fcmp une float %x.fabs, 0x7FF0000000000000
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55 %and = and i1 %ord, %ninf
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56 %ext = zext i1 %and to i32
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57 store i32 %ext, i32 addrspace(1)* %out, align 4
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58 ret void
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59 }
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60
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61 ; Use negative infinity
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62 ; SI-LABEL: {{^}}test_isfinite_not_pattern_0:
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63 ; SI-NOT: v_cmp_class_f32
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64 ; SI: s_endpgm
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65 define void @test_isfinite_not_pattern_0(i32 addrspace(1)* nocapture %out, float %x) #0 {
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66 %ord = fcmp ord float %x, 0.000000e+00
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67 %x.fabs = tail call float @llvm.fabs.f32(float %x) #1
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68 %ninf = fcmp une float %x.fabs, 0xFFF0000000000000
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69 %and = and i1 %ord, %ninf
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70 %ext = zext i1 %and to i32
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71 store i32 %ext, i32 addrspace(1)* %out, align 4
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72 ret void
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73 }
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74
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75 ; No fabs
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76 ; SI-LABEL: {{^}}test_isfinite_not_pattern_1:
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77 ; SI-NOT: v_cmp_class_f32
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78 ; SI: s_endpgm
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79 define void @test_isfinite_not_pattern_1(i32 addrspace(1)* nocapture %out, float %x) #0 {
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80 %ord = fcmp ord float %x, 0.000000e+00
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81 %ninf = fcmp une float %x, 0x7FF0000000000000
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82 %and = and i1 %ord, %ninf
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83 %ext = zext i1 %and to i32
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84 store i32 %ext, i32 addrspace(1)* %out, align 4
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85 ret void
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86 }
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87
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88 ; fabs of different value
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89 ; SI-LABEL: {{^}}test_isfinite_not_pattern_2:
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90 ; SI-NOT: v_cmp_class_f32
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91 ; SI: s_endpgm
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92 define void @test_isfinite_not_pattern_2(i32 addrspace(1)* nocapture %out, float %x, float %y) #0 {
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93 %ord = fcmp ord float %x, 0.000000e+00
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94 %x.fabs = tail call float @llvm.fabs.f32(float %y) #1
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95 %ninf = fcmp une float %x.fabs, 0x7FF0000000000000
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96 %and = and i1 %ord, %ninf
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97 %ext = zext i1 %and to i32
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98 store i32 %ext, i32 addrspace(1)* %out, align 4
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99 ret void
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100 }
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101
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102 ; Wrong ordered compare type
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103 ; SI-LABEL: {{^}}test_isfinite_not_pattern_3:
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104 ; SI-NOT: v_cmp_class_f32
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105 ; SI: s_endpgm
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106 define void @test_isfinite_not_pattern_3(i32 addrspace(1)* nocapture %out, float %x) #0 {
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107 %ord = fcmp uno float %x, 0.000000e+00
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108 %x.fabs = tail call float @llvm.fabs.f32(float %x) #1
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109 %ninf = fcmp une float %x.fabs, 0x7FF0000000000000
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110 %and = and i1 %ord, %ninf
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111 %ext = zext i1 %and to i32
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112 store i32 %ext, i32 addrspace(1)* %out, align 4
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113 ret void
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114 }
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115
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116 ; Wrong unordered compare
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117 ; SI-LABEL: {{^}}test_isfinite_not_pattern_4:
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118 ; SI-NOT: v_cmp_class_f32
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119 ; SI: s_endpgm
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120 define void @test_isfinite_not_pattern_4(i32 addrspace(1)* nocapture %out, float %x) #0 {
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121 %ord = fcmp ord float %x, 0.000000e+00
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122 %x.fabs = tail call float @llvm.fabs.f32(float %x) #1
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123 %ninf = fcmp one float %x.fabs, 0x7FF0000000000000
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124 %and = and i1 %ord, %ninf
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125 %ext = zext i1 %and to i32
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126 store i32 %ext, i32 addrspace(1)* %out, align 4
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127 ret void
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128 }
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129
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130 attributes #0 = { nounwind }
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131 attributes #1 = { nounwind readnone }
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