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annotate test/CodeGen/AMDGPU/packetizer.ll @ 95:afa8332a0e37

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LLVM 3.8
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Tue, 13 Oct 2015 17:48:58 +0900
parents test/CodeGen/R600/packetizer.ll@60c9769439b8
children 803732b1fca8
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95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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1 ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
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2 ; RUN: llc < %s -march=r600 -mcpu=cayman | FileCheck %s
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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4 ; CHECK: {{^}}test:
0
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5 ; CHECK: BIT_ALIGN_INT T{{[0-9]}}.X
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6 ; CHECK: BIT_ALIGN_INT T{{[0-9]}}.Y
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7 ; CHECK: BIT_ALIGN_INT T{{[0-9]}}.Z
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8 ; CHECK: BIT_ALIGN_INT * T{{[0-9]}}.W
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10 define void @test(i32 addrspace(1)* %out, i32 %x_arg, i32 %y_arg, i32 %z_arg, i32 %w_arg, i32 %e) {
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11 entry:
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12 %shl = sub i32 32, %e
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13 %x = add i32 %x_arg, 1
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14 %x.0 = shl i32 %x, %shl
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15 %x.1 = lshr i32 %x, %e
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16 %x.2 = or i32 %x.0, %x.1
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17 %y = add i32 %y_arg, 1
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18 %y.0 = shl i32 %y, %shl
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19 %y.1 = lshr i32 %y, %e
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20 %y.2 = or i32 %y.0, %y.1
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21 %z = add i32 %z_arg, 1
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22 %z.0 = shl i32 %z, %shl
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23 %z.1 = lshr i32 %z, %e
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24 %z.2 = or i32 %z.0, %z.1
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25 %w = add i32 %w_arg, 1
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26 %w.0 = shl i32 %w, %shl
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27 %w.1 = lshr i32 %w, %e
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28 %w.2 = or i32 %w.0, %w.1
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29 %xy = or i32 %x.2, %y.2
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30 %zw = or i32 %z.2, %w.2
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31 %xyzw = or i32 %xy, %zw
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32 store i32 %xyzw, i32 addrspace(1)* %out
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33 ret void
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34 }