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1 ; RUN: llc -mtriple=aarch64-apple-ios7.0 -o - %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-DARWINPCS
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2 ; RUN: llc -mtriple=aarch64-linux-gnu -o - %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-AAPCS
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3
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4 declare void @callee(...)
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5
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6 define float @test_hfa_regs(float, [2 x float] %in) {
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7 ; CHECK-LABEL: test_hfa_regs:
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8 ; CHECK: fadd s0, s1, s2
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9
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10 %lhs = extractvalue [2 x float] %in, 0
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11 %rhs = extractvalue [2 x float] %in, 1
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12 %sum = fadd float %lhs, %rhs
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13 ret float %sum
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14 }
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15
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16 ; Check that the array gets allocated to a contiguous block on the stack (rather
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17 ; than the default of 2 8-byte slots).
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18 define float @test_hfa_block([7 x float], [2 x float] %in) {
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19 ; CHECK-LABEL: test_hfa_block:
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20 ; CHECK: ldp [[LHS:s[0-9]+]], [[RHS:s[0-9]+]], [sp]
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21 ; CHECK: fadd s0, [[LHS]], [[RHS]]
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22
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23 %lhs = extractvalue [2 x float] %in, 0
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24 %rhs = extractvalue [2 x float] %in, 1
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25 %sum = fadd float %lhs, %rhs
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26 ret float %sum
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27 }
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28
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29 ; Check that an HFA prevents backfilling of VFP registers (i.e. %rhs must go on
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30 ; the stack rather than in s7).
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31 define float @test_hfa_block_consume([7 x float], [2 x float] %in, float %rhs) {
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32 ; CHECK-LABEL: test_hfa_block_consume:
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33 ; CHECK-DAG: ldr [[LHS:s[0-9]+]], [sp]
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34 ; CHECK-DAG: ldr [[RHS:s[0-9]+]], [sp, #8]
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35 ; CHECK: fadd s0, [[LHS]], [[RHS]]
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36
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37 %lhs = extractvalue [2 x float] %in, 0
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38 %sum = fadd float %lhs, %rhs
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39 ret float %sum
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40 }
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41
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42 define float @test_hfa_stackalign([8 x float], [1 x float], [2 x float] %in) {
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43 ; CHECK-LABEL: test_hfa_stackalign:
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44 ; CHECK-AAPCS: ldp [[LHS:s[0-9]+]], [[RHS:s[0-9]+]], [sp, #8]
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45 ; CHECK-DARWINPCS: ldp [[LHS:s[0-9]+]], [[RHS:s[0-9]+]], [sp, #4]
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46 ; CHECK: fadd s0, [[LHS]], [[RHS]]
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47 %lhs = extractvalue [2 x float] %in, 0
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48 %rhs = extractvalue [2 x float] %in, 1
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49 %sum = fadd float %lhs, %rhs
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50 ret float %sum
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51 }
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52
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53 ; An HFA that ends up on the stack should not have any effect on where
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54 ; integer-based arguments go.
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55 define i64 @test_hfa_ignores_gprs([7 x float], [2 x float] %in, i64, i64 %res) {
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56 ; CHECK-LABEL: test_hfa_ignores_gprs:
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57 ; CHECK: mov x0, x1
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58 ret i64 %res
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59 }
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60
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61 ; [2 x float] should not be promoted to double by the Darwin varargs handling,
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62 ; but should go in an 8-byte aligned slot.
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63 define void @test_varargs_stackalign() {
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64 ; CHECK-LABEL: test_varargs_stackalign:
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65 ; CHECK-DARWINPCS: stp {{w[0-9]+}}, {{w[0-9]+}}, [sp, #16]
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66
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95
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67 call void(...) @callee([3 x float] undef, [2 x float] [float 1.0, float 2.0])
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83
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68 ret void
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69 }
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70
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71 define i64 @test_smallstruct_block([7 x i64], [2 x i64] %in) {
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72 ; CHECK-LABEL: test_smallstruct_block:
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73 ; CHECK: ldp [[LHS:x[0-9]+]], [[RHS:x[0-9]+]], [sp]
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74 ; CHECK: add x0, [[LHS]], [[RHS]]
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75 %lhs = extractvalue [2 x i64] %in, 0
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76 %rhs = extractvalue [2 x i64] %in, 1
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77 %sum = add i64 %lhs, %rhs
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78 ret i64 %sum
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79 }
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80
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81 ; Check that a small struct prevents backfilling of registers (i.e. %rhs
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82 ; must go on the stack rather than in x7).
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83 define i64 @test_smallstruct_block_consume([7 x i64], [2 x i64] %in, i64 %rhs) {
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84 ; CHECK-LABEL: test_smallstruct_block_consume:
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85 ; CHECK-DAG: ldr [[LHS:x[0-9]+]], [sp]
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86 ; CHECK-DAG: ldr [[RHS:x[0-9]+]], [sp, #16]
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87 ; CHECK: add x0, [[LHS]], [[RHS]]
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88
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89 %lhs = extractvalue [2 x i64] %in, 0
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90 %sum = add i64 %lhs, %rhs
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91 ret i64 %sum
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92 }
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93
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94 define <1 x i64> @test_v1i64_blocked([7 x double], [2 x <1 x i64>] %in) {
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95 ; CHECK-LABEL: test_v1i64_blocked:
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96 ; CHECK: ldr d0, [sp]
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97 %val = extractvalue [2 x <1 x i64>] %in, 0
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98 ret <1 x i64> %val
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99 }
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100
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101 define <1 x double> @test_v1f64_blocked([7 x double], [2 x <1 x double>] %in) {
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102 ; CHECK-LABEL: test_v1f64_blocked:
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103 ; CHECK: ldr d0, [sp]
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104 %val = extractvalue [2 x <1 x double>] %in, 0
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105 ret <1 x double> %val
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106 }
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107
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108 define <2 x i32> @test_v2i32_blocked([7 x double], [2 x <2 x i32>] %in) {
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109 ; CHECK-LABEL: test_v2i32_blocked:
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110 ; CHECK: ldr d0, [sp]
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111 %val = extractvalue [2 x <2 x i32>] %in, 0
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112 ret <2 x i32> %val
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113 }
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114
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115 define <2 x float> @test_v2f32_blocked([7 x double], [2 x <2 x float>] %in) {
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116 ; CHECK-LABEL: test_v2f32_blocked:
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117 ; CHECK: ldr d0, [sp]
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118 %val = extractvalue [2 x <2 x float>] %in, 0
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119 ret <2 x float> %val
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120 }
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121
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122 define <4 x i16> @test_v4i16_blocked([7 x double], [2 x <4 x i16>] %in) {
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123 ; CHECK-LABEL: test_v4i16_blocked:
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124 ; CHECK: ldr d0, [sp]
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125 %val = extractvalue [2 x <4 x i16>] %in, 0
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126 ret <4 x i16> %val
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127 }
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128
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129 define <4 x half> @test_v4f16_blocked([7 x double], [2 x <4 x half>] %in) {
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130 ; CHECK-LABEL: test_v4f16_blocked:
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131 ; CHECK: ldr d0, [sp]
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132 %val = extractvalue [2 x <4 x half>] %in, 0
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133 ret <4 x half> %val
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134 }
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135
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136 define <8 x i8> @test_v8i8_blocked([7 x double], [2 x <8 x i8>] %in) {
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137 ; CHECK-LABEL: test_v8i8_blocked:
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138 ; CHECK: ldr d0, [sp]
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139 %val = extractvalue [2 x <8 x i8>] %in, 0
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140 ret <8 x i8> %val
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141 }
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142
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143 define <2 x i64> @test_v2i64_blocked([7 x double], [2 x <2 x i64>] %in) {
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144 ; CHECK-LABEL: test_v2i64_blocked:
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145 ; CHECK: ldr q0, [sp]
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146 %val = extractvalue [2 x <2 x i64>] %in, 0
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147 ret <2 x i64> %val
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148 }
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149
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150 define <2 x double> @test_v2f64_blocked([7 x double], [2 x <2 x double>] %in) {
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151 ; CHECK-LABEL: test_v2f64_blocked:
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152 ; CHECK: ldr q0, [sp]
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153 %val = extractvalue [2 x <2 x double>] %in, 0
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154 ret <2 x double> %val
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155 }
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156
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157 define <4 x i32> @test_v4i32_blocked([7 x double], [2 x <4 x i32>] %in) {
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158 ; CHECK-LABEL: test_v4i32_blocked:
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159 ; CHECK: ldr q0, [sp]
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160 %val = extractvalue [2 x <4 x i32>] %in, 0
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161 ret <4 x i32> %val
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162 }
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163
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164 define <4 x float> @test_v4f32_blocked([7 x double], [2 x <4 x float>] %in) {
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165 ; CHECK-LABEL: test_v4f32_blocked:
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166 ; CHECK: ldr q0, [sp]
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167 %val = extractvalue [2 x <4 x float>] %in, 0
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168 ret <4 x float> %val
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169 }
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170
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171 define <8 x i16> @test_v8i16_blocked([7 x double], [2 x <8 x i16>] %in) {
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172 ; CHECK-LABEL: test_v8i16_blocked:
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173 ; CHECK: ldr q0, [sp]
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174 %val = extractvalue [2 x <8 x i16>] %in, 0
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175 ret <8 x i16> %val
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176 }
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177
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178 define <8 x half> @test_v8f16_blocked([7 x double], [2 x <8 x half>] %in) {
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179 ; CHECK-LABEL: test_v8f16_blocked:
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180 ; CHECK: ldr q0, [sp]
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181 %val = extractvalue [2 x <8 x half>] %in, 0
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182 ret <8 x half> %val
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183 }
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184
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185 define <16 x i8> @test_v16i8_blocked([7 x double], [2 x <16 x i8>] %in) {
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186 ; CHECK-LABEL: test_v16i8_blocked:
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187 ; CHECK: ldr q0, [sp]
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188 %val = extractvalue [2 x <16 x i8>] %in, 0
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189 ret <16 x i8> %val
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190 }
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191
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192 define half @test_f16_blocked([7 x double], [2 x half] %in) {
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193 ; CHECK-LABEL: test_f16_blocked:
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194 ; CHECK: ldr h0, [sp]
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195 %val = extractvalue [2 x half] %in, 0
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196 ret half %val
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197 }
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