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annotate test/CodeGen/AArch64/arm64-fast-isel-ret.ll @ 117:facf19d07cd9

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author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Wed, 24 Aug 2016 20:10:41 +0900
parents afa8332a0e37
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 77
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1 ; RUN: llc -O0 -fast-isel-abort=1 -verify-machineinstrs -mtriple=arm64-apple-darwin < %s | FileCheck %s
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2
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3 ;; Test returns.
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4 define void @t0() nounwind ssp {
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5 entry:
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6 ; CHECK: t0
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7 ; CHECK: ret
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8 ret void
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9 }
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10
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11 define i32 @t1(i32 %a) nounwind ssp {
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12 entry:
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13 ; CHECK: t1
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14 ; CHECK: str w0, [sp, #12]
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15 ; CHECK-NEXT: ldr w0, [sp, #12]
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16 ; CHECK: ret
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17 %a.addr = alloca i32, align 4
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18 store i32 %a, i32* %a.addr, align 4
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19 %tmp = load i32, i32* %a.addr, align 4
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20 ret i32 %tmp
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21 }
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22
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23 define i64 @t2(i64 %a) nounwind ssp {
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24 entry:
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25 ; CHECK: t2
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26 ; CHECK: str x0, [sp, #8]
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27 ; CHECK-NEXT: ldr x0, [sp, #8]
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28 ; CHECK: ret
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29 %a.addr = alloca i64, align 8
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30 store i64 %a, i64* %a.addr, align 8
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31 %tmp = load i64, i64* %a.addr, align 8
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32 ret i64 %tmp
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33 }
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34
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35 define signext i16 @ret_i16(i16 signext %a) nounwind {
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36 entry:
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37 ; CHECK: @ret_i16
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38 ; CHECK: sxth w0, w0
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39 %a.addr = alloca i16, align 1
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40 store i16 %a, i16* %a.addr, align 1
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41 %0 = load i16, i16* %a.addr, align 1
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42 ret i16 %0
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43 }
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44
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45 define signext i8 @ret_i8(i8 signext %a) nounwind {
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46 entry:
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47 ; CHECK: @ret_i8
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48 ; CHECK: sxtb w0, w0
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49 %a.addr = alloca i8, align 1
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50 store i8 %a, i8* %a.addr, align 1
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51 %0 = load i8, i8* %a.addr, align 1
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52 ret i8 %0
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53 }
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54
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55 define signext i1 @ret_i1(i1 signext %a) nounwind {
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56 entry:
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57 ; CHECK: @ret_i1
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58 ; CHECK: and w0, w0, #0x1
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59 %a.addr = alloca i1, align 1
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60 store i1 %a, i1* %a.addr, align 1
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61 %0 = load i1, i1* %a.addr, align 1
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62 ret i1 %0
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63 }