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annotate test/CodeGen/AArch64/arm64-fmax-safe.ll @ 117:facf19d07cd9

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author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Wed, 24 Aug 2016 20:10:41 +0900
parents afa8332a0e37
children 1172e4bd9c6f
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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1 ; RUN: llc -march=arm64 < %s | FileCheck %s
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2
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3 define double @test_direct(float %in) {
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4 ; CHECK-LABEL: test_direct:
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5 %cmp = fcmp olt float %in, 0.000000e+00
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6 %val = select i1 %cmp, float 0.000000e+00, float %in
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7 %longer = fpext float %val to double
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8 ret double %longer
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9
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10 ; CHECK: fmax s
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11 }
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12
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13 define double @test_cross(float %in) {
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14 ; CHECK-LABEL: test_cross:
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15 %cmp = fcmp ult float %in, 0.000000e+00
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16 %val = select i1 %cmp, float %in, float 0.000000e+00
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17 %longer = fpext float %val to double
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18 ret double %longer
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19
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20 ; CHECK: fmin s
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21 }
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22
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23 ; Same as previous, but with ordered comparison;
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24 ; must become fminnm, not fmin.
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25 define double @test_cross_fail_nan(float %in) {
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26 ; CHECK-LABEL: test_cross_fail_nan:
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27 %cmp = fcmp olt float %in, 0.000000e+00
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28 %val = select i1 %cmp, float %in, float 0.000000e+00
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29 %longer = fpext float %val to double
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30 ret double %longer
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31
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32 ; CHECK: fminnm s
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33 }
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34
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35 ; This isn't a min or a max, but passes the first condition for swapping the
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36 ; results. Make sure they're put back before we resort to the normal fcsel.
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37 define float @test_cross_fail(float %lhs, float %rhs) {
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38 ; CHECK-LABEL: test_cross_fail:
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39 %tst = fcmp une float %lhs, %rhs
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40 %res = select i1 %tst, float %rhs, float %lhs
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41 ret float %res
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42
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43 ; The register allocator would have to decide to be deliberately obtuse before
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44 ; other register were used.
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45 ; CHECK: fcsel s0, s1, s0, ne
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46 }
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47
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48 ; Make sure the transformation isn't triggered for integers
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49 define i64 @test_integer(i64 %in) {
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50 %cmp = icmp slt i64 %in, 0
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51 %val = select i1 %cmp, i64 0, i64 %in
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52 ret i64 %val
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53 }