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annotate test/CodeGen/AArch64/arm64-memcpy-inline.ll @ 117:facf19d07cd9

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check EHStack on EmitCall (CbC goto)
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Wed, 24 Aug 2016 20:10:41 +0900
parents afa8332a0e37
children 1172e4bd9c6f
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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1 ; RUN: llc < %s -march=arm64 -mcpu=cyclone | FileCheck %s
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2
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3 %struct.x = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8 }
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4
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5 @src = external global %struct.x
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6 @dst = external global %struct.x
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7
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8 @.str1 = private unnamed_addr constant [31 x i8] c"DHRYSTONE PROGRAM, SOME STRING\00", align 1
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9 @.str2 = private unnamed_addr constant [36 x i8] c"DHRYSTONE PROGRAM, SOME STRING BLAH\00", align 1
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10 @.str3 = private unnamed_addr constant [24 x i8] c"DHRYSTONE PROGRAM, SOME\00", align 1
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11 @.str4 = private unnamed_addr constant [18 x i8] c"DHRYSTONE PROGR \00", align 1
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12 @.str5 = private unnamed_addr constant [7 x i8] c"DHRYST\00", align 1
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13 @.str6 = private unnamed_addr constant [14 x i8] c"/tmp/rmXXXXXX\00", align 1
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14 @spool.splbuf = internal global [512 x i8] zeroinitializer, align 16
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15
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16 define i32 @t0() {
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17 entry:
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18 ; CHECK-LABEL: t0:
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19 ; CHECK: ldrb [[REG0:w[0-9]+]], [x[[BASEREG:[0-9]+]], #10]
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20 ; CHECK: strb [[REG0]], [x[[BASEREG2:[0-9]+]], #10]
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21 ; CHECK: ldrh [[REG1:w[0-9]+]], [x[[BASEREG]], #8]
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22 ; CHECK: strh [[REG1]], [x[[BASEREG2]], #8]
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23 ; CHECK: ldr [[REG2:x[0-9]+]],
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24 ; CHECK: str [[REG2]],
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25 call void @llvm.memcpy.p0i8.p0i8.i32(i8* getelementptr inbounds (%struct.x, %struct.x* @dst, i32 0, i32 0), i8* getelementptr inbounds (%struct.x, %struct.x* @src, i32 0, i32 0), i32 11, i32 8, i1 false)
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26 ret i32 0
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27 }
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28
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29 define void @t1(i8* nocapture %C) nounwind {
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30 entry:
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31 ; CHECK-LABEL: t1:
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32 ; CHECK: ldur [[DEST:q[0-9]+]], [x[[BASEREG:[0-9]+]], #15]
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33 ; CHECK: stur [[DEST]], [x0, #15]
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34 ; CHECK: ldr [[DEST:q[0-9]+]], [x[[BASEREG]]]
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35 ; CHECK: str [[DEST]], [x0]
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36 tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str1, i64 0, i64 0), i64 31, i32 1, i1 false)
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37 ret void
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38 }
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39
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40 define void @t2(i8* nocapture %C) nounwind {
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41 entry:
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42 ; CHECK-LABEL: t2:
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43 ; CHECK: movz [[REG3:w[0-9]+]]
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44 ; CHECK: movk [[REG3]],
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45 ; CHECK: str [[REG3]], [x0, #32]
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46 ; CHECK: ldp [[DEST1:q[0-9]+]], [[DEST2:q[0-9]+]], [x{{[0-9]+}}]
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47 ; CHECK: stp [[DEST1]], [[DEST2]], [x0]
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48 tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str2, i64 0, i64 0), i64 36, i32 1, i1 false)
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49 ret void
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50 }
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51
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52 define void @t3(i8* nocapture %C) nounwind {
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53 entry:
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54 ; CHECK-LABEL: t3:
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55 ; CHECK: ldr [[REG4:x[0-9]+]], [x[[BASEREG:[0-9]+]], #16]
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56 ; CHECK: str [[REG4]], [x0, #16]
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57 ; CHECK: ldr [[DEST:q[0-9]+]], [x[[BASEREG]]]
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58 ; CHECK: str [[DEST]], [x0]
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59 tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str3, i64 0, i64 0), i64 24, i32 1, i1 false)
77
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60 ret void
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61 }
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62
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63 define void @t4(i8* nocapture %C) nounwind {
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64 entry:
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65 ; CHECK-LABEL: t4:
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66 ; CHECK: orr [[REG5:w[0-9]+]], wzr, #0x20
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67 ; CHECK: strh [[REG5]], [x0, #16]
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68 ; CHECK: ldr [[REG6:q[0-9]+]], [x{{[0-9]+}}]
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69 ; CHECK: str [[REG6]], [x0]
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70 tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str4, i64 0, i64 0), i64 18, i32 1, i1 false)
77
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71 ret void
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72 }
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73
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74 define void @t5(i8* nocapture %C) nounwind {
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75 entry:
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76 ; CHECK-LABEL: t5:
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77 ; CHECK: strb wzr, [x0, #6]
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78 ; CHECK: movz [[REG7:w[0-9]+]], #0x5453
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79 ; CHECK: strh [[REG7]], [x0, #4]
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80 ; CHECK: movz [[REG8:w[0-9]+]],
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81 ; CHECK: movk [[REG8]],
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82 ; CHECK: str [[REG8]], [x0]
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83 tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str5, i64 0, i64 0), i64 7, i32 1, i1 false)
77
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84 ret void
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85 }
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86
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87 define void @t6() nounwind {
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88 entry:
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89 ; CHECK-LABEL: t6:
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90 ; CHECK: ldur [[REG9:x[0-9]+]], [x{{[0-9]+}}, #6]
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91 ; CHECK: stur [[REG9]], [x{{[0-9]+}}, #6]
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92 ; CHECK: ldr
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93 ; CHECK: str
95
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94 call void @llvm.memcpy.p0i8.p0i8.i64(i8* getelementptr inbounds ([512 x i8], [512 x i8]* @spool.splbuf, i64 0, i64 0), i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str6, i64 0, i64 0), i64 14, i32 1, i1 false)
77
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95 ret void
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96 }
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97
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98 %struct.Foo = type { i32, i32, i32, i32 }
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99
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100 define void @t7(%struct.Foo* nocapture %a, %struct.Foo* nocapture %b) nounwind {
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101 entry:
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102 ; CHECK: t7
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103 ; CHECK: ldr [[REG10:q[0-9]+]], [x1]
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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104 ; CHECK: str [[REG10]], [x0]
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105 %0 = bitcast %struct.Foo* %a to i8*
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106 %1 = bitcast %struct.Foo* %b to i8*
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107 tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %0, i8* %1, i32 16, i32 4, i1 false)
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108 ret void
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109 }
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110
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111 declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
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112 declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind