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annotate test/CodeGen/Mips/bswap.ll @ 117:facf19d07cd9

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check EHStack on EmitCall (CbC goto)
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Wed, 24 Aug 2016 20:10:41 +0900
parents 60c9769439b8
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
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95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1 ; RUN: llc < %s -march=mipsel -mcpu=mips32r2 | FileCheck %s -check-prefix=MIPS32
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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2 ; RUN: llc < %s -march=mips64el -mcpu=mips64r2 | FileCheck %s -check-prefix=MIPS64
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54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
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3 ; RUN: llc < %s -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips32r2 -mattr=+mips16 | FileCheck %s -check-prefix=MIPS16
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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4
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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5 define i32 @bswap32(i32 signext %x) nounwind readnone {
0
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6 entry:
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7 ; MIPS32-LABEL: bswap32:
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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8 ; MIPS32: wsbh $[[R0:[0-9]+]]
95c75e76d11b LLVM 3.4
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parents:
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9 ; MIPS32: rotr ${{[0-9]+}}, $[[R0]], 16
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
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10
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
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11 ; MIPS64-LABEL: bswap32:
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
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12 ; MIPS64: wsbh $[[R0:[0-9]+]]
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
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13 ; MIPS64: rotr ${{[0-9]+}}, $[[R0]], 16
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
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14
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
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15 ; MIPS16-LABEL: bswap32:
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
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16 ; MIPS16-DAG: srl $[[R0:[0-9]+]], $4, 8
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
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17 ; MIPS16-DAG: srl $[[R1:[0-9]+]], $4, 24
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
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18 ; MIPS16-DAG: sll $[[R2:[0-9]+]], $4, 8
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
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19 ; MIPS16-DAG: sll $[[R3:[0-9]+]], $4, 24
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
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20 ; MIPS16-DAG: li $[[R4:[0-9]+]], 65280
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
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21 ; MIPS16-DAG: and $[[R4]], $[[R0]]
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
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22 ; MIPS16-DAG: or $[[R1]], $[[R4]]
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
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23 ; MIPS16-DAG: lw $[[R7:[0-9]+]], $CPI
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
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24 ; MIPS16-DAG: and $[[R7]], $[[R2]]
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parents: 33
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25 ; MIPS16-DAG: or $[[R3]], $[[R7]]
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parents: 33
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26 ; MIPS16-DAG: or $[[R3]], $[[R1]]
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parents: 33
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27
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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28 %or.3 = call i32 @llvm.bswap.i32(i32 %x)
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29 ret i32 %or.3
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30 }
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31
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parents: 77
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32 define i64 @bswap64(i64 signext %x) nounwind readnone {
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33 entry:
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parents: 33
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34 ; MIPS32-LABEL: bswap64:
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parents: 33
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35 ; MIPS32: wsbh $[[R0:[0-9]+]]
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
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36 ; MIPS32: rotr ${{[0-9]+}}, $[[R0]], 16
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
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37 ; MIPS32: wsbh $[[R0:[0-9]+]]
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
diff changeset
38 ; MIPS32: rotr ${{[0-9]+}}, $[[R0]], 16
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
diff changeset
39
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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40 ; MIPS64-LABEL: bswap64:
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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41 ; MIPS64: dsbh $[[R0:[0-9]+]]
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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42 ; MIPS64: dshd ${{[0-9]+}}, $[[R0]]
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parents: 33
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43
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
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44 ; MIPS16-LABEL: bswap64:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
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45 ; MIPS16-DAG: srl $[[R0:[0-9]+]], $5, 8
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
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46 ; MIPS16-DAG: srl $[[R1:[0-9]+]], $5, 24
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
diff changeset
47 ; MIPS16-DAG: sll $[[R2:[0-9]+]], $5, 8
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
diff changeset
48 ; MIPS16-DAG: sll $[[R3:[0-9]+]], $5, 24
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
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49 ; MIPS16-DAG: li $[[R4:[0-9]+]], 65280
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
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50 ; MIPS16-DAG: and $[[R0]], $[[R4]]
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
diff changeset
51 ; MIPS16-DAG: or $[[R1]], $[[R0]]
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
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52 ; MIPS16-DAG: lw $[[R7:[0-9]+]], 1f
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
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53 ; MIPS16-DAG: and $[[R2]], $[[R7]]
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
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54 ; MIPS16-DAG: or $[[R3]], $[[R2]]
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
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55 ; MIPS16-DAG: or $[[R3]], $[[R1]]
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
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56 ; MIPS16-DAG: srl $[[R0:[0-9]+]], $4, 8
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
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57 ; MIPS16-DAG: srl $[[R1:[0-9]+]], $4, 24
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
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58 ; MIPS16-DAG: sll $[[R2:[0-9]+]], $4, 8
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
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59 ; MIPS16-DAG: sll $[[R3:[0-9]+]], $4, 24
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
diff changeset
60 ; MIPS16-DAG: li $[[R4:[0-9]+]], 65280
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
diff changeset
61 ; MIPS16-DAG: and $[[R0]], $[[R4]]
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
diff changeset
62 ; MIPS16-DAG: or $[[R1]], $[[R0]]
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
diff changeset
63 ; MIPS16-DAG: lw $[[R7:[0-9]+]], 1f
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
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64 ; MIPS16-DAG: and $[[R2]], $[[R7]]
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
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65 ; MIPS16-DAG: or $[[R3]], $[[R2]]
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
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66 ; MIPS16-DAG: or $[[R3]], $[[R1]]
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parents: 33
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67
0
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parents:
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68 %or.7 = call i64 @llvm.bswap.i64(i64 %x)
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69 ret i64 %or.7
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70 }
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71
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parents: 33
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72 define <4 x i32> @bswapv4i32(<4 x i32> %x) nounwind readnone {
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parents: 33
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73 entry:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
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74 ; MIPS32-LABEL: bswapv4i32:
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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75 ; MIPS32-DAG: wsbh $[[R0:[0-9]+]]
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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76 ; MIPS32-DAG: rotr ${{[0-9]+}}, $[[R0]], 16
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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77 ; MIPS32-DAG: wsbh $[[R0:[0-9]+]]
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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78 ; MIPS32-DAG: rotr ${{[0-9]+}}, $[[R0]], 16
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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79 ; MIPS32-DAG: wsbh $[[R0:[0-9]+]]
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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80 ; MIPS32-DAG: rotr ${{[0-9]+}}, $[[R0]], 16
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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81 ; MIPS32-DAG: wsbh $[[R0:[0-9]+]]
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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82 ; MIPS32-DAG: rotr ${{[0-9]+}}, $[[R0]], 16
77
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
diff changeset
83
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 33
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84 ; MIPS64-LABEL: bswapv4i32:
83
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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85 ; MIPS64-DAG: wsbh $[[R0:[0-9]+]]
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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86 ; MIPS64-DAG: rotr ${{[0-9]+}}, $[[R0]], 16
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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87 ; MIPS64-DAG: wsbh $[[R0:[0-9]+]]
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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88 ; MIPS64-DAG: rotr ${{[0-9]+}}, $[[R0]], 16
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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89 ; MIPS64-DAG: wsbh $[[R0:[0-9]+]]
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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90 ; MIPS64-DAG: rotr ${{[0-9]+}}, $[[R0]], 16
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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91 ; MIPS64-DAG: wsbh $[[R0:[0-9]+]]
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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92 ; MIPS64-DAG: rotr ${{[0-9]+}}, $[[R0]], 16
77
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parents: 33
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93
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parents: 33
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94 ; Don't bother with a MIPS16 version. It's just bswap32 repeated four times and
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parents: 33
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95 ; would be very long
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parents: 33
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96
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parents: 33
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97 %ret = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %x)
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parents: 33
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98 ret <4 x i32> %ret
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parents: 33
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99 }
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parents: 33
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100
0
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parents:
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101 declare i32 @llvm.bswap.i32(i32) nounwind readnone
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102
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103 declare i64 @llvm.bswap.i64(i64) nounwind readnone
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104
77
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parents: 33
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105 declare <4 x i32> @llvm.bswap.v4i32(<4 x i32>) nounwind readnone