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annotate lib/Target/X86/README-MMX.txt @ 128:c347d3398279 default tip

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fix
author mir3636
date Wed, 06 Dec 2017 14:37:17 +0900
parents 95c75e76d11b
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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1 //===---------------------------------------------------------------------===//
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2 // Random ideas for the X86 backend: MMX-specific stuff.
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3 //===---------------------------------------------------------------------===//
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4
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5 //===---------------------------------------------------------------------===//
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6
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7 This:
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8
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9 #include <mmintrin.h>
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10
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11 __v2si qux(int A) {
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12 return (__v2si){ 0, A };
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13 }
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14
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15 is compiled into:
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16
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17 _qux:
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18 subl $28, %esp
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19 movl 32(%esp), %eax
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20 movd %eax, %mm0
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21 movq %mm0, (%esp)
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22 movl (%esp), %eax
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23 movl %eax, 20(%esp)
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24 movq %mm0, 8(%esp)
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25 movl 12(%esp), %eax
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26 movl %eax, 16(%esp)
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27 movq 16(%esp), %mm0
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28 addl $28, %esp
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29 ret
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30
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31 Yuck!
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32
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33 GCC gives us:
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34
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35 _qux:
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36 subl $12, %esp
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37 movl 16(%esp), %eax
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38 movl 20(%esp), %edx
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39 movl $0, (%eax)
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40 movl %edx, 4(%eax)
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41 addl $12, %esp
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42 ret $4
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43
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44 //===---------------------------------------------------------------------===//
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45
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46 We generate crappy code for this:
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47
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48 __m64 t() {
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49 return _mm_cvtsi32_si64(1);
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50 }
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51
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52 _t:
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53 subl $12, %esp
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54 movl $1, %eax
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55 movd %eax, %mm0
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56 movq %mm0, (%esp)
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57 movl (%esp), %eax
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58 movl 4(%esp), %edx
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59 addl $12, %esp
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60 ret
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61
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62 The extra stack traffic is covered in the previous entry. But the other reason
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63 is we are not smart about materializing constants in MMX registers. With -m64
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64
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65 movl $1, %eax
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66 movd %eax, %mm0
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67 movd %mm0, %rax
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68 ret
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69
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70 We should be using a constantpool load instead:
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71 movq LC0(%rip), %rax