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annotate test/CodeGen/AArch64/arm64-fmuladd.ll @ 128:c347d3398279 default tip

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fix
author mir3636
date Wed, 06 Dec 2017 14:37:17 +0900
parents 1172e4bd9c6f
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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1172e4bd9c6f update 4.0.0
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1 ; RUN: llc < %s -asm-verbose=false -mtriple=arm64-eabi -aarch64-neon-syntax=apple | FileCheck %s
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2
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3 define float @test_f32(float* %A, float* %B, float* %C) nounwind {
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4 ;CHECK-LABEL: test_f32:
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5 ;CHECK: fmadd
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6 ;CHECK-NOT: fmadd
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7 %tmp1 = load float, float* %A
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8 %tmp2 = load float, float* %B
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9 %tmp3 = load float, float* %C
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10 %tmp4 = call float @llvm.fmuladd.f32(float %tmp1, float %tmp2, float %tmp3)
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11 ret float %tmp4
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12 }
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13
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14 define <2 x float> @test_v2f32(<2 x float>* %A, <2 x float>* %B, <2 x float>* %C) nounwind {
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15 ;CHECK-LABEL: test_v2f32:
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16 ;CHECK: fmla.2s
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17 ;CHECK-NOT: fmla.2s
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18 %tmp1 = load <2 x float>, <2 x float>* %A
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19 %tmp2 = load <2 x float>, <2 x float>* %B
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20 %tmp3 = load <2 x float>, <2 x float>* %C
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21 %tmp4 = call <2 x float> @llvm.fmuladd.v2f32(<2 x float> %tmp1, <2 x float> %tmp2, <2 x float> %tmp3)
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22 ret <2 x float> %tmp4
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23 }
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24
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25 define <4 x float> @test_v4f32(<4 x float>* %A, <4 x float>* %B, <4 x float>* %C) nounwind {
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26 ;CHECK-LABEL: test_v4f32:
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27 ;CHECK: fmla.4s
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28 ;CHECK-NOT: fmla.4s
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29 %tmp1 = load <4 x float>, <4 x float>* %A
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30 %tmp2 = load <4 x float>, <4 x float>* %B
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31 %tmp3 = load <4 x float>, <4 x float>* %C
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32 %tmp4 = call <4 x float> @llvm.fmuladd.v4f32(<4 x float> %tmp1, <4 x float> %tmp2, <4 x float> %tmp3)
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33 ret <4 x float> %tmp4
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34 }
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35
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36 define <8 x float> @test_v8f32(<8 x float>* %A, <8 x float>* %B, <8 x float>* %C) nounwind {
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37 ;CHECK-LABEL: test_v8f32:
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38 ;CHECK: fmla.4s
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39 ;CHECK: fmla.4s
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40 ;CHECK-NOT: fmla.4s
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41 %tmp1 = load <8 x float>, <8 x float>* %A
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42 %tmp2 = load <8 x float>, <8 x float>* %B
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43 %tmp3 = load <8 x float>, <8 x float>* %C
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44 %tmp4 = call <8 x float> @llvm.fmuladd.v8f32(<8 x float> %tmp1, <8 x float> %tmp2, <8 x float> %tmp3)
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45 ret <8 x float> %tmp4
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46 }
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48 define double @test_f64(double* %A, double* %B, double* %C) nounwind {
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49 ;CHECK-LABEL: test_f64:
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50 ;CHECK: fmadd
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51 ;CHECK-NOT: fmadd
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52 %tmp1 = load double, double* %A
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53 %tmp2 = load double, double* %B
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54 %tmp3 = load double, double* %C
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55 %tmp4 = call double @llvm.fmuladd.f64(double %tmp1, double %tmp2, double %tmp3)
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56 ret double %tmp4
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57 }
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59 define <2 x double> @test_v2f64(<2 x double>* %A, <2 x double>* %B, <2 x double>* %C) nounwind {
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60 ;CHECK-LABEL: test_v2f64:
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61 ;CHECK: fmla.2d
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62 ;CHECK-NOT: fmla.2d
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63 %tmp1 = load <2 x double>, <2 x double>* %A
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64 %tmp2 = load <2 x double>, <2 x double>* %B
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65 %tmp3 = load <2 x double>, <2 x double>* %C
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66 %tmp4 = call <2 x double> @llvm.fmuladd.v2f64(<2 x double> %tmp1, <2 x double> %tmp2, <2 x double> %tmp3)
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67 ret <2 x double> %tmp4
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68 }
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70 define <4 x double> @test_v4f64(<4 x double>* %A, <4 x double>* %B, <4 x double>* %C) nounwind {
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71 ;CHECK-LABEL: test_v4f64:
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72 ;CHECK: fmla.2d
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73 ;CHECK: fmla.2d
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74 ;CHECK-NOT: fmla.2d
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75 %tmp1 = load <4 x double>, <4 x double>* %A
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76 %tmp2 = load <4 x double>, <4 x double>* %B
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77 %tmp3 = load <4 x double>, <4 x double>* %C
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78 %tmp4 = call <4 x double> @llvm.fmuladd.v4f64(<4 x double> %tmp1, <4 x double> %tmp2, <4 x double> %tmp3)
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79 ret <4 x double> %tmp4
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80 }
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81
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82 declare float @llvm.fmuladd.f32(float, float, float) nounwind readnone
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83 declare <2 x float> @llvm.fmuladd.v2f32(<2 x float>, <2 x float>, <2 x float>) nounwind readnone
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84 declare <4 x float> @llvm.fmuladd.v4f32(<4 x float>, <4 x float>, <4 x float>) nounwind readnone
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85 declare <8 x float> @llvm.fmuladd.v8f32(<8 x float>, <8 x float>, <8 x float>) nounwind readnone
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86 declare double @llvm.fmuladd.f64(double, double, double) nounwind readnone
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87 declare <2 x double> @llvm.fmuladd.v2f64(<2 x double>, <2 x double>, <2 x double>) nounwind readnone
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88 declare <4 x double> @llvm.fmuladd.v4f64(<4 x double>, <4 x double>, <4 x double>) nounwind readnone