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1 ; RUN: opt -S -mtriple=amdgcn-unknown-amdhsa -amdgpu-annotate-kernel-features %s | FileCheck -check-prefix=HSA %s
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2
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3 declare i32 @llvm.amdgcn.workgroup.id.x() #0
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4 declare i32 @llvm.amdgcn.workgroup.id.y() #0
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5 declare i32 @llvm.amdgcn.workgroup.id.z() #0
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6
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7 declare i32 @llvm.amdgcn.workitem.id.x() #0
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8 declare i32 @llvm.amdgcn.workitem.id.y() #0
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9 declare i32 @llvm.amdgcn.workitem.id.z() #0
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10
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11 declare i8 addrspace(2)* @llvm.amdgcn.dispatch.ptr() #0
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12 declare i8 addrspace(2)* @llvm.amdgcn.queue.ptr() #0
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13 declare i8 addrspace(2)* @llvm.amdgcn.kernarg.segment.ptr() #0
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14 declare i8 addrspace(2)* @llvm.amdgcn.implicitarg.ptr() #0
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15 declare i64 @llvm.amdgcn.dispatch.id() #0
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16
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17 ; HSA: define void @use_workitem_id_x() #1 {
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18 define void @use_workitem_id_x() #1 {
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19 %val = call i32 @llvm.amdgcn.workitem.id.x()
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20 store volatile i32 %val, i32 addrspace(1)* undef
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21 ret void
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22 }
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23
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24 ; HSA: define void @use_workitem_id_y() #2 {
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25 define void @use_workitem_id_y() #1 {
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26 %val = call i32 @llvm.amdgcn.workitem.id.y()
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27 store volatile i32 %val, i32 addrspace(1)* undef
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28 ret void
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29 }
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30
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31 ; HSA: define void @use_workitem_id_z() #3 {
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32 define void @use_workitem_id_z() #1 {
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33 %val = call i32 @llvm.amdgcn.workitem.id.z()
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34 store volatile i32 %val, i32 addrspace(1)* undef
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35 ret void
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36 }
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37
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38 ; HSA: define void @use_workgroup_id_x() #4 {
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39 define void @use_workgroup_id_x() #1 {
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40 %val = call i32 @llvm.amdgcn.workgroup.id.x()
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41 store volatile i32 %val, i32 addrspace(1)* undef
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42 ret void
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43 }
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44
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45 ; HSA: define void @use_workgroup_id_y() #5 {
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46 define void @use_workgroup_id_y() #1 {
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47 %val = call i32 @llvm.amdgcn.workgroup.id.y()
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48 store volatile i32 %val, i32 addrspace(1)* undef
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49 ret void
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50 }
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51
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52 ; HSA: define void @use_workgroup_id_z() #6 {
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53 define void @use_workgroup_id_z() #1 {
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54 %val = call i32 @llvm.amdgcn.workgroup.id.z()
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55 store volatile i32 %val, i32 addrspace(1)* undef
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56 ret void
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57 }
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58
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59 ; HSA: define void @use_dispatch_ptr() #7 {
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60 define void @use_dispatch_ptr() #1 {
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61 %dispatch.ptr = call i8 addrspace(2)* @llvm.amdgcn.dispatch.ptr()
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62 store volatile i8 addrspace(2)* %dispatch.ptr, i8 addrspace(2)* addrspace(1)* undef
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63 ret void
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64 }
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65
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66 ; HSA: define void @use_queue_ptr() #8 {
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67 define void @use_queue_ptr() #1 {
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68 %queue.ptr = call i8 addrspace(2)* @llvm.amdgcn.queue.ptr()
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69 store volatile i8 addrspace(2)* %queue.ptr, i8 addrspace(2)* addrspace(1)* undef
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70 ret void
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71 }
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72
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73 ; HSA: define void @use_dispatch_id() #9 {
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74 define void @use_dispatch_id() #1 {
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75 %val = call i64 @llvm.amdgcn.dispatch.id()
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76 store volatile i64 %val, i64 addrspace(1)* undef
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77 ret void
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78 }
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79
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80 ; HSA: define void @use_workgroup_id_y_workgroup_id_z() #10 {
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81 define void @use_workgroup_id_y_workgroup_id_z() #1 {
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82 %val0 = call i32 @llvm.amdgcn.workgroup.id.y()
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83 %val1 = call i32 @llvm.amdgcn.workgroup.id.z()
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84 store volatile i32 %val0, i32 addrspace(1)* undef
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85 store volatile i32 %val1, i32 addrspace(1)* undef
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86 ret void
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87 }
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88
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89 ; HSA: define void @func_indirect_use_workitem_id_x() #1 {
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90 define void @func_indirect_use_workitem_id_x() #1 {
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91 call void @use_workitem_id_x()
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92 ret void
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93 }
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94
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95 ; HSA: define void @kernel_indirect_use_workitem_id_x() #1 {
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96 define void @kernel_indirect_use_workitem_id_x() #1 {
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97 call void @use_workitem_id_x()
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98 ret void
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99 }
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100
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101 ; HSA: define void @func_indirect_use_workitem_id_y() #2 {
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102 define void @func_indirect_use_workitem_id_y() #1 {
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103 call void @use_workitem_id_y()
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104 ret void
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105 }
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106
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107 ; HSA: define void @func_indirect_use_workitem_id_z() #3 {
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108 define void @func_indirect_use_workitem_id_z() #1 {
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109 call void @use_workitem_id_z()
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110 ret void
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111 }
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112
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113 ; HSA: define void @func_indirect_use_workgroup_id_x() #4 {
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114 define void @func_indirect_use_workgroup_id_x() #1 {
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115 call void @use_workgroup_id_x()
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116 ret void
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117 }
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118
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119 ; HSA: define void @kernel_indirect_use_workgroup_id_x() #4 {
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120 define void @kernel_indirect_use_workgroup_id_x() #1 {
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121 call void @use_workgroup_id_x()
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122 ret void
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123 }
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124
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125 ; HSA: define void @func_indirect_use_workgroup_id_y() #5 {
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126 define void @func_indirect_use_workgroup_id_y() #1 {
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127 call void @use_workgroup_id_y()
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128 ret void
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129 }
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130
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131 ; HSA: define void @func_indirect_use_workgroup_id_z() #6 {
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132 define void @func_indirect_use_workgroup_id_z() #1 {
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133 call void @use_workgroup_id_z()
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134 ret void
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135 }
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136
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137 ; HSA: define void @func_indirect_indirect_use_workgroup_id_y() #5 {
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138 define void @func_indirect_indirect_use_workgroup_id_y() #1 {
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139 call void @func_indirect_use_workgroup_id_y()
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140 ret void
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141 }
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142
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143 ; HSA: define void @indirect_x2_use_workgroup_id_y() #5 {
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144 define void @indirect_x2_use_workgroup_id_y() #1 {
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145 call void @func_indirect_indirect_use_workgroup_id_y()
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146 ret void
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147 }
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148
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149 ; HSA: define void @func_indirect_use_dispatch_ptr() #7 {
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150 define void @func_indirect_use_dispatch_ptr() #1 {
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151 call void @use_dispatch_ptr()
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152 ret void
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153 }
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154
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155 ; HSA: define void @func_indirect_use_queue_ptr() #8 {
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156 define void @func_indirect_use_queue_ptr() #1 {
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157 call void @use_queue_ptr()
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158 ret void
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159 }
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160
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161 ; HSA: define void @func_indirect_use_dispatch_id() #9 {
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162 define void @func_indirect_use_dispatch_id() #1 {
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163 call void @use_dispatch_id()
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164 ret void
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165 }
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166
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167 ; HSA: define void @func_indirect_use_workgroup_id_y_workgroup_id_z() #11 {
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168 define void @func_indirect_use_workgroup_id_y_workgroup_id_z() #1 {
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169 call void @func_indirect_use_workgroup_id_y_workgroup_id_z()
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170 ret void
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171 }
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172
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173 ; HSA: define void @recursive_use_workitem_id_y() #2 {
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174 define void @recursive_use_workitem_id_y() #1 {
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175 %val = call i32 @llvm.amdgcn.workitem.id.y()
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176 store volatile i32 %val, i32 addrspace(1)* undef
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177 call void @recursive_use_workitem_id_y()
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178 ret void
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179 }
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180
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181 ; HSA: define void @call_recursive_use_workitem_id_y() #2 {
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182 define void @call_recursive_use_workitem_id_y() #1 {
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183 call void @recursive_use_workitem_id_y()
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184 ret void
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185 }
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186
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187 ; HSA: define void @use_group_to_flat_addrspacecast(i32 addrspace(3)* %ptr) #8 {
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188 define void @use_group_to_flat_addrspacecast(i32 addrspace(3)* %ptr) #1 {
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189 %stof = addrspacecast i32 addrspace(3)* %ptr to i32 addrspace(4)*
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190 store volatile i32 0, i32 addrspace(4)* %stof
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191 ret void
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192 }
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193
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194 ; HSA: define void @use_group_to_flat_addrspacecast_gfx9(i32 addrspace(3)* %ptr) #12 {
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195 define void @use_group_to_flat_addrspacecast_gfx9(i32 addrspace(3)* %ptr) #2 {
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196 %stof = addrspacecast i32 addrspace(3)* %ptr to i32 addrspace(4)*
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197 store volatile i32 0, i32 addrspace(4)* %stof
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198 ret void
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199 }
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200
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201 ; HSA: define void @use_group_to_flat_addrspacecast_queue_ptr_gfx9(i32 addrspace(3)* %ptr) #13 {
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202 define void @use_group_to_flat_addrspacecast_queue_ptr_gfx9(i32 addrspace(3)* %ptr) #2 {
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203 %stof = addrspacecast i32 addrspace(3)* %ptr to i32 addrspace(4)*
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204 store volatile i32 0, i32 addrspace(4)* %stof
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205 call void @func_indirect_use_queue_ptr()
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206 ret void
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207 }
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208
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209 ; HSA: define void @indirect_use_group_to_flat_addrspacecast() #8 {
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210 define void @indirect_use_group_to_flat_addrspacecast() #1 {
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211 call void @use_group_to_flat_addrspacecast(i32 addrspace(3)* null)
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212 ret void
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213 }
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214
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215 ; HSA: define void @indirect_use_group_to_flat_addrspacecast_gfx9() #11 {
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216 define void @indirect_use_group_to_flat_addrspacecast_gfx9() #1 {
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217 call void @use_group_to_flat_addrspacecast_gfx9(i32 addrspace(3)* null)
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218 ret void
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219 }
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220
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221 ; HSA: define void @indirect_use_group_to_flat_addrspacecast_queue_ptr_gfx9() #8 {
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222 define void @indirect_use_group_to_flat_addrspacecast_queue_ptr_gfx9() #1 {
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223 call void @use_group_to_flat_addrspacecast_queue_ptr_gfx9(i32 addrspace(3)* null)
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224 ret void
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225 }
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226
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227 ; HSA: define void @use_kernarg_segment_ptr() #14 {
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228 define void @use_kernarg_segment_ptr() #1 {
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229 %kernarg.segment.ptr = call i8 addrspace(2)* @llvm.amdgcn.kernarg.segment.ptr()
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230 store volatile i8 addrspace(2)* %kernarg.segment.ptr, i8 addrspace(2)* addrspace(1)* undef
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231 ret void
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232 }
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233
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234 ; HSA: define void @func_indirect_use_kernarg_segment_ptr() #14 {
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235 define void @func_indirect_use_kernarg_segment_ptr() #1 {
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236 call void @use_kernarg_segment_ptr()
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237 ret void
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238 }
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239
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240 ; HSA: define amdgpu_kernel void @kern_use_implicitarg_ptr() #15 {
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241 define amdgpu_kernel void @kern_use_implicitarg_ptr() #1 {
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242 %implicitarg.ptr = call i8 addrspace(2)* @llvm.amdgcn.implicitarg.ptr()
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243 store volatile i8 addrspace(2)* %implicitarg.ptr, i8 addrspace(2)* addrspace(1)* undef
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244 ret void
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245 }
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246
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247 ; HSA: define void @use_implicitarg_ptr() #15 {
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248 define void @use_implicitarg_ptr() #1 {
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249 %implicitarg.ptr = call i8 addrspace(2)* @llvm.amdgcn.implicitarg.ptr()
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250 store volatile i8 addrspace(2)* %implicitarg.ptr, i8 addrspace(2)* addrspace(1)* undef
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251 ret void
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252 }
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253
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254 ; HSA: define void @func_indirect_use_implicitarg_ptr() #15 {
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255 define void @func_indirect_use_implicitarg_ptr() #1 {
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256 call void @use_implicitarg_ptr()
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257 ret void
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258 }
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259
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260 ; HSA: declare void @external.func() #16
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261 declare void @external.func() #3
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262
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263 ; HSA: define internal void @defined.func() #16 {
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264 define internal void @defined.func() #3 {
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265 ret void
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266 }
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267
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268 ; HSA: define void @func_call_external() #16 {
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269 define void @func_call_external() #3 {
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270 call void @external.func()
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271 ret void
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272 }
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273
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274 ; HSA: define void @func_call_defined() #16 {
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275 define void @func_call_defined() #3 {
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276 call void @defined.func()
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277 ret void
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278 }
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279
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280 ; HSA: define void @func_call_asm() #16 {
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281 define void @func_call_asm() #3 {
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282 call void asm sideeffect "", ""() #3
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283 ret void
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284 }
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285
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286 ; HSA: define amdgpu_kernel void @kern_call_external() #17 {
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287 define amdgpu_kernel void @kern_call_external() #3 {
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288 call void @external.func()
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289 ret void
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290 }
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291
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292 ; HSA: define amdgpu_kernel void @func_kern_defined() #17 {
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293 define amdgpu_kernel void @func_kern_defined() #3 {
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294 call void @defined.func()
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295 ret void
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296 }
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297
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298 attributes #0 = { nounwind readnone speculatable }
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299 attributes #1 = { nounwind "target-cpu"="fiji" }
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300 attributes #2 = { nounwind "target-cpu"="gfx900" }
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301 attributes #3 = { nounwind }
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302
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303 ; HSA: attributes #0 = { nounwind readnone speculatable }
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304 ; HSA: attributes #1 = { nounwind "amdgpu-work-item-id-x" "target-cpu"="fiji" }
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305 ; HSA: attributes #2 = { nounwind "amdgpu-work-item-id-y" "target-cpu"="fiji" }
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306 ; HSA: attributes #3 = { nounwind "amdgpu-work-item-id-z" "target-cpu"="fiji" }
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307 ; HSA: attributes #4 = { nounwind "amdgpu-work-group-id-x" "target-cpu"="fiji" }
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308 ; HSA: attributes #5 = { nounwind "amdgpu-work-group-id-y" "target-cpu"="fiji" }
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309 ; HSA: attributes #6 = { nounwind "amdgpu-work-group-id-z" "target-cpu"="fiji" }
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310 ; HSA: attributes #7 = { nounwind "amdgpu-dispatch-ptr" "target-cpu"="fiji" }
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311 ; HSA: attributes #8 = { nounwind "amdgpu-queue-ptr" "target-cpu"="fiji" }
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312 ; HSA: attributes #9 = { nounwind "amdgpu-dispatch-id" "target-cpu"="fiji" }
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313 ; HSA: attributes #10 = { nounwind "amdgpu-work-group-id-y" "amdgpu-work-group-id-z" "target-cpu"="fiji" }
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314 ; HSA: attributes #11 = { nounwind "target-cpu"="fiji" }
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315 ; HSA: attributes #12 = { nounwind "target-cpu"="gfx900" }
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316 ; HSA: attributes #13 = { nounwind "amdgpu-queue-ptr" "target-cpu"="gfx900" }
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317 ; HSA: attributes #14 = { nounwind "amdgpu-kernarg-segment-ptr" "target-cpu"="fiji" }
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318 ; HSA: attributes #15 = { nounwind "amdgpu-implicitarg-ptr" "target-cpu"="fiji" }
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319 ; HSA: attributes #16 = { nounwind }
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320 ; HSA: attributes #17 = { nounwind "amdgpu-flat-scratch" }
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