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annotate test/CodeGen/AMDGPU/fcmp64.ll @ 128:c347d3398279 default tip

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fix
author mir3636
date Wed, 06 Dec 2017 14:37:17 +0900
parents 803732b1fca8
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
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afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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1 ; RUN: llc < %s -march=amdgcn -mcpu=tahiti -verify-machineinstrs | FileCheck %s
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2 ; RUN: llc < %s -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs | FileCheck %s
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3
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4 ; CHECK-LABEL: {{^}}flt_f64:
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5 ; CHECK: v_cmp_nge_f64_e32 vcc, {{s[[0-9]+:[0-9]+], v[[0-9]+:[0-9]+]}}
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6 define amdgpu_kernel void @flt_f64(i32 addrspace(1)* %out, double addrspace(1)* %in1,
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7 double addrspace(1)* %in2) {
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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8 %r0 = load double, double addrspace(1)* %in1
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9 %r1 = load double, double addrspace(1)* %in2
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10 %r2 = fcmp ult double %r0, %r1
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11 %r3 = zext i1 %r2 to i32
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12 store i32 %r3, i32 addrspace(1)* %out
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13 ret void
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14 }
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15
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16 ; CHECK-LABEL: {{^}}fle_f64:
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17 ; CHECK: v_cmp_ngt_f64_e32 vcc, {{s[[0-9]+:[0-9]+], v[[0-9]+:[0-9]+]}}
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18 define amdgpu_kernel void @fle_f64(i32 addrspace(1)* %out, double addrspace(1)* %in1,
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19 double addrspace(1)* %in2) {
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20 %r0 = load double, double addrspace(1)* %in1
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21 %r1 = load double, double addrspace(1)* %in2
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22 %r2 = fcmp ule double %r0, %r1
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23 %r3 = zext i1 %r2 to i32
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24 store i32 %r3, i32 addrspace(1)* %out
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25 ret void
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26 }
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27
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28 ; CHECK-LABEL: {{^}}fgt_f64:
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29 ; CHECK: v_cmp_nle_f64_e32 vcc, {{s[[0-9]+:[0-9]+], v[[0-9]+:[0-9]+]}}
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30 define amdgpu_kernel void @fgt_f64(i32 addrspace(1)* %out, double addrspace(1)* %in1,
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31 double addrspace(1)* %in2) {
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32 %r0 = load double, double addrspace(1)* %in1
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33 %r1 = load double, double addrspace(1)* %in2
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34 %r2 = fcmp ugt double %r0, %r1
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35 %r3 = zext i1 %r2 to i32
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36 store i32 %r3, i32 addrspace(1)* %out
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37 ret void
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38 }
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39
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40 ; CHECK-LABEL: {{^}}fge_f64:
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41 ; CHECK: v_cmp_nlt_f64_e32 vcc, {{s[[0-9]+:[0-9]+], v[[0-9]+:[0-9]+]}}
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42 define amdgpu_kernel void @fge_f64(i32 addrspace(1)* %out, double addrspace(1)* %in1,
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43 double addrspace(1)* %in2) {
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44 %r0 = load double, double addrspace(1)* %in1
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45 %r1 = load double, double addrspace(1)* %in2
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46 %r2 = fcmp uge double %r0, %r1
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47 %r3 = zext i1 %r2 to i32
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48 store i32 %r3, i32 addrspace(1)* %out
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49 ret void
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50 }
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51
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52 ; CHECK-LABEL: {{^}}fne_f64:
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53 ; CHECK: v_cmp_neq_f64_e32 vcc, {{s[[0-9]+:[0-9]+], v[[0-9]+:[0-9]+]}}
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54 define amdgpu_kernel void @fne_f64(double addrspace(1)* %out, double addrspace(1)* %in1,
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55 double addrspace(1)* %in2) {
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56 %r0 = load double, double addrspace(1)* %in1
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57 %r1 = load double, double addrspace(1)* %in2
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58 %r2 = fcmp une double %r0, %r1
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59 %r3 = select i1 %r2, double %r0, double %r1
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60 store double %r3, double addrspace(1)* %out
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61 ret void
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62 }
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63
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64 ; CHECK-LABEL: {{^}}feq_f64:
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65 ; CHECK: v_cmp_nlg_f64_e32 vcc, {{s[[0-9]+:[0-9]+], v[[0-9]+:[0-9]+]}}
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66 define amdgpu_kernel void @feq_f64(double addrspace(1)* %out, double addrspace(1)* %in1,
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67 double addrspace(1)* %in2) {
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68 %r0 = load double, double addrspace(1)* %in1
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69 %r1 = load double, double addrspace(1)* %in2
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70 %r2 = fcmp ueq double %r0, %r1
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71 %r3 = select i1 %r2, double %r0, double %r1
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72 store double %r3, double addrspace(1)* %out
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73 ret void
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74 }