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annotate test/CodeGen/AMDGPU/fold-fmul-to-neg-abs.ll @ 128:c347d3398279 default tip

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fix
author mir3636
date Wed, 06 Dec 2017 14:37:17 +0900
parents 803732b1fca8
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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121
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1 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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2
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3 ; GCN-LABEL: {{^}}fold_mul_neg:
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4 ; GCN: load_dword [[V:v[0-9]+]]
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5 ; GCN: v_or_b32_e32 [[NEG:v[0-9]]], 0x80000000, [[V]]
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6 ; GCN: store_dword [[NEG]]
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7
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8 define amdgpu_kernel void @fold_mul_neg(float addrspace(1)* %arg) {
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9 %tid = tail call i32 @llvm.amdgcn.workitem.id.x()
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10 %gep = getelementptr inbounds float, float addrspace(1)* %arg, i32 %tid
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11 %v = load float, float addrspace(1)* %gep, align 4
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12 %cmp = fcmp fast ogt float %v, 0.000000e+00
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13 %sel = select i1 %cmp, float -1.000000e+00, float 1.000000e+00
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14 %mul = fmul fast float %v, %sel
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15 store float %mul, float addrspace(1)* %gep, align 4
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16 ret void
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17 }
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18
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19 ; GCN-LABEL: {{^}}fold_mul_abs:
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20 ; GCN: load_dword [[V:v[0-9]+]]
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21 ; GCN: v_and_b32_e32 [[ABS:v[0-9]]], 0x7fffffff, [[V]]
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22 ; GCN: store_dword [[ABS]]
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23
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24 define amdgpu_kernel void @fold_mul_abs(float addrspace(1)* %arg) {
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25 %tid = tail call i32 @llvm.amdgcn.workitem.id.x()
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26 %gep = getelementptr inbounds float, float addrspace(1)* %arg, i32 %tid
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27 %v = load float, float addrspace(1)* %gep, align 4
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28 %cmp = fcmp fast olt float %v, 0.000000e+00
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29 %sel = select i1 %cmp, float -1.000000e+00, float 1.000000e+00
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30 %mul = fmul fast float %v, %sel
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31 store float %mul, float addrspace(1)* %gep, align 4
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32 ret void
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33 }
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34
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35 declare i32 @llvm.amdgcn.workitem.id.x() #0
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36
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37 attributes #0 = { nounwind readnone speculatable }