annotate test/CodeGen/AMDGPU/llvm.amdgcn.frexp.exp.f16.ll @ 128:c347d3398279 default tip

fix
author mir3636
date Wed, 06 Dec 2017 14:37:17 +0900
parents 803732b1fca8
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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803732b1fca8 LLVM 5.0
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1 ; RUN: llc -march=amdgcn -mcpu=fiji -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VI %s
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2
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3 declare i16 @llvm.amdgcn.frexp.exp.i16.f16(half %a)
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4
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5 ; GCN-LABEL: {{^}}frexp_exp_f16
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6 ; GCN: buffer_load_ushort v[[A_F16:[0-9]+]]
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7 ; VI: v_frexp_exp_i16_f16_e32 v[[R_I16:[0-9]+]], v[[A_F16]]
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8 ; GCN: buffer_store_short v[[R_I16]]
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9 define amdgpu_kernel void @frexp_exp_f16(
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10 i16 addrspace(1)* %r,
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11 half addrspace(1)* %a) {
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12 entry:
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13 %a.val = load half, half addrspace(1)* %a
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14 %r.val = call i16 @llvm.amdgcn.frexp.exp.i16.f16(half %a.val)
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15 store i16 %r.val, i16 addrspace(1)* %r
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16 ret void
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17 }
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18
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19 ; GCN-LABEL: {{^}}frexp_exp_f16_sext
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20 ; GCN: buffer_load_ushort v[[A_F16:[0-9]+]]
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21 ; VI: v_frexp_exp_i16_f16_e32 v[[R_I16:[0-9]+]], v[[A_F16]]
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22 ; VI: v_bfe_i32 v[[R_I32:[0-9]+]], v[[R_I16]], 0, 16{{$}}
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23 ; GCN: buffer_store_dword v[[R_I32]]
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24 define amdgpu_kernel void @frexp_exp_f16_sext(
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25 i32 addrspace(1)* %r,
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26 half addrspace(1)* %a) {
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27 entry:
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28 %a.val = load half, half addrspace(1)* %a
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29 %r.val = call i16 @llvm.amdgcn.frexp.exp.i16.f16(half %a.val)
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30 %r.val.sext = sext i16 %r.val to i32
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31 store i32 %r.val.sext, i32 addrspace(1)* %r
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32 ret void
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33 }
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34
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35 ; GCN-LABEL: {{^}}frexp_exp_f16_zext
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36 ; GCN: buffer_load_ushort v[[A_F16:[0-9]+]]
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37 ; VI: v_frexp_exp_i16_f16_e32 v[[R_I16:[0-9]+]], v[[A_F16]]
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38 ; VI: v_and_b32_e32 v[[R_I32:[0-9]+]], 0xffff, v[[R_I16]]
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39 ; GCN: buffer_store_dword v[[R_I32]]
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40 define amdgpu_kernel void @frexp_exp_f16_zext(
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41 i32 addrspace(1)* %r,
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42 half addrspace(1)* %a) {
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43 entry:
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44 %a.val = load half, half addrspace(1)* %a
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45 %r.val = call i16 @llvm.amdgcn.frexp.exp.i16.f16(half %a.val)
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46 %r.val.zext = zext i16 %r.val to i32
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47 store i32 %r.val.zext, i32 addrspace(1)* %r
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48 ret void
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49 }