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annotate test/CodeGen/AMDGPU/llvm.amdgcn.image.getlod.ll @ 128:c347d3398279 default tip

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fix
author mir3636
date Wed, 06 Dec 2017 14:37:17 +0900
parents 803732b1fca8
children
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1 ; RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=GCN %s
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2 ; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck --check-prefix=GCN %s
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3
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4 ; GCN-LABEL: {{^}}getlod:
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5 ; GCN: image_get_lod {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf da
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6 define amdgpu_kernel void @getlod(<4 x float> addrspace(1)* %out) {
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7 main_body:
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8 %r = call <4 x float> @llvm.amdgcn.image.getlod.v4f32.f32.v8i32(float undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 1)
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9 store <4 x float> %r, <4 x float> addrspace(1)* %out
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10 ret void
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11 }
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12
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13 ; GCN-LABEL: {{^}}getlod_v2:
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14 ; GCN: image_get_lod {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf da
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15 define amdgpu_kernel void @getlod_v2(<4 x float> addrspace(1)* %out) {
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16 main_body:
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17 %r = call <4 x float> @llvm.amdgcn.image.getlod.v4f32.v2f32.v8i32(<2 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 1)
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18 store <4 x float> %r, <4 x float> addrspace(1)* %out
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19 ret void
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20 }
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21
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22 ; GCN-LABEL: {{^}}getlod_v4:
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23 ; GCN: image_get_lod {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf da
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24 define amdgpu_kernel void @getlod_v4(<4 x float> addrspace(1)* %out) {
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25 main_body:
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26 %r = call <4 x float> @llvm.amdgcn.image.getlod.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 1)
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27 store <4 x float> %r, <4 x float> addrspace(1)* %out
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28 ret void
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29 }
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30
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31 ; GCN-LABEL: {{^}}adjust_writemask_getlod_none_enabled:
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32 ; GCN-NOT: image
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33 ; GCN-NOT: store
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34 define amdgpu_kernel void @adjust_writemask_getlod_none_enabled(float addrspace(1)* %out) {
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35 main_body:
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36 %r = call <4 x float> @llvm.amdgcn.image.getlod.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
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37 %elt0 = extractelement <4 x float> %r, i32 0
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38 store float %elt0, float addrspace(1)* %out
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39 ret void
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40 }
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41
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42 declare <4 x float> @llvm.amdgcn.image.getlod.v4f32.f32.v8i32(float, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
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43 declare <4 x float> @llvm.amdgcn.image.getlod.v4f32.v2f32.v8i32(<2 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
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44 declare <4 x float> @llvm.amdgcn.image.getlod.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
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47 attributes #0 = { nounwind readnone }